A CMOS Channel-Select Tunable Filter for 3G Wireless Receivers

by

Hussain Alzaher, Noman Tasadduq1 and

Mohammed Ismail2

1. Electrical Engineering Department, KFUPM, Dhahran 31261, Saudi Arabia2. Analog VLSI Lab., Ohio-State University, Columbus 43210, USA

Outline Introduction

• 2G standards• Evolution of 3G standards

Receiver Architectures• Superheterodyne• Double IF conversion

• Direct conversion • 3G multi-standards

Analog - Digital Interface Baseband Design Requirements Proposed Baseband Filter Techniques

• Motivations and literature review• DCCF based technique

Proposed filter• Design• Experimental Results

Introduction

Second-generation (2G) mobile radio systems

1. Global System for Mobile Communications (GSM) in Europe and worldwide

2. North American Digital Cellular (IS-54/IS-136) & (IS-95) in USA

3. Personal Digital Cellular (PDC) in Japan

Different Characteristics: Frequency band, Channelization, Frame size & Bit Rate

Different Bandwidths: PDC (13KHZ), IS-54 (15KHz), GSM (100KHz) & IS-95 (630KHz)

Limited to Voice and Low Data-rate

Third generation (3G): Future wireless systems

• Broadband Multimedia and High Data Rate

• Universal Access and Global Roaming

• Wide-band Code Division Multiple Access (WCDMA)

• More Bandwidth 2.1/4/8 MHz for Different data rate

• Backward Compatibility to 2G Saving Today's

Investment

• Multi-standard Wireless Receivers

Introduction

Introduction

Characteristics IS-54/136 PDC GMS IS-95

Region North America Japan Europe North America Forward Band 869-894 MHz 700/1500 MHz 935-690 MHz 869-894 MHz Reverse Band 824-849 MHz 890-915 MHz 824-849 MHz

Bandwidth (MHz) 50 MHz 50 MHz 50 MHz Channelization TDMA / FDMA TDMA / FDMA TDMA / FDMA CDMA / FDMA

Channel Spacing 30 KHz 25KHz 200 KHz 1250 KHz # Of Channels 832 (3 users / ch.) 124 (8 users / ch.) 20 (798 users / ch.)

Frame Size 40 ms 20 ms 4.6 ms 20 ms Duplex Method FDD FDD FDD FDD

Channel Bit Rate 48.6 Kbps 271 Kbps 1.2288 Mbps Speech Codec VSELP VSELP RPE-LPT CELP

Bit Rate (Voice) 8 Kbps 13 Kbps 1.2-9.6 Kbps Modulation OQPS OQPS GMSK BPSK/QPSK

Mobile Avg. Pwr 0.6-3 W 0.25-2.5 W 0.2-2 W Cell Radius 30 miles 1-5 miles 30 miles

Min. Cluster Size 7 3 1

2G digital cellular systems

Introduction

Proposal

Region

UTRA FDD

Europe

UTRA TDD

Europe

TIA FDD USA

TIA TDD USA

ARIB FDD

Japan

ARIB TDD Japan

Multiple -access

WCDMA DS-CDMA

TD-CDMA WCDMA DS-CDMA

TD-CDMA WCDMA DS-CDMA

TD-CDMA

Chip rate Mc /s

4.096 (8.192 / 16.384)

4.096 1.2288 (3.6864)

1.2288 (3.6864)

4.096 (1.024 /8.192 / 16.384)

4.096 (1.024 /8.192 / 16.384)

Pulse shape

Root raised Cosine r =0.22

Root raised Cosine r =0.22

Root raised Cosine r =0.22

Root raised Cosine r =0.22

Root raised Cosine r =0.22

Root raised Cosine r =0.22

Carrier spacing spacing

5 MHz (10/

20)MHz

5 MHz 3.75 MHz 3.75 MHz 5 MHz (1.25/10/ 20)MHz

5 MHz (1.25/10/ 20)MHz

Frame length

10 ms 10 ms 20 /5 ms 20 /5 ms 10 ms 10 ms

Data modulation

QPSK QPSK QPSK BPSK

QPSK BPSK

QPSK/ BPSK

QPSK/ BPSK

Spreading modulation

QPSK QPSK QPSK QPSK QPSK/ HPSK

QPSK

Synchro-nized

no yes yes yes no yes

Detection coherent coherent coherent coherent coherent coherent

System characteristics of 3G standards

Receiver Architectures

3G Receiver

Low-cost + Single-chip + Low power + Multi-standard

Conventional Superheterodyne Receiver

Not Suitable: Discrete-component Filters and Expensive Technologies

Direct Conversion & wide-band IF double conversion

Integrated Architectures

Eliminate Off-chip Filtering

Perform Channel Filtering at Baseband

Allow Design of Programmable Multi-standard Integrated Channel Select

Filter

Adjacent Channel Blocker Require High Dynamic Range Designs

Receiver Architectures

Conventional superheterodyne receiver

LO2

RFfilter

IRfilter

IFfilter

IF ADC

Synthesizer

I Q

Synthesizer

LC TankLC TankLO1

LNA

Receiver Architectures

Wide-band IF with double conversion receiver

RFfilter ADC

I Q

LNA

LO1I QLO2

Receiver Architectures

Direct conversion receiver

RFfilter ADC

I Q

LNA

LO1

Receiver Architectures

+

+

LO1

LO2

LO3

LO4

LNA

LNA

LNA

LNA

RFfilter

RFfilter

RFfilter

RFfilter

DSP

Programmable LPF

ADC

Programmable LPF

ADC

Bandwidth ControlGain Control

DC OffsetControl

VGA

VGA

A typical architecture for a multi-standard receiver

Receiver Architectures

• Sharing Filter Low power & Cost-effective

• Most Significant Hardware Saving

• Digital Tuning: Eliminates Auxiliary DAC

• Digital Automatic Frequency Tuning

• Programmable + DR = Challenge

Analog - Digital Interface

• Digital Filtering: ADC Design Stringent

• Hard Implementation + More Power

• Aliasing considerations

• High order filters: ADCs with low dynamic range and

sampling rate

• Analog filter: Much less power

• A 16-bit 20MHz: 183mA

• A 6-bit 40MHz ADC: 23mA

Baseband Design Requirements

• Attenuate blockers

• Highly Linear: Inter-modulation (IP3)

• Low Noise

• High Dynamic Range

Motivations and Literature Review

• gm-C Filters: Poor Dynamic Range

• S-C Filters: Frequency vs. Power

• Active-RC and gm-RC: Capacitor Matrices

• Power: Area & Cutoff Frequency Precision

• Interleaving Filtering/Amplification: Improving Dynamic

Range

Proposed Baseband Filter Techniques

Multi-standard Requirement

• Wide Programmability for Different Standard:

PDC, IS-54, GSM, IS-95, WCDMA

• Precise Frequency for Channel Selection

• S-C Filter Problem with 2.1MHz WCDMA

• Active RC and Highly linear gm-RC: Optimizing

Power

• Capacitor Matrices: Large Area for Low Frequency &

Precision

Proposed Baseband Filter Techniques

Multi-standard performance comparison

Technique gm-C Switched-C Active-RC gm-RC Proposed

PDC/IS-54 Power

Low

Low

Low

Medium

Low

Linearity Poor Good Good Good Good Area V. Large V. Large V. Large V. Large Small GSM Power

Low

Medium

Medium

Medium

Low

Linearity Poor Good Good Good Good Area Large Large Large Large Small IS-95 Power

Low

V. High

High

Medium

Low

Linearity Poor Good Good Good Good Area Medium Medium Medium Medium Small

WCDMA Power

Low

difficult

High

Medium

Low

Linearity Poor Medium Good Good Area Small Small Small Small

Proposed Baseband Filter Techniques

DCCF Based Technique

• Digitally controlled current follower (DCCF) & unity

gain voltage buffer

• Poly-silicon resistors and capacitors

• Current division network (CDN)

Proposed Baseband Filter Techniques

Digitally controlled current follower (DCCF)

DCCF Based Technique

CDN

M13 M9 M10

M2 M1

M3 M7 M8

M6M5

M4

McXM11

M12

VDD

Vb

V

Z

Isb

Ibp

VDD

VSS

VSS

(virtual ground)

d1 d1 d2 d2 dn dn

Iin

Iin/2 Iin/4 Iin/(2)n

Io

NMOS current division network

DCCFX +IzpIx

Symbol of the DCCF

xn

ii

iz I

dI

1

2

1

DCCF Based Technique

Original Buffer

DCCF Based Technique

M16

Vi

Vc

Vsb

M15

M3 M11

M1

M7

M4Mc

M17

M18

Ib

Isb

VDD

VSS

Vo

Transformation

DCCF Based Technique

V1 M1

V2

V1

M2

M1

V2

V1 M2M1 V2

Improved buffer

DCCF Based Technique

M16

Vi

Vb

Vsb

M15 M19

M3 M11

M2M1

M7

M4M19

M17

M18

Ib

Isb

VDD

VSS

Vo

DCCF Based Technique

Fully Differential Architecture

Fully differential building block topology

DCCFx z

DCCFx z

CMFB

Ip

In

Vop

Von

Fully differential realization of the proposed DCCF-VB

DCCF Based Technique

CDN CDN

M18

M17

M16

M12

M11

MccVc

VddVb

Vc

M15M2

M1

Mc

M4

M5M6

IsbICM/2ICM/2

ICM

VCM

Mc1 Mc2

Mc6Mc3Mc4M3 M7 M8

M10M9M13M14

M19M20

M21Mc5

Za Xa Xp Zp

CCM RCM

CCM RCM

VM

VDD

VSS

Ibp

Vop

Vom

Filter Design

Adding R-2R Ladders to Filter Design

Allow the accommodation of GSM, IS-54 with 15Khz,

100Khz Bandwidths

GSM: R=10k, C=160pF

IS-54: R=10k, C=1nF

IS-54: 8-bit R2R ladders R=10k, C=4pF

Filter Design

RI

VReq

n

i

iib12

1where

Filter Design

Proposed second-order filter section

1x R2RR2R1x

R2R

DCCFX Z DCCFX ZR2R

1x R2RR2R1x DCCFX Z

DCCFX ZR2R

R2R

CMFBCMFB

Vcm

Vcm

C

C

C

C

R

R

R

R

R

R

+

-Vo

+

-

Vi

Rin

Rin

Filter Design

)/()/(

)/(

2132322111112

213321

CCRRCRss

CCRR

V

V inin

i

LP

213232

21n CCRRββ

ααω

232321

111112

CRRββα

CRRββαQ

n

i

iib12

1

n

i

iid12

1

Experimental Results

Photomicrograph of the 6-th order filter

Experimental Results

Measured ac response: PDC and IS-54

Experimental Results

Measured ac response: GSM

Experimental Results

Measured ac response: IS-95

Experimental Results

Measured ac response: WCDMA

Experimental Results

Filter 6th-order Butrerworth Technology 0.5μm CMOS Chip area 1.25mm2 Supply voltage 2.7V Current consumption 2.25mA Frequency tuning range 5kHz-5MHz Gain 18dB Statistical gain variation (25 chips) 0.44dB IIP3 (Inband ) PDC (IS-54)/GSM/IS-95/WCDMA

28.3 / 25.6 / 23.7 / 21.9dBm

Statistical IIP3 variation (25 chips) 0.5dBm IIP3 (stopband) PDC (IS-54)/GSM/IS-95/WCDMA

61 / 59.5 / 56 / 51.4dBm

Input trferred noise PDC (IS-54)/GSM/IS-95/WCDMA

30 / 45 / 69 / 86 μV

Stopband rejection PDC (IS-54)/GSM/IS-95/WCDMA

80 / 80 / 76 / 66dB

Dynamic range PDC (IS-54)/GSM/IS-95/WCDMA

90 / 89 / 84 / 80dB

Passband ripple 0.2dB PSRR (passband) 40.3dB

Performance of proposed filter based on DCCF