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    ECE Simulation Lab

    SUBMITTED BY:-

    Kuldeep Jaimini (10302166)

    Monika Grewal (10302169)

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    INDEX

    S.No. EXPERIMENT NAME PAGE TEACHERSREMARKS

    1 Study of a PCM system through

    MATLAB simulation

    2 Study and simulation of different

    channel models; awgn channel,

    frequency flat & frequency selective,

    rayleigh fading channel

    3 Simulation of BPSK & QPSK

    communication systems and study of

    their performance over AWGN channel

    followed by verification with

    theoretical results

    4

    5

    6

    7

    8

    9

    10

    2

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    EXPERIMENT # 01

    Problem Statement:- study of a PCM system through MATLAB simulation.

    (a) Generate a sinusoidal signal of the form where the amplitude A is

    uniformly distributed in the interval [1, 3] volts. Phase angle is uniformly distributed in

    the interval [0, 2 ]. Sample the continuous time signal at a rate 20% higher than Nyquist

    rate. Quantize the discrete time signal with a 16-level quantizer and encode the resulting

    signal with a 4-bit encoder. Observe the signal at each stage.

    (b) Simulate the PCM receiver and compare the recover waveform with the originalsinusoidal waveform. Assume noiseless channel with no losses.

    Algorithm:-

    (a) PCM encoder

    Step 1:- Generation of sinusoidal signal

    A sinusoidal signal to be generated is of the form- , where amplitude A

    and phase angle are random variables having uniform probability distribution function.

    Generate a random variable A in the interval [1, 3] and phi( ) in the interval [0, 2]

    which are uniformly distributed in specified interval.

    Step 2:- time interval

    Time interval is taken from 0 to 2 so that cosine pulse is generated upto 5 complete

    cycles. We have taken 800 samples of time t in the range 0 to 2.

    The sinusoidal signal with amplitude A and phase phi( ) with time interval is thus

    plotted.

    Step 3:- quantization

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    Since we have to make a 4-bit quantizer, total number of quantization levels are 24=16.

    The interval [-3, 3] is divided into 16-levels and thus step size comes out to be-

    So the 16 levels are:-

    Level

    no

    Interval Assigned value Encoded value

    1 -3 to -3+0.375 0

    2 -3+0.375 to -3+2*0.375 0.1875+0.375 1

    3 -3+2*0.375 to -3+3*0.375 0.1875+2*0.375 2

    4 -3+3*0.375 to -3+4*0.375 0.1875+3*0.375 3

    5 -3+4*0.375 to -3+5*0.375 0.1875+4*0.375 4

    6 -3+5*0.375 to -3+6*0.375 0.1875+5*0.375 5

    7 -3+6*0.375 to -3+7*0.375 0.1875+6*0.375 6

    And so on upto 16.

    For every sampled value, it is assigned the mid value of the interval (mid-tread

    quantizer), if the sampled value lies into that interval.

    If -3+j*0.375 < x < -3+(j+1)*0.375, assign it value 0.1875+j*0.375 where j=0 to 15.

    The quantized levels are encoded with values from j=0 to 15.

    Quantized signal is stem plotted in fig

    (b) PCM receiver

    Decode the received signal in exactly reverse manner as was followed at the encoder.

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    Plot sinusoidal wave with recovered quantized levels.

    Compute and plot the error by subtracting the recovered signal from the original signal.

    MATLAB Code:-

    clear all;

    clc;

    a=random('unif',1,3);

    phi=random('unif',0,2*pi);

    t1=0:0.0025:2-0.0025;

    s1=a*cos(5*pi*t1+phi);

    subplot(5,1,1),stem(t1,s1,'.')

    title('pcm encoder'),ylabel('s1')

    for i=1:800

    for j=-8:7

    x=0.375*j;

    y=0.375*(j+1);

    if s1(i)>=x & s1(i)

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    s3(i)=j+8;

    end

    end

    end

    dec2bin(s3(i))

    subplot(5,1,2),stem(s2,'.')

    ylabel('s2')

    subplot(5,1,3),stem(s3,'.')

    ylabel('s3')

    %pcm receiver

    for i=1:800

    for j=0:15

    if s3(i)==j

    s4(i)=0.1875+(j-8)*0.375;

    end

    end

    end

    subplot(5,1,4),plot(s4)

    title('pcm receiver'),ylabel('s4')

    e=s4-s1;

    subplot(5,1,5),stairs(e)

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    xlabel('time'),ylabel('s5')

    Outputs:-

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    EXPERIMENT:- 2

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    Problem statement:- Study and simulation of different channel models; AWGN channel,

    frequency flat & frequency selective, rayleigh fading channel.

    1. AWGN channel-

    AWGN stands for Additive White Gaussian Noise. This means the noise in the channel has

    following characteristics:-

    a) Additive: - The noise gets added to original signal i.e.

    Received signal = input signal + noise

    b) White: - The noise affects all frequency components equally i.e. the channel is not

    frequency selective.

    c) Gaussian: - The noise follows the Gaussian probability distribution function.

    Algorithm:-

    To simulate AWGN channel, well generate a random variable with Gaussian distribution and

    add it to original signal.

    Gaussian random variable is defined by two parameters- mean and variance. A Gaussian number

    having can be generated from a normal distributed number by multiplying it with standard

    deviation (square root of variance) and adding the mean into it.

    Gaussian random variable with zero mean and unit variance:-

    A normal distribution is Gaussian distribution with zero mean and unit variance.

    Matlab code:-

    N = 10000;x1 = -5:0.1:5;

    n = randn(1,N)

    hist(n,x1)

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    -6 -4 -2 0 2 4 60

    50

    10 0

    15 0

    20 0

    25 0

    30 0

    35 0

    40 0

    45 0

    Gaussian random variable with specified mean and variance:-

    Matlab code:-

    N = 10000;

    x1 = -5:0.1:5;

    mu = input('mean =')

    s = input('variance =')

    n = randn(1,N)

    hist(n,x1)

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    Histogram:-

    -0.5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.50

    200

    400

    600

    800

    1000

    1200

    1400

    Mean = 2

    Variance = 0.1

    2. FREQUENCY FLAT

    Impulse response h(n) of frequency flat channel is constant for each frequency component.

    i.e.

    Matlab Code:-

    clear all;

    clc;

    a=randn(1) + j*randn(1);

    a1=abs(a);

    l=0:10;

    syms x;

    stem(int(a1*dirac(x-l),0,10))

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    1 2 3 4 5 6 7 8 9 100

    0.1

    0.2

    0.3

    0.4

    0.5

    0.6

    0.7

    0.8

    3. FREQUENCY SELECTIVE

    The impulse response of frequency selective channel is given by-

    i.e. the weighting factor is not a constant but a random variable.

    Matlab Code:-

    clear all;

    clc;

    a=randn(1,11) + j*randn(1,11);

    a1=abs(a);

    l=0:10;

    syms x;

    stem(int(a1.*dirac(x-l),0,10))

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    1 2 3 4 5 6 7 8 9 10 110

    0.5

    1

    1.5

    2

    2.5

    3

    4. RAYLEIGH FADING CHANNEL

    In Rayleigh fading channel the amplitude of the input signal is multiplying by a scaling factor

    which follows Rayleigh distribution. Rayleigh fading channel is an example of frequency

    selective channel.

    Generation of Rayleigh random variable

    A Rayleigh distributed random variable can be generated by adding two orthogonal Gaussian

    random variables.

    Matlab code:-

    N=100;

    x1 = 0:0.1:5;

    n=randn(1,N) + j*randn(1,N);

    n1=abs(n)

    hist(n1,x)

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    Histogram:-

    -1 0 1 2 3 4 5 60

    100

    200

    300

    400

    500

    600

    700

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    EXPERIMENT NO-3

    Problem statement:- Simulation of BPSK & QPSK communication systems and study of their

    performance over AWGN channel followed by verification with theoretical results.

    1. BPSK:-

    Matlab Code:-

    clear all;

    clc;

    N = 10^4;

    % Transmitter

    ip1 =1.*( rand(1,N)>0.5);

    x= 2*ip1-1;

    %awgn noise addition

    SNR=[-3:10];

    for i=1:length(SNR)

    n=1/sqrt(2)*sqrt(10.^(-SNR(i)/10)).*randn(1,N);

    y=x+n;

    % receiver

    %for j=1:N

    %if y(j)>0

    %y1(j)=1;

    %else y1(j)=0;

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    %end

    %end

    y1=real(y>0);

    %error analysis

    %e=ip1-y1;

    %d=find(e);

    %count(i)=size(d,2);

    count(i)=sum(xor(ip1,y1));

    end

    tber= 0.5*erfc(sqrt(10.^(SNR/10)));

    semilogy(SNR,count/N,'b*')

    hold on

    semilogy(SNR,tber,'m-')

    xlabel('SNR');

    ylabel('Bit error rate');

    title('error performance analysis curve for BPSK modulation');

    axis([-3 10 10^-4 0.5])

    grid on

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    2- QPSK

    Matlab code:-

    close all;

    clear all;

    clc;

    N =10000;

    % Transmitter

    ip =( rand(1,N)>0.5);

    x=[];

    for k=1:N/2

    Q(k)=(-1).^(ip(2*k-1)+1);

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    I(k)=(-1).^(ip(2*k)+1);

    x(k)=I(k)+(i*Q(k));

    end

    %awgn noise addition

    n = 1/sqrt(2)*[randn(1,N/2) + j*randn(1,N/2)];

    SNR=[-3:10];

    count=[];

    for k=1:length(SNR)

    noise=10.^(-SNR(k)/20).*n;

    y=x+noise;

    % receiver

    I1=[];

    Q1=[];

    for t=1:N/2

    I1=[I1 real(y(t))>0];

    Q1=[Q1 imag(y(t))>0];

    end

    y1=cat(1,Q1,I1);

    y2=reshape(y1,[1,N]);

    count=[count sum(xor(ip,y2))];

    end

    err=count/N

    semilogy(SNR,err,'b*')

    tber=0.5*erfc(sqrt(10.^(SNR/10)));

    hold on

    semilogy(SNR,tber,'m-')

    xlabel('SNR');

    ylabel('Bit error rate');

    title('error performance analysis curve for QPSK modulation');

    axis([-3 10 10^-6 1])

    grid on

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    RESULT:-

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    EXPERIMENT # 04

    Problem Statement:- study of performance of linear block code through simulator.

    a) Implementation of a (3,1) repetition encoder.

    b) BPSK modulation and transmission of coded data over noisy channel.

    c) Decoding of received data using majority selector logic algorithm and evaluation of

    performance in presence of AWGN.

    THEORY:- Repetition code is an (r,1) block coding scheme that repeats the bits across a channel

    to achieve error free communication (r is the number of bits in each codeword for each data bit to

    be coded).

    Matlab code:-

    a) Implementation of (3,1) repetition encoder.

    clear all;

    clc;

    N=100; %Number of input bits

    data=rand(1,N)>0.5;

    x=[];

    for i=1:length(data)

    x(3*(i-1)+1)=data(i);

    x(3*(i-1)+2)=data(i);

    x(3*(i-1)+3)=data(i);

    end

    x

    Output for a 5-bit long data stream:-

    data = 0 1 1 0 1

    x = 0 0 0 1 1 1 1 1 1 0 0 0 1 1 1

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    b) BPSK modulation and transmission of coded data over noisy channel.

    Matlab code:-

    %BPSK modulation

    t=2*x-1;

    %channel

    n=1/sqrt(2)*randn(1,length(t)); %awgn noise

    r=t+n;

    c) Decoding of received data using majority selector logic algorithm and evaluation of

    performance in presence of AWGN.

    Matlab code:-

    clear all;

    close all;

    clc

    N=10^4; %Number of input bits

    data=rand(1,N)>0.5

    %repititive coding

    x=[];

    for i=1:length(data)

    x(3*(i-1)+1)=data(i);

    x(3*(i-1)+2)=data(i);

    x(3*(i-1)+3)=data(i);

    end

    %BPSK modulation

    t=2*x-1;

    %channel

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    n=1/sqrt(2)*randn(1,length(t));

    snr=[1:5];

    for j=1:length(snr)

    noise=10.^(-snr(j)/20).*n; %awgn noise

    r=t+noise;

    %receiver decision making

    y=real(r>0)

    %decoder

    e=[];

    for k=1:length(data)

    s(k)=y(3*(k-1)+1)+y(3*(k-1)+2)+y(3*(k-1)+3);

    if s(k)=2

    d(k)=1;

    end

    end

    %counting errors

    error(j)=sum(xor(data,d))/N;

    end

    error

    semilogy(snr,error)

    %axis([1 5 10e-4 10e-3])

    RESULTS:-

    N=10000

    snr=1 2 3 4 5

    error = 0.0082 0.0040 0.0017 0.0006 0.0002

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    BER Plot:-

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    EXPERIMENT # 05

    Problem Statement: study of (2, 1, 3) linear convolution coder and its performance over

    AWGN channel and BPSK through simulation.

    THEORY: Convolutional code is a type oferror-correcting code in which

    Each m-bitinformation symbol (each m-bit string) to be encoded is transformed into an

    n-bit symbol, where m/n is the code rate (n m) and

    The transformation is a function of the last k information symbols, where k is the

    constraint length of the code.

    To convolutionally encode data, start with kmemory registers, each holding 1 input bit. Unless

    otherwise specified, all memory registers start with a value of 0. The encoder has n modulo-2

    adders (a modulo-2 adder can be implemented with a single BooleanXOR gate, where the logic

    is: 0+0 = 0, 0+1 = 1, 1+0 = 1, 1+1 = 0), and ngenerator polynomials one for each adder (see

    figure below). An input bit m1 is fed into the leftmost register. Using the generator polynomials

    and the existing values in the remaining registers, the encoder outputs n bits. Now bit shift all

    register values to the right (m1 moves to m0, m0 moves to m-1) and wait for the next input bit. If

    there are no remaining input bits, the encoder continues output until all registers have returned to

    the zero state.

    ALGORITHM: Block Diagram of given convolutional coder is:-

    24

    http://en.wikipedia.org/wiki/Error-correcting_codehttp://en.wikipedia.org/wiki/Bithttp://en.wikipedia.org/wiki/Informationhttp://en.wikipedia.org/wiki/Binary_stringhttp://en.wikipedia.org/wiki/Memory_registerhttp://en.wikipedia.org/wiki/Boolean_logichttp://en.wikipedia.org/wiki/XOR_gatehttp://en.wikipedia.org/wiki/Generator_polynomialhttp://en.wikipedia.org/wiki/Bit_shifthttp://en.wikipedia.org/wiki/Error-correcting_codehttp://en.wikipedia.org/wiki/Bithttp://en.wikipedia.org/wiki/Informationhttp://en.wikipedia.org/wiki/Binary_stringhttp://en.wikipedia.org/wiki/Memory_registerhttp://en.wikipedia.org/wiki/Boolean_logichttp://en.wikipedia.org/wiki/XOR_gatehttp://en.wikipedia.org/wiki/Generator_polynomialhttp://en.wikipedia.org/wiki/Bit_shift
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    Generate N-bit data stream and append three 0s after the data array in order to ensure

    that the registers remain clear after coding.

    Polynomial for code 1:- 1+x3

    And that for code 2:- 1+x+x2

    Where the power indicates the delayed form of input e.g. x2 indicates x(n-2) i.e. the data

    has been delayed by 2 units.

    The adder in block diagram is simply modulo-2 adder or Xor gate.

    Code array is formed by alternatively sampling bits from code1 and code2 streams resp.

    Decoder:

    Decoding is done using MATLAB in-built function vitdec (.) which uses a trellis array

    to decode the convolutionally encoded stream.

    Trellis array is computed using inbuilt function poly2trellis(). Where first field is

    constraint length(k) = m+1 = 4, and second field is generator polynomial.

    Generator polynomial is a k*n matrix (k-input, n-output)

    Where, each element gives connection of input to give output.

    MATLAB CODE:

    clear all;

    clc;

    N=1000;

    data(1:N)=rand(1,N)>0.5;

    ip=[data 0 0 0];

    %convolutional encoder

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    d1=0; d2=0; d3=0;

    for i=1:N+3

    code(2*i-1)=xor(ip(i),d3);

    temp=xor(d1,d2);

    code(2*i)=xor(ip(i),temp);

    d3=d2;

    d2=d1;

    d1=ip(i);

    end

    %bpsk modulator

    x=2*code-1;

    %awgn noise addition

    SNR=[0 3 6];

    for j=1:length(SNR)

    noise=1/sqrt(2)*(10.^(-SNR(j)/20)).*randn(1,2*(N+3));

    y=x+noise;

    % receiver

    r=real(y)>0;

    %viterbi decoder

    t=poly2trellis(4,[11 16]);

    decoded=vitdec(r,t,3,'term','hard');

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    error(j)=sum(xor(ip,decoded))/(N+3);

    end

    error

    semilogy(SNR,error)

    xlabel('SNR');

    ylabel('Bit error rate');

    title('error performance analysis of BPSK with convolutional coding');

    grid on

    GRAPH:

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    EXPERIMENT # 06

    Problem Statement: Study the functionality of LAN trainer kit and connections of nodes in a

    LAN configuration. Implement the MAC layer algorithms like ALOHA, CSMA and CSMA/CD

    between the connected nodes.

    THEORY:

    1. ALOHA: ALOHA is a medium access protocol that was originally designed for ground based

    radio broadcasting however it is applicable to any system in which uncoordinated users are

    competing for the use of a shared channel. Pure ALOHA and slotted ALOHA are the two

    versions of ALOHA.

    With Pure Aloha, stations are allowed access to the channel whenever they have data to transmit.

    Because the threat of data collision exists, each station must either monitor its transmission on

    the rebroadcast or await an acknowledgment from the destination station. By comparing the

    transmitted packet with the received packet or by the lack of an acknowledgement, the

    transmitting station can determine the success of the transmitted packet. If the transmission was

    unsuccessful it is resent after a random amount of time to reduce the probability of re-collision.

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    http://www.blurtit.com/q328653.htmlhttp://www.blurtit.com/q898327.htmlhttp://www.blurtit.com/q646302.htmlhttp://www.blurtit.com/q328653.htmlhttp://www.blurtit.com/q898327.htmlhttp://www.blurtit.com/q646302.html
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    Pure ALOHA protocol. Boxes indicate frames. Shaded boxes indicate frames which have

    collided

    2. CSMA: CSMA is a access method in which a transmitting data station that detects another

    signal while transmitting a frame, stops transmitting that frame, transmits ajam signal, and then

    waits for a random time interval before trying to send that frame again.

    Carrier Sense describes the fact that a transmitter uses feedback from a receiver that detects a

    carrier wave before trying to send. That is, it tries to detect the presence of an encoded signal

    from another station before attempting to transmit. If a carrier is sensed, the station waits for the

    transmission in progress to finish before initiating its own transmission.

    Multiple-Access describes the fact that multiple stations send and receive on the medium.

    Transmissions by one node are generally received by all other stations using the medium.

    3. CSMA/CD: Carrier sense multiple access with collision detection (CSMA/CD) is a computer

    networking access method in which:

    A carriersensing scheme is used. A transmitting data station that detects another signal

    while transmitting a frame, stops transmitting that frame, transmits a jam signal, and then

    waits for a random time interval before trying to send that frame again.

    29

    http://en.wikipedia.org/wiki/Datahttp://en.wikipedia.org/wiki/Transmission_(telecommunications)http://en.wikipedia.org/wiki/Frame_(telecommunications)http://en.wikipedia.org/wiki/Jam_signalhttp://en.wikipedia.org/wiki/Timehttp://en.wikipedia.org/wiki/Computer_networkhttp://en.wikipedia.org/wiki/Computer_networkhttp://en.wikipedia.org/wiki/Carrier_wavehttp://en.wikipedia.org/wiki/Datahttp://en.wikipedia.org/wiki/Transmission_(telecommunications)http://en.wikipedia.org/wiki/Frame_(telecommunications)http://en.wikipedia.org/wiki/Jam_signalhttp://en.wikipedia.org/wiki/Timehttp://en.wikipedia.org/wiki/Datahttp://en.wikipedia.org/wiki/Transmission_(telecommunications)http://en.wikipedia.org/wiki/Frame_(telecommunications)http://en.wikipedia.org/wiki/Jam_signalhttp://en.wikipedia.org/wiki/Timehttp://en.wikipedia.org/wiki/Computer_networkhttp://en.wikipedia.org/wiki/Computer_networkhttp://en.wikipedia.org/wiki/Carrier_wavehttp://en.wikipedia.org/wiki/Datahttp://en.wikipedia.org/wiki/Transmission_(telecommunications)http://en.wikipedia.org/wiki/Frame_(telecommunications)http://en.wikipedia.org/wiki/Jam_signalhttp://en.wikipedia.org/wiki/Time
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    CSMA/CD is a modification of pure carrier-sense multiple access (CSMA). CSMA/CD is used

    to improve CSMA performance by terminating transmission as soon as a collision is detected,

    thus reducing the probability of a second collision on retry.

    CONFIGURATION SETTING:

    1. Network Emulator Unit (NEU)

    Data rates 8, 16, 32, 64,128, 256, 512Kbps, 1Mbps

    Topology Bus, Ring, Star (optional)

    Delay 0 to 15 bits between each pair of nodes

    Error Generators (between one pair of

    nodes)

    Bit Error 0 to 10-6

    Frame Error 0 to 10-5

    Nodes 6 nodes per NEU (3 PCs can be connected

    per NEU. Each PC acts as 2 nodes)

    PC plug-in card 32 bit, 33MHz PCI Bus (PCI ver 2.0

    compliant)

    MAC Layer support ALOHA, CSMA, CSMA /CD

    Nodes 2 nodes per NIU

    2. Network Interface Unit (NIU)

    PC1 PC2

    Node ID 0 at config menu 1 and 1 at

    config menu 2

    0 at config menu 1 and 1 at

    config menu 2

    Baud rate 8 Kbps(at both configuration

    menu and NEU)

    8 kpbps( at both configuration

    menu and NEU)

    Protocol ALOHA/CSMA/CSMA-CD ALOHA/CSMA/CSMA-CD

    Duration 100s 100s

    30

    http://en.wikipedia.org/wiki/Carrier_sense_multiple_accesshttp://en.wikipedia.org/wiki/Carrier_sense_multiple_access
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    Packet length 1000 bits 1000 bits

    Bit delay 0(at NEU) 0(at NEU)

    Direction Sender Sender

    FORMULAE USED FOR CALCULATION:

    Offered load = ratedataxperimenteofDuration

    )bitsin(lengthpacketnodesallbypacketedtransmiittofsum

    ratedataxperimenteofDuration

    bitin(lengthpacketnodesallbypacketedtransmiittlysuccessfulofsumThroughputacticalPr

    =

    Theoretical Throughput (ALOHA) = G*e-2G

    Theoretical Throughput (CSMA) = G*e-aG

    Theoretical Throughput (CSMA/CD) = 1/ (1+k*a)

    Where, a=no. of Nodes (N)*Bit Delay/no. of Packets (P)

    k is a factor determined by various parameters and generally varies from 3 to 6.

    OBSERVATIONS & GRAPHS:

    1. ALOHA:

    IPD(Inter

    Pkt Delay

    in ms)

    G-Practical

    Offered

    Load

    X-Practical

    throughpu

    t

    Theoretical

    throughput

    16000 0.2 0.15 0.1341

    8000 0.38 0.23 0.1777

    4000 0.444 0.22 0.1800

    2000 0.60 0.27 0.1807

    1000 1.03 0.23 0.1313

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    100 1.293 0.074 0.04

    40 1.53 0.26 0.0717

    Packet Length=1000 Bytes

    Duration of Experiment =100 Second

    Data rate = 8Kbps, No. of nodes = 4(3 senders and 1 receiver)

    Graph Obtained:

    2. CSMA:

    IPD(Inter

    Pkt Delayin ms)

    G-Practical

    OfferedLoad

    X-Practicalthroughput

    Theoreticalthroughput

    16000 0.28 0.22 0.2116

    8000 0.43 0.33 0.2797

    4000 0.83 0.39 0.3619

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    2000 1.24 0.4 0.3588

    1000 1.66 0.26 0.3156

    500 1.92 0.08 0.2815

    Packet Length=1000 Bytes

    Duration of Experiment = 100 Second

    Data rate = 8Kbps, No. of Nodes = 4 (all senders)

    Bit Delay = 2s so that a = N (No. of)* =1 thus, theoretical Throughput:- X=G*e-G

    Graph Obtained:

    3. CSMA/CD:

    IPD(Inter

    Pkt Delay

    in ms)

    G-Practical

    Offered

    Load

    X-Practical

    throughput

    16000 0.33 0.25

    8000 0.45 0.27

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    4000 0.86 0.6

    2000 0.98 0.86

    1000 1 0.97

    Graph Obtained:

    Packet Length = 1000 Bytes

    Duration of Experiment = 100 Second

    Data rate = 8Kbps, No. of Nodes = 4 (all senders)

    Calculation for Theoretical Throughput:-

    Theoretical Throughput = 1/(1+k*a)

    Where a = N (No. of Nodes)*Bit Delay/Packet Length

    Since bit delay is zero, Theoretical Throughput = 1.

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    RESULT & CONCLUSION: The functionality of LAN trainer kit and connections of nodes in

    a LAN configuration have been studied successfully. MAC layer algorithms like ALOHA,

    CSMA and CSMA/CD have been studied and graphs have been obtained showing Throughput

    v/s Offered Load.

    EXPERIMENT # 07

    Problem Statement: Implementation of flow control algorithms Stop and Wait, Sliding

    Window, GO Back N-ARQ for data transmission between nodes connected via LAN,

    Requirements:

    PC 2 No. (with NIU card plugged into them)

    LAN Trainer

    DB-37 Connectors

    Network Emulator Unit

    LAN Trainer Shell (to provide a menu-driven interface)

    C Library (to provide programming interface to the NIU)

    THEORY: In data communications, flow control is the process of managing the pacing of data

    transmission between two nodes to prevent a fast sender from outrunning a slow receiver. It

    provides a mechanism for the receiver to control the transmission speed, so that the receiving

    node is not overwhelmed with data from transmitting node. Flow control should be distinguished

    from congestion control, which is used for controlling the flow of data when congestion has

    actually occurred.

    STOP AND WAIT

    Stop-and-wait ARQ is a method used in telecommunications to send information between two

    connected devices. It ensures that information is not lost due to dropped packets and that packets

    35

    http://en.wikipedia.org/wiki/Data_communicationshttp://en.wikipedia.org/wiki/Congestion_controlhttp://en.wikipedia.org/wiki/Telecommunicationshttp://en.wikipedia.org/wiki/Data_communicationshttp://en.wikipedia.org/wiki/Congestion_controlhttp://en.wikipedia.org/wiki/Telecommunications
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    are in the correct order. It is the simplest kind ofautomatic repeat-request (ARQ) method. A

    stop-and-wait ARQ sender sends one frame at a time; it is a special case of the general sliding

    window protocol with both transmit and receive window sizes equal to 1. After sending each

    frame, the sender doesn't send any further frames until it receives an acknowledgement (ACK)

    signal. After receiving a good frame, the receiver sends an ACK. If the ACK does not reach the

    sender before a certain time, known as the timeout, the sender sends the same frame again.

    Typically the transmitter adds a redundancy checknumber to the end of each frame. The receiver

    uses the redundancy check number to check for possible damage. If the receiver sees that the

    frame is good, it sends an ACK. If the receiver sees that the frame is damaged, the receiver

    discards it and does not send an ACK, pretending that the frame was completely lost, not merely

    damaged.

    Stop-and-wait ARQ is inefficient compared to other ARQs, because the time between packets, if

    the ACK and the data are received successfully, is twice the transit time (assuming the turn-

    around time can be zero).

    SLIDING WINDOW

    A sliding window protocol is a feature of packet-based data transmissionprotocols. Sliding

    window protocols are used where reliable in-order delivery of packets is required, such as in

    the Data Link Layer(OSI model) as well as in the Transmission Control Protocol (TCP).

    Conceptually, each portion of the transmission (packets in most data link layers, but bytes in

    TCP) is assigned a unique consecutive sequence number, and the receiver uses the numbers to

    place received packets in the correct order, discarding duplicate packets and identifying missing

    ones.

    36

    http://en.wikipedia.org/wiki/Automatic_repeat-requesthttp://en.wikipedia.org/wiki/Frame_(telecommunications)http://en.wikipedia.org/wiki/Sliding_window_protocolhttp://en.wikipedia.org/wiki/Sliding_window_protocolhttp://en.wikipedia.org/wiki/Acknowledgement_(data_networks)http://en.wikipedia.org/wiki/Redundancy_checkhttp://en.wikipedia.org/wiki/Data_transmissionhttp://en.wikipedia.org/wiki/Protocol_(computing)http://en.wikipedia.org/wiki/Data_Link_Layerhttp://en.wikipedia.org/wiki/OSI_modelhttp://en.wikipedia.org/wiki/Transmission_Control_Protocolhttp://en.wikipedia.org/wiki/Automatic_repeat-requesthttp://en.wikipedia.org/wiki/Frame_(telecommunications)http://en.wikipedia.org/wiki/Sliding_window_protocolhttp://en.wikipedia.org/wiki/Sliding_window_protocolhttp://en.wikipedia.org/wiki/Acknowledgement_(data_networks)http://en.wikipedia.org/wiki/Redundancy_checkhttp://en.wikipedia.org/wiki/Data_transmissionhttp://en.wikipedia.org/wiki/Protocol_(computing)http://en.wikipedia.org/wiki/Data_Link_Layerhttp://en.wikipedia.org/wiki/OSI_modelhttp://en.wikipedia.org/wiki/Transmission_Control_Protocol
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    GO BACK N-ARQ

    Go-Back-N ARQ is a specific instance of the automatic repeat request (ARQ) protocol, in which

    the sending process continues to send a number offrames specified by a window size even

    without receiving an acknowledgement (ACK) packet from the receiver. It is a special case of

    the general sliding window protocol with the transmit window size of N and receive window size

    of 1.

    Go-Back-N ARQ is a more efficient use of a connection than Stop-and-wait ARQ, since unlike

    waiting for an acknowledgement for each packet, the connection is still being utilized as packets

    are being sent. In other words, during the time that would otherwise be spent waiting, more

    packets are being sent. However, this method also results in sending frames multiple times if

    any frame was lost or damaged, or the ACK acknowledging them was lost or damaged, then that

    frame and all following frames in the window (even if they were received without error) will be

    re-sent. To avoid this, Selective Repeat ARQ can be used.

    CONFIGURATION SETTINGS

    1. Network Emulator Unit:

    Data rates 8, 16, 32, 64,128, 256, 512Kbps, 1Mbps

    Topology Bus, Ring, Star (optional)

    Delay 0 to 15 bits between each pair of nodes

    Error Generators (between one pair of Bit Error 0 to 10-6

    37

    http://en.wikipedia.org/wiki/Automatic_repeat_requesthttp://en.wikipedia.org/wiki/Data_framehttp://en.wikipedia.org/wiki/Acknowledgement_(data_networks)http://en.wikipedia.org/wiki/Sliding_window_protocolhttp://en.wikipedia.org/wiki/Stop-and-wait_ARQhttp://en.wikipedia.org/wiki/Selective_Repeat_ARQhttp://en.wikipedia.org/wiki/Automatic_repeat_requesthttp://en.wikipedia.org/wiki/Data_framehttp://en.wikipedia.org/wiki/Acknowledgement_(data_networks)http://en.wikipedia.org/wiki/Sliding_window_protocolhttp://en.wikipedia.org/wiki/Stop-and-wait_ARQhttp://en.wikipedia.org/wiki/Selective_Repeat_ARQ
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    nodes) Frame Error 0 to 10-5

    Nodes 6 nodes per NEU (3 PCs can be connected

    per NEU. Each PC acts as 2 nodes)

    PC plug-in card 32 bit, 33MHz PCI Bus (PCI ver 2.0

    compliant)

    MAC Layer support ALOHA, CSMA, CSMA /CD

    Nodes 2 nodes per NIU

    2. Network Interface Unit:

    Configuration PC1 PC2

    Node ID 0 0

    Baud rate 8 Kbps(at both configuration

    menu and NEU)

    8 kbps( at both configuration

    menu and NEU)

    IPD(Inter Packet Delay) 2000ms 2000ms

    Protocol ALOHA ALOHA

    Duration 100s 100s

    Packet length 1000 bits 1000 bits

    Bit delay 0(at NEU) 0(at NEU)

    Direction Sender Sender

    My Address 1 2

    Time Out Time = 3000ms

    FORMULA USED:

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    OBSERVATIONS & GRAPHS

    1. STOP & WAIT PROTOCOL:

    Bit Error Rate No. of Transmitted

    Packets

    No. of Received Packets

    0 14 14

    1.00E-05 12 12

    1.00E-04 11 11

    1.00E+05 10 10

    1.00E-02 10 10

    1.00E-01 9 9

    Graph:

    2. SLIDING WINDOW PROTOCOL

    Observations:

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    Bit Error Rate No of Transmitted

    Packets

    No. of Received

    Packets

    14 14

    1.00E-04 12 12

    1.00E-02 10 10

    Graph:

    3. GO BACK-N PROTOCOL

    Observation Table:

    Time Out ( in No. of Transmitted No. of Received

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    ms) Packets Packets

    0 14 14

    1.00E-06 12 12

    1.00E-04 11 11

    1.00E-02 10 10

    Graph:

    RESULT & CONCLUSION:

    Flow Control algorithms e.g. Stop and Wait, Sliding Window, GO Back N for data transmission

    have been implemented between the connected nodes using the LAN Trainer Kit and graphs

    have been obtained showing Transmitted packets v/s BER.

    EXPERIMENT # 8

    Problem statement: Study and implementation of DS-SS modulation and demodulation through

    programming of CDMA kit.

    REGISTER SETTING FOR MODULATION:

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    1. Chip rate calculation:

    Chip rate = fchiprate*2^24/40MHZ

    Fclk = 40MHZ

    We have chip rate of 1MHZ,

    Chip rate = 1MHZ*2^24/40MHZ

    = 2^24/40

    = (419430) DEC

    = (066666) HEX

    = (06 66 66) HEX

    Register 0 - 66

    Register 1 - 66

    Register 2 - 06

    2. Spreading factor calculation:

    We take 1+x+x^4 as a generator polynomial

    i.e. N = 4 (maximum power of polynomial)

    Code period = (2^N)-1 = (2^4)-1 = 15

    We can write this = (00010010) DEC

    = (00 00 0F) HEX

    Register 3 - 0F

    Register 4 - 00

    Register 5 - 00

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    3. Code Selection:

    001 = Gold code = (01) H

    010 = MLS code = (02) H

    011 = Barker code = (03 )H

    Register 6 - MLS (02)

    4. Sequence generator polynomial: 1+x+x^4

    Register 7 - 09

    Register 8 - 00

    Register9 - 00

    Register 10, 11, 12 are changed when we use gold code or Barker code, for MLS these registers

    are set to 00

    5. Offset carrier frequency = fc*2^24/fsample_clk = REG13, REG14, REG15.

    6. Signal gain: maximum 255 = (FF) HEX = REG16

    7. Noise gain: AWGN

    Maximum 255 = (FF) HEX = REG17

    Minimum 0 = (00) HEX = REG17

    We take minimum (00) HEX

    8. For Spreading: (MODULATION)

    REG18 = (bit7, bit6, bit5, bit4, bit3, bit2, bit1, bit0)

    Bit0 for internal/external clock selection

    0 = internal clock

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    1 = external clock

    We select internal clock so set Bit0 to 0

    Bit1 for output sample format

    0 = 2s complement

    1 = unsigned

    We select Output sample format to unsigned so Bit1 set to 1

    Bit3-2 for Modulation scheme

    00 - BPSK

    01 = QPSK

    10 = OQPSK

    We select modulation to BPSK so Bit3-2 set to 00

    Bit5-4 for Test mode

    0- Disabled

    1- Pseudo random bit sequence (PBRS-11)

    10- un-modulated carrier

    We select Test mode as PRBS-11 so Bit5-4 set to 01

    Bit6 for Spectrum inversion

    Invert Q bit

    0-off

    1-on

    Bit7 for Interpolation

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    Interpolation to maximum clock rate

    0 = off

    1 = on

    REG18 = (1001 0010) = (92) HEX

    9. REGISTER 19 Setting:

    REG19 = (bit3, bit2, bit1, bit0)

    Bit- 0 for output data flow

    0 = output data is pushed to the next module

    1 = output data is pulled by next module

    We set this to 0

    Bit1 for input format

    0 = 1-bit serial

    1=2-bit parallel

    We set this to 0

    Bit-2 for output spectrum shaping filter enables/disable

    0 = disabled

    1 = enabled

    We set this to 1

    Bit-3 for Enable/Disable spectrum spreading

    0 = disabled

    1 = enabled

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    We set this to 1

    REG19 = (1100) = (0C) HEX

    Table: COM1012 DSSS MODULATOR REGISTERS (HEX)

    REG 0 66 REG 10 00

    REG 1 66 REG 11 00

    REG 2 06 REG 12 00

    REG 3 0F REG 13 00

    REG 4 00 REG 14 00

    REG 5 00 REG 15 00

    REG 6 02 REG 16 00

    REG 7 09 REG 17 00

    REG 8 00 REG 18 92

    REG 9 00 REG 19 0C

    REGISTER SETTING FOR DEMODULATION:

    Chip rate calculation:

    1. Chip rate = fchiprate*2^24/40MHZ

    Fclk = 40MHZ

    We have chip rate of 1MHZ,

    Chip rate = 1MHZ*2^24/40MHZ

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    = 2^24/40

    = (419430) DEC

    = (066666) HEX

    = (06 66 66) HEX

    Register 0 - 66

    Register1 - 66

    Register2 - 06

    2. Spreading factor calculation:

    We take 1+x+x^4 as a generator polynomial

    i.e. N = 4(maximum power of polynomial)

    Code period = (2^N)-1 = (2^4)-1 = 15

    It can be written as = (00010010) DEC

    = (00 00 0F) HEX

    Register 3 - 0F

    Register4 - 00

    Register5 - 00

    3. Code Selection:

    001 = Gold code = (01) H

    010 = MLS code = (02) H

    011= Barker code = (03) H

    Register 6 we set to MLS code - 02

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    4. Sequence generator polynomial: 1+x+x^4

    Register 7 - 09

    Register8 - 00

    Register9 - 00

    Register 10, 11, 12 are changed when we use gold code or Barker code, for MLS these registers

    are set to 00

    5. Nominal carrier frequency (NCCF) = fc*2^24/fchiprate = REG13, REG14, REG15.

    6. Register Setting For REG 16.

    REG16 (bit7, bit6, bit5, bit4, bit3, bit2, bit1, bit0)

    Bit0 = 0 (always)

    Bit1 for input sample format

    0 = 2s complement

    1 = unsigned

    Bit3-2 for Carrier frequency loop gain

    00 = nominal

    01 = 2*loop gain

    10 = 4*loop gain

    11 = 8*loop gain

    Bit4 Reserved so always 0

    Bit5 for spectrum inversion

    Invert Q bit

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    0 = off

    1 = on

    We select invert off i.e. 0

    Bit 6 always 0

    Bit7 0 (Freeze)

    Now REG16 = (0 0 0 0 0 0 1 0) BIN = (02) HEX

    7. Register Setting for REG 17

    REG17 = (bit3, bit2, bit1, bit0)

    Bit1-0 is for output sample format

    00 = I/Q parallel

    01 = I/Q serial (never use with BPSK as there is no information data on the Q channel)

    Bit3-2 for demodulation scheme

    00 = BPSK

    01 = QPSK

    REG17 = (0 0 0 1) = (01) HEX

    Table: COM1012 DSSS DEMODULATOR REGISTERS (HEX)

    REG 0 66 REG 10 00

    REG 1 66 REG 11 00

    REG 2 06 REG 12 00

    REG 3 0F REG 13 00

    REG 4 00 REG 14 00

    REG 5 00 REG 15 00

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    REG 6 02 REG 16 02

    REG 7 09 REG 17 01

    REG 8 00

    REG 9 00

    RESULT & CONCLUSION: The implementation of DS-SS modulation and demodulation

    through programming of CDMA kit have been studied and graphs have been traced.

    EXPERIMENT # 09

    Problem statement: Addition of AWGN to the signal and evaluation of BER performance

    BPSK/QPSK DSSS signal.

    # Register setting for BPSK with addition of AWGN:

    1. Chip rate calculation:

    Chip rate = fchiprate*2^24/40MHZ

    Fclk = 40MHZ

    We have chip rate of 1MHZ,

    Chip rate = 1MHZ*2^24/40MHZ

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    = 2^24/40

    = (419430) DEC

    = (066666) HEX

    = (06 66 66) HEX

    Register 0- 66

    Register1- 66

    Register2- 06

    2. Spreading factor calculation:

    We take 1+x+x^4 as a generator polynomial

    i.e. N = 4 (maximum power of polynomial)

    Code period = (2^N)-1 = (2^4)-1 = 15

    Can be written as = (00010010) DEC

    = (00 00 0F) HEX

    Register 3- 0F

    Register4-00

    Register5-00

    3. Code Selection:

    001 = Gold code = (01) H

    010 = MLS code = (02) H

    011 = Barker code = (03) H

    Register 6 we set to MLS code - 02

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    4. Sequence generator polynomial :1+x+x^4

    Register 7- 09

    Register8-00

    Register9-00

    Register 10, 11, 12 are changed when we use gold code or Barker code, for MLS these registers

    are set to 00

    5. Offset carrier frequency = fc*2^24/fsample_clk=REG13, REG14, REG15.

    6. Signal gain: maximum 255=(FF)HEX=REG16

    7. Noise gain: AWGN

    Maximum 255 = (FF) HEX = REG17

    Minimum 0 = (00) HEX = REG17

    We take maximum (FF) HEX

    8. For Spreading: (MODULATION)

    REG18=(bit7,bit6,bit5,bit4,bit3,bit2,bit1,bit0)

    Bit0 for internal/external clock selection

    0 = internal clock

    1 = external clock

    We select internal clock so set Bit0 to 0

    Bit1 for output sample format

    0 = 2s complement

    1 = unsigned

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    We select Output sample format to unsigned so Bit1 set to 1

    Bit3-2 for Modulation scheme

    0- BPSK

    01 = QPSK

    10 = OQPSK

    We select modulation to BPSK so Bit3-2 set to 00

    Bit5- 4 for Test mode

    0- Disabled

    1- Pseudo random bit sequence (PBRS-11)

    10- unmodulated carrier

    We select Test mode as PRBS-11 so Bit5-4 set to 01

    Bit6 for Spectrum inversion

    Invert Q bit

    0- off

    1- on

    Bit7 for Interpolation

    Interpolation to maximum clock rate

    0 = Off

    1 = on

    REG18 = (1001 0010) = (92) HEX

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    9. REGISTER 19 Setting:

    REG19 = (bit3, bit2, bit1, bit0)

    Bit0 for output data flow

    0 = Output data is pushed to the next module

    1 = output data is pulled by next module

    We set this to 0

    Bit1 for input format

    0 = 1-bit serial

    1 = 2-bit parallel

    We set this to 0

    Bit2 for output spectrum shaping filter enables/disable

    0 = disabled

    1 = e nabled

    We set this to 1

    Bit3 for Enable/Disable spectrum spreading

    0 = disabled

    1 = enabled

    We set this to 1

    REG19 = (1100) = (0C) HEX

    Table: COM1012 DSSS MODULATOR REGISTERS (HEX)

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    REG 0 66 REG 10 00

    REG 1 66 REG 11 00

    REG 2 06 REG 12 00

    REG 3 0F REG 13 00

    REG 4 00 REG 14 00

    REG 5 00 REG 15 00

    REG 6 02 REG 16 00

    REG 7 09 REG 17 FF

    REG 8 00 REG 18 92

    REG 9 00 REG 19 0C

    Register setting for QPSK with addition of AWGN

    1. Chip rate calculation:

    Chip rate = fchiprate*2^24/40MHZ

    Fclk = 40MHZ

    We have chip rate of 1MHZ,

    Chip rate = 1MHZ*2^24/40MHZ

    = 2^24/40

    = (419430) DEC

    = (066666) HEX

    = (06 66 66) HEX

    Register 0- 66

    Register1- 66

    Register2- 06

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    2. Spreading factor calculation:

    We take 1+x+x^4 as a generator polynomial

    i.e. N = 4 (maximum power of polynomial)

    Code period = (2^N)-1=(2^4)-1=15

    we can write this = (00010010)DEC

    = (00 00 0F)HEX

    Register 3- 0F

    Register4- 00

    Register5- 00

    3. Code Selection:

    001 = Gold code = (01) H

    010 = MLS code = (02) H

    011 = Barker code = (03) H

    Register 6- 01

    4. Sequence generator polynomial: 1+x+x^4

    5. Register 7- 00

    6. Register8- 00

    7. Register9- 09

    Register 10, 11, 12 are changed when we use gold code or Barker code, for MLS these registers

    are set to 00

    8. Offset carrier frequency = fc*2^24/fsample_clk=REG13, REG14, REG15.

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    9. Signal gain: maximum 255 = (FF) HEX = REG16

    10. Noise gain: AWGN

    Maximum 255 = (FF) HEX = REG17

    Minimum 0 = (00) HEX = REG17

    We take maximum (FF) HEX

    11. For Spreading (MODULATION)

    REG18 = (bit, bit6, bit5, bit4, bit3, bit2, bit1, bit0)

    Bit0 for internal/external clock selection

    0 = internal clock

    1 = external clock

    We select internal clock so set Bit0 to 0

    Bit1 for output sample format

    0 = 2s complement

    1 = unsigned

    We select Output sample format to unsigned so Bit1 set to 1

    Bit3-2 for Modulation scheme

    0- BPSK

    1- QPSK

    10- QPSK

    We select modulation to BPSK so Bit3-2 set to 01

    Bit5-4 for Test mode

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    0- Disabled

    1- Pseudo random bit sequence (PBRS-11)

    10- unmodulated carrier

    We select Test mode as PRBS-11 so Bit5-4 set to 01

    Bit6 for Spectrum inversion

    Invert Q bit

    0- off

    1- on

    Bit7 for Interpolation

    Interpolation to maximum clock rate

    0 = Off

    1 = on

    REG18 = (1001 0110) = (96) HEX

    12. REGISTER 19 Setting:

    REG19 = (bit3, bit2, bit1, bit0)

    Bit0 for output data flow

    0 = Output data is pushed to the next module

    1 = output data is pulled by next module

    We set this to 0

    Bit1 for input format

    0 = 1-bit serial

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    1 = 2-bit parallel

    We set this to 0

    Bit2 for output spectrum shaping filter enables/disable

    0 = disabled

    1 = enabled

    We set this to 1

    Bit3 for Enable/Disable spectrum spreading

    0 = disabled

    1 = enabled

    We set this to 1

    REG19 = (1100) = (0C) HEX

    Table: COM1012 DSSS MODULATOR REGISTERS (HEX)

    REG 0 66 REG 10 00

    REG 1 66 REG 11 00

    REG 2 06 REG 12 00

    REG 3 0F REG 13 00

    REG 4 00 REG 14 00

    REG 5 00 REG 15 00

    REG 6 02 REG 16 FF

    REG 7 09 REG 17 00

    REG 8 00 REG 18 96

    REG 9 00 REG 19 0C

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    RESULT & CONCLUSION: Addition of AWGN to BPSK and QPSK DSSS signal has been

    performed and graphs have been obtained.