741 op-amp
DESCRIPTION
741 Op-Amp. Where we are going:. Why do this?. V out. Higher Linearity Possible Stability. V in. Circuit Element. Why not do this? g m. GND. GND. Lower Bandwidth Higher Noise / D f. Source Degeneration. V out. V in. GND. GND. Source Degeneration. V out. - PowerPoint PPT PresentationTRANSCRIPT
741 Op-AmpWhere we are going:
Source Degeneration
GND
Vout
Vin
GND
Vout
Vin
CircuitElement
Why do this?
• Higher Linearity• Possible Stability
Why not do this? gm
• Lower Bandwidth• Higher Noise / f
Source Degeneration
GND
Vout
Vin
GND
Vout
Vin
V1
Neglect VA of Q1 and assume matched devices:
Q1
II = Ieo e
V1 /UT = Ieo e(Vin - V1 + Vout/Av )/UT
2 V1 = Vin + Vout / Av
I = Ieo e(Vin + Vout/Av )/(2 UT)
A similar result for MOSFETs
Common Emitter
Amplifies the input signal at the output
Ibias 100A
Vdd
GND
Vout
Vin
Common Emitter / Common Source
Assuming an ideal current source:
Ibias = Ico eVin/UT eVout /VA
Vout = -VA ln(Ibias/Ico) + ( VA / UT) Vin
Common Drain
Amplifies the input signal at the output
Vout = ( VA / UT) Vin
Ibias = Ibias eVin/UT eVout/VA
100pA
Vdd
GND
Vout
Vin
Ibias
Input conductance = 0
Common Drain
We must account for the other current source:
Vout = ( (VAn // VAp) UT) Vin
Id = Ibias e-Vout/VAp
= Ibias eVin/UT eVout/VAn
Vb
Vdd
GND
Vout
M6
M7Vin
Ibias
Common-Drain: Amplifier Measurements
V1
GND
Ibias
Vdd
GND
Vout
Mb
M6
M7
Common Drain
What about above-threshold operation:
Amplifies the input signal at the output
Ibias = (K/2) ( Vin - VT )2 (1 + (Vout/VA) )
100A
Vdd
GND
Vout
Vin
Ibias
Operating region decreases (Vout > Vin - VT)
Derive using quadratic functions:
Vout = VA( - 1)
Common E / S: Resistive Load
High-Gain Amplifier ExperimentsLoad-line Analysis
Common Base
Amplifies the input signal at the output (non-inverting gain)
Ibias 100A
Vdd
Vout
Vin
Common Base / Common Gate
Assuming an ideal current source:
Ibias = Ico e (Vb -Vin )/UT eVout /VA
Vout = -VA ln(Ibias/Ico) + (VA / UT) Vin (VA / UT) Vb
Vb
Gain = VA / UT = Av
Common Gate
Using a subthreshold MOSFET :
100pA
Vdd
Vout
Ibias
Vin
Vb
Ibias = Io e (Vb -Vin )/UT eVout /VA
Vout = -VA ln(Ibias/Io) + (VA / UT) Vin ( VA / UT) Vb
Gain = VA / UT = Av
Problem: Large input current
Common G: Resistive Load
Cascode CircuitsUse a common-gate/base transistor to: 1. Improve the output resistance of another transistor.2. Reduce the Gate-to-Drain capacitance effect of another transistor.
Input resistance of common-gate is low Source is nearly fixed if connected to the drain of a transistor
Vdrain
Vin
GND
V1
Vgate
Cascode CircuitsVdrain
Vbias
GND
V1
Vgate
Fixes the voltage at V1 or isolates V1 from the output
GND
Vgate
Vdrain
Idrain = Io e (Vbias -V1 )/UT eVdrain /VA
= Io e Vgate/UT eV1 /VA V1 ~ Vbias - Vgate + (UT/VA) Vdrain
Drain is fixed
Idrain = Io e Vgate/UT e Vbias /VA eVdrain / (Av VA )
Cascode Common-Drain Amp
GND
Ibias
VbMb
GND
V1
Vdd
Vout
biasp
biasn
One Pole
HighOutput
Resistance / DC Gain
BJT Cascode Configuration
MOS Cascode Circuit
BJT - CMOS Cascode Circuits
Preserve High-gm/I
Cascade Configurations
Cascade Connection: Rout
BJT-MOS Cascades
A good way to get zero base current….
Cascades: More stuff