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708 IEEE TRANSACTIONS ON COMPONENTS, PACKAGING AND MANUFACTURING TECHNOLOGY, VOL. 4, NO. 4, APRIL 2014 FDFD Modeling of Signal Paths With TSVs in Silicon Interposer Biancun Xie and Madhavan Swaminathan, Fellow, IEEE Abstract— This paper proposes an efficient method to model signal paths with through-silicon vias (TSVs) in silicon interposer for 3-D systems. The proposed method utilizes 3-D finite-difference frequency-domain (FDFD) method to model the redistribution layer transmission lines to capture the parasitic effects of multiple transmission lines on lossy silicon interposer. TSVs are modeled using an integral equation based solver, which uses cylindrical modal basis functions. A new formulation on incorporating multiport network into 3-D FDFD formulation is presented to include the parasitic effects of TSV arrays into the system matrix. The overall matrix is divided into several subdo- mains and solved by a divide-and-conquer approach in a parallel manner. The accuracy and efficiency of the proposed method are validated by comparing with 3-D full-wave simulations. Index Terms— 3-D finite-difference frequency domain (FDFD), divide and conquer, multiport network, redistribution layer (RDL), silicon interposer, through-silicon via (TSV). I. I NTRODUCTION T HREE-DIMENSIONAL (3-D) system integration is becoming a promising technology to be able to vertically stack multiple dies using through-silicon vias (TSVs). TSV technology for signal path design can provide shorter inter- connection length, which can result in low wire delay, less parasitic effects, and higher clock frequency [1]–[3], thereby improving the overall system performance. In addition, it is possible with 3-D heterogeneous integration to stack different functional modules including memory, MEMS, antennas, RF, analog/digital into a package. Among all the components in the 3-D system, as shown in Fig. 1, the silicon interposer with TSVs and redistribution layer (RDL) traces is a key enabler and thus needs to be carefully designed to achieve optimal system performance [4]. Silicon interposer is a silicon substrate that routes many interconnects with hundreds of TSVs compactly packed on both sides. However, the silicon substrate is not an ideal medium for signal transmission since the interconnections and TSVs are exposed to additional losses due to leakage. Moreover, hundreds of interconnects routed with fine pitch on silicon substrate will cause enhanced coupling between signal lines, which can introduce distortion. The insulating oxide layer around TSVs and below the RDL traces also influence Manuscript received June 16, 2013; revised October 4, 2013; accepted December 18, 2013. Date of publication January 28, 2014; date of current version March 28, 2014. This work was supported by the National Science Foundation under Grant CMMI-1129918. Recommended for publication by Associate Editor D. G. Kam upon evaluation of reviewers’ comments. The authors are with the Interconnect and Packing Center, School of Elec- trical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA 30332 USA (e-mail: [email protected]; [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TCPMT.2013.2297154 Fig. 1. Silicon interposer with TSVs and RDL traces in 3-D system. the characteristics of interconnections, causing frequency- dependent parasitic effects. These complex electrical behaviors make the electrical design of the signal paths on silicon inter- poser challenging, especially when there are a large number of TSVs and RDL traces with high density. Therefore, modeling the interconnect response of high-density signal paths with TSVs in silicon interposer is becoming a critical task. In the past, several TSV modeling approaches have been proposed. A lumped element based method is presented in [5] using RLCG element to form the equivalent circuit model of TSVs. Although this method is efficient and can obtain reasonable results, extending this method to TSV arrays of high density can be difficult. Therefore, a full-wave analysis is needed to obtain the responses of multiple TSVs as in arrays. Due to the multiscale dimensions of TSVs [with oxide thickness less than one micrometer and aspect ratio of 1:20 (or higher)], the number of mesh elements to approximate TSVs can be so large that it can consume large computational time and memory. This problem has been addressed in [6] and [7] using modal basis functions [8], [9] to model TSV structures. Since only a small number of global basis functions are used, this method can be used to model and analyze the coupling in large TSV arrays [10], [11]. However, this method does not include the effect of RDL layers. Although several recent works [12]–[14] have addressed the modeling of RDL layers and TSVs, these methods have been mostly analytical and limited to a few interconnects. To address the problem of analyzing a large number of RDL and TSVs, this paper proposes an efficient approach using the finite-difference frequency domain (FDFD) approach [15], [16] coupled with the integral equation based method where the latter is applied to TSVs. A new formulation for incorporating multiport network into 3-D FDFD is presented. Using this formulation, the TSVs that typically require a large number of mesh elements to approximate can be modeled 2156-3950 © 2014 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.

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Page 1: 708 IEEE TRANSACTIONS ON COMPONENTS, PACKAGING …epsilon.ece.gatech.edu/publications/2014/FDFD.pdfFDTD, FEM, or M-FDM [28], there is no previous work incorporating multiport network

708 IEEE TRANSACTIONS ON COMPONENTS, PACKAGING AND MANUFACTURING TECHNOLOGY, VOL. 4, NO. 4, APRIL 2014

FDFD Modeling of Signal Paths WithTSVs in Silicon InterposerBiancun Xie and Madhavan Swaminathan, Fellow, IEEE

Abstract— This paper proposes an efficient method tomodel signal paths with through-silicon vias (TSVs) in siliconinterposer for 3-D systems. The proposed method utilizes 3-Dfinite-difference frequency-domain (FDFD) method to model theredistribution layer transmission lines to capture the parasiticeffects of multiple transmission lines on lossy silicon interposer.TSVs are modeled using an integral equation based solver, whichuses cylindrical modal basis functions. A new formulation onincorporating multiport network into 3-D FDFD formulation ispresented to include the parasitic effects of TSV arrays into thesystem matrix. The overall matrix is divided into several subdo-mains and solved by a divide-and-conquer approach in a parallelmanner. The accuracy and efficiency of the proposed methodare validated by comparing with 3-D full-wave simulations.

Index Terms— 3-D finite-difference frequency domain (FDFD),divide and conquer, multiport network, redistribution layer(RDL), silicon interposer, through-silicon via (TSV).

I. INTRODUCTION

THREE-DIMENSIONAL (3-D) system integration isbecoming a promising technology to be able to vertically

stack multiple dies using through-silicon vias (TSVs). TSVtechnology for signal path design can provide shorter inter-connection length, which can result in low wire delay, lessparasitic effects, and higher clock frequency [1]–[3], therebyimproving the overall system performance. In addition, it ispossible with 3-D heterogeneous integration to stack differentfunctional modules including memory, MEMS, antennas, RF,analog/digital into a package. Among all the components inthe 3-D system, as shown in Fig. 1, the silicon interposer withTSVs and redistribution layer (RDL) traces is a key enablerand thus needs to be carefully designed to achieve optimalsystem performance [4].

Silicon interposer is a silicon substrate that routes manyinterconnects with hundreds of TSVs compactly packed onboth sides. However, the silicon substrate is not an idealmedium for signal transmission since the interconnectionsand TSVs are exposed to additional losses due to leakage.Moreover, hundreds of interconnects routed with fine pitch onsilicon substrate will cause enhanced coupling between signallines, which can introduce distortion. The insulating oxidelayer around TSVs and below the RDL traces also influence

Manuscript received June 16, 2013; revised October 4, 2013; acceptedDecember 18, 2013. Date of publication January 28, 2014; date of currentversion March 28, 2014. This work was supported by the National ScienceFoundation under Grant CMMI-1129918. Recommended for publication byAssociate Editor D. G. Kam upon evaluation of reviewers’ comments.

The authors are with the Interconnect and Packing Center, School of Elec-trical and Computer Engineering, Georgia Institute of Technology, Atlanta,GA 30332 USA (e-mail: [email protected]; [email protected]).

Color versions of one or more of the figures in this paper are availableonline at http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/TCPMT.2013.2297154

Fig. 1. Silicon interposer with TSVs and RDL traces in 3-D system.

the characteristics of interconnections, causing frequency-dependent parasitic effects. These complex electrical behaviorsmake the electrical design of the signal paths on silicon inter-poser challenging, especially when there are a large number ofTSVs and RDL traces with high density. Therefore, modelingthe interconnect response of high-density signal paths withTSVs in silicon interposer is becoming a critical task.

In the past, several TSV modeling approaches have beenproposed. A lumped element based method is presented in [5]using RLCG element to form the equivalent circuit modelof TSVs. Although this method is efficient and can obtainreasonable results, extending this method to TSV arrays ofhigh density can be difficult. Therefore, a full-wave analysisis needed to obtain the responses of multiple TSVs as inarrays. Due to the multiscale dimensions of TSVs [with oxidethickness less than one micrometer and aspect ratio of 1:20 (orhigher)], the number of mesh elements to approximate TSVscan be so large that it can consume large computational timeand memory. This problem has been addressed in [6] and [7]using modal basis functions [8], [9] to model TSV structures.Since only a small number of global basis functions are used,this method can be used to model and analyze the couplingin large TSV arrays [10], [11]. However, this method doesnot include the effect of RDL layers. Although several recentworks [12]–[14] have addressed the modeling of RDL layersand TSVs, these methods have been mostly analytical andlimited to a few interconnects.

To address the problem of analyzing a large number ofRDL and TSVs, this paper proposes an efficient approachusing the finite-difference frequency domain (FDFD) approach[15], [16] coupled with the integral equation based methodwhere the latter is applied to TSVs. A new formulation forincorporating multiport network into 3-D FDFD is presented.Using this formulation, the TSVs that typically require a largenumber of mesh elements to approximate can be modeled

2156-3950 © 2014 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.

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XIE AND SWAMINATHAN: FDFD MODELING OF SIGNAL PATHS 709

separately and later incorporated into FDFD modeling ofRDL traces. A divide-and-conquer formulation with paral-lel computing extended from [17] and [18] is presented tosolve the complex system. Details on handling the couplingbetween subdomains due to the coupling between TSVs areprovided in this formulation. Therefore, the subdomains canbe solved simultaneously. The efficiency of this approachhas been compared with direct solver and iterative quasi-minimal residual (QMR) method [15], [19]. It should be notedthat the RDL transmission lines of 20–40 μm in width and5–10 μm in thickness are used in this paper [12], [20].The dc resistance of a 10-mm-long transmission line withsuch dimensions is only about 0.5–3 �, which is very smallcompared with the resistance caused by the heavily doped sili-con substrate with conductivity in the range 10–100 S/m [21].In addition, the sidewall coupling due to the thickness of theconductor is very small provided that RDL traces are on lossysilicon substrate [22]. Therefore, the conductors for RDL layermodeling are chosen to have zero resistivity and thicknessin the proposed approach. It is important to note that theseapproximations are still valid when the linewidth is scaled to3∼4 μm with aspect ratio larger than 4:1.

The major contributions of this paper are as follows.1) A new formulation for incorporating multiport net-

work with Y -parameters into 3-D FDFD is presented.Although several previous works [23]–[27] have devel-oped the formulation on incorporating Y -parameters intoFDTD, FEM, or M-FDM [28], there is no previous workincorporating multiport network into 3-D FDFD method.

2) Extend the divide-and-conquer formulation [17], [18]to handle multiport network incorporated into FDFD.Since TSVs are incorporated into FDFD as a multiportnetwork, details on handling the coupling between sub-domains due to TSV coupling are presented.

This paper is organized as follows. Section II providesthe details of the formulation for modeling the signal pathsincluding RDL traces and TSVs. Section III presents thedivide-and-conquer approach used to solve the system matrix.To validate the accuracy and efficiency of the proposedmethod, Section IV presents several RDL transmission lineswith TSV transition modeling examples and their comparisonwith 3-D full-wave EM solver. Finally, the conclusion isprovided in Section V.

II. MODELING OF SIGNAL PATHS IN SILICON INTERPOSER

In this section, the basic formulation for the interconnectproblem is presented. As shown in Fig. 2, the interconnectproblem is split into two separate problems: 1) modeling ofmultiple RDL transmission lines on lossy silicon substrateusing FDFD and 2) modeling of TSV arrays. The TSV arraysare modeled using the integral equation based solver [6] andincorporated into FDFD solver as a multiport network.

A. Modeling of TSVs

TSVs can be modeled using global cylindrical modalbasis functions to solve Maxwell’s equation in integral form.This approach can generate equivalent RLCG models of

Fig. 2. Decomposition of the signal path problem into two problems.

Fig. 3. Modeling procedure for 2 × 2 TSV arrays.

TSV arrays by classifying the TSV structure into the followingthree parts: 1) conductor series resistance and inductance(R and L), which can be extracted by solving electricalfield integral equation (EFIE) using conduction mode basisfunctions; 2) substrate parallel conductance and capacitance(Gsi and Csi) and capacitance, which can be extracted by solv-ing scalar potential equation using cylindrical accumulationmode basis functions; and 3) oxide liner excess capacitance(Cox), which can be extracted by solving EFIE in the oxideliner region using polarization mode basis functions. Themodeling procedure for a 2 ×2 TSV array is shown in Fig. 3.Details of the modeling procedure are presented in [6], [8],and [9].

B. Modeling of Multiple RDL Transmission Lines on LossySilicon Substrate

FDFD is utilized to model the arbitrary routing of theRDL traces on the silicon interposer. The FDFD formulationis based on the susceptance element equivalent circuitsolver [16], which solves Maxwell’s equation using theYee grid [29]. The formulation is briefly discussed in thissection.

The differential form of Maxwell’s equation in the fre-quency domain can be written as

∇ × −→H = jω

−→D + σ

−→E + −→

J s (1a)

∇ × −→E = − jω

−→B (1b)

∇ · −→D = ρ (1c)

∇ · −→B = 0 (1d)

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710 IEEE TRANSACTIONS ON COMPONENTS, PACKAGING AND MANUFACTURING TECHNOLOGY, VOL. 4, NO. 4, APRIL 2014

where−→E and

−→H are the electric and magnetic field vectors,

respectively,−→D and

−→H are the related field/flux density

vectors, respectively,−→J is the external current density source

vector, ω is the frequency in radians, σ is the position-dependent conductivity of the medium, and ρ is the electriccharge density. The above vector equations for an isotropicinhomogeneous medium can be written in scalar form in3-D as

jωεEx = ∂ Hz

∂y− ∂ Hy

∂z− σ Ex (2)

jωεEy = ∂ Hx

∂z− ∂ Hz

∂x− σ Ey (3)

jωεEz = ∂ Hy

∂x− ∂ Hx

∂y− σ Ez (4)

jωμHx = −(

∂ Ez

∂y− ∂ Ey

∂z

)(5)

jωμHy = −(

∂ Ex

∂z− ∂ Ez

∂x

)(6)

jωμHz = −(

∂ Ey

∂x− ∂ Ex

∂y

). (7)

Substituting for the magnetic fields in the electric fieldequations (5)–(7), and discretizing the above equation usingthe Yee grid, the following equation can be obtained:(

G + sC + �

s

)E = BI (8)

where G, C, � ∈ �P×P represent the coefficient matricesfor the given system, E ∈ C P represents the vector ofthe unknown electrical field, B ∈ �P×N is the selectormatrix for the excitation matrix I ∈ �N×N , P is the num-ber of unknowns, N is the number of ports, and s is theLaplace variable. Essentially, (8) is the nodal analysis form ofMaxwell’s equation. Perfect magnetic conductor and perfectelectric conductor conditions are enforced by opening andshorting nodal points along the boundaries of the simulationdomain, respectively.

The benefits of using FDFD are that it can model irregularrouting of RDL traces on silicon interposer and can capturethe different modes (slow-wave mode and quasi-TEM mode)of the signal traces on Si–SiO2 double-layer system [30].

C. Integration of TSVs and RDL Traces

The cylindrical TSV structure requires a large number ofmesh elements to approximate if it uses the rectangular gridsin FDFD; therefore, the responses of TSV arrays obtainedusing integral equation based solver can be incorporated intoFDFD modeling of RDL traces as a multiport network withY -parameters to obtain the system-level response of the RDLtraces and TSVs in silicon interposer, as shown in Fig. 4.

The multiport network with Y -parameters can be describedusing the dependent currents Ii and voltages Vi according tothe following equation:

Ii (V1, V2 · · · VN ) =N∑

j=1

Yi j Vj i = 1 ∼ N (9)

Fig. 4. Incorporating multiport network into 3-D FDFD.

Fig. 5. Cross-sectional view of port i occupies multiple cells in FDFD Yeegrid. Each dot represents an FDFD node and current source representing port imust be applied between of FDFD node, as shown.

where index i represents port index of the multiport networkand N represents the total number of ports. Each port of themultiport network may occupy multiple grids in the Yee grid,as shown in Fig. 5, where port i is represented by a currentsource Ii flowing along h-direction. In the Yee grid, thevoltage Vj can be written in terms of h-component of electricfield Eh as

Vj =j∑

h=ref

Eh�h (10)

where ref represents the voltage reference node in the Yeegrid. After substituting (10) into (9), the current source Ii

expressed as current density can be obtained as

Ji (V1, . . . , VN ) = Ii (V1, . . . , VN )

Area=

N∑j=1

Yi j

j∑h=ref

Eh�h

Area(11)

where Area is the cross-sectional area of the Yee cell. At eachport i of the multiport network, the equivalent current sourceJi (V1, . . . , VN ) must be applied to all these FDFD nodes fromthe reference node [x(i), y(i), ref(i)] to port definition node[x(i), y(i), K (i)] along the h-direction in the Yee grid, asshown in Fig. 5. This can be described as the matrix operationexpressed in Fig. 6, where A = G + sC + �/s ∈ �P×P

is the system matrix obtained using FDFD before themultiport network is incorporated, Asys ∈ �P×P is the overallsystem matrix after the multiport network is incorporated,P is the number of unknowns, [x(i), y(i), ref(i) + m],[x(i), y(i), K (i) − n] represent the column (row) number ofthe matrix where the current density Ji must be stamped, andN is the total number of ports.

The benefit of using this approach is that the TSVs, whichare cylindrical and require a large number of mesh elements to

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XIE AND SWAMINATHAN: FDFD MODELING OF SIGNAL PATHS 711

Fig. 6. Matrix operation for incorporating multiport network into 3-D FDFD.

Fig. 7. RDL traces and TSVs in silicon interposer. Dot lines show how thesubdomains are created.

Fig. 8. M subdomains of the silicon interposer shown in Fig. 7.

approximate using FDFD, can be modeled separately and laterincorporated into the FDFD simulation as a multiport network.The accuracy of this approach is validated in Section IV.

III. DIVIDE-AND-CONQUER METHOD

In this section, a divide-and-conquer method using parallelcomputing is presented to solve the system matrix equation

AsysE = BI (12)

where B and I take the same meaning as in (8). The formu-lation for the divide-and-conquer approach is extended from[17] and [18] to solve the interconnect problem where TSVsare incorporated as a multiport network, and therefore there iscoupling between subdomains due to coupling between TSVs.

The RDL traces and TSV transition structure shown inFig. 7 are denoted as � with boundary ∂�. This structure

Fig. 9. Coupling between two subdomains due to the coupling betweenTSVs.

can be divided into M subdomains �i and M interfaces �i ,as shown in Fig. 8. The interfaces should not overlap with thelocations of TSVs since TSVs are incorporated as a multiportnetwork. The subdomains can be created arbitrarily providedthat the interfaces do not overlap with the locations of TSVs.The subdomain is denoted as �i−v if there are TSVs in thissubdomain. The interface between the subdomains is definedas �i = ∂�i ∩ ∂� j . As a result, the following equations mustbe satisfied for the completeness of the entire domain �:

� = �1∪, . . . ,∪�i−v, . . . ,∪�M ∪ � (13)

where � = �1∪, . . . ,∪�M

�i ∩ � j = ∅ and �i ∩ � j = ∅ when i = j. (14)

According to the definitions in (13) and (14), there are twotypes of subdomains: 1) subdomains without TSVs (denotedas �i ), where there is no direct coupling of this subdomainto other subdomains since the coupling is stored as interfaces�i and 2) subdomains with TSVs (denoted as �i−v), wherethe coupling of this subdomain to other subdomains still existsdue to coupling between TSVs, as shown in Fig. 9.

The coupling is induced by the unknowns in the nodes(denoted as i−v), where the current density Ji (V1, . . . , VN )in (11) has been applied, as shown in Fig. 10. To utilizethe divide-and-conquer and parallel computing method tosolve each subdomain simultaneously, there should be no

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712 IEEE TRANSACTIONS ON COMPONENTS, PACKAGING AND MANUFACTURING TECHNOLOGY, VOL. 4, NO. 4, APRIL 2014

Fig. 10. Cross-sectional view of two subdomains with TSVs in the FDFDgrid. Triangle dots: interface unknowns between subdomains. X-shaped dots:the unknowns that introduce coupling due to TSVs.

coupling between subdomains. Therefore, the unknowns ini−v are removed from subdomains �i−v and placed into thecorresponding interface unknowns �i−v. As a result, (13) and(14) can be rewritten as

� = �1∪, . . . ,∪(�i−v − i−v), . . . ,∪�M ∪ � (15)

where � = �1∪, . . . ,∪(�i−v + i−v), . . . ,∪�M

�i ∩ � j = ∅ and �i ∩ � j = ∅ when i = j. (16)

The unknowns, namely the field variables on the grids, arereordered starting with the ones in subdomains �1, followedby those in �2, . . . , �i−v − i−v, . . . , �M , and ending withthose on interfaces �, as defined in (15) and (16). Afterreordering, the matrix, (12) can be converted to the matrixequation

⎡⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎣

A11 C1A22 C2

. . ....

Aii−v Ci−v. . .

...AM M CM

CT1 CT

2 · · · CTi−v · · · CM �

⎤⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎦

⎡⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎣

e1e2...

ei−v...

eM

e�

⎤⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎦

=

⎡⎢⎢⎢⎢⎢⎢⎢⎢⎢⎢⎣

b1b2...

bi−v...

bM

b�

⎤⎥⎥⎥⎥⎥⎥⎥⎥⎥⎥⎦

(17)

where Aii or Aii−v is the matrix corresponding to subdo-main �i or (�i−v − i−v). The vector e1, e2, . . . , ei−v, . . . eM

represents the field unknowns of subdomains. The vector x�

represents the field unknowns on the interface. There is nodirect coupling between the unknowns of any subdomains andthe coupling between the subdomains and interfaces can berepresented by the submatrices Ci or Ci−v. If the number ofunknowns in each subdomain �i or (�i−v−i−v) is defined asni and the number of unknowns on the interface � is definedas ns , then the matrix sizes of Aii (Aii−v), Ci (Ci−v), and � areni × ni , ni × ns , and ns × ns , respectively.

The Schur complement system [24] is given by

Se� = g (18)

Fig. 11. RDL–TSV–RDL transition structure. (a) Geometry. (b) Cross-sectional view.

where S = C� − ∑Mi=1 CT

i A−1ii(ii− v)Ci and g = b� −∑M

i=1 CTi A−1

ii(ii− v)bi .It can be observed that the subdomains Aii or Aii−v are

independent of each other, so that each term CTi A−1

ii(ii− v)Ci in

the summation∑M

i=1 CTi A−1

ii(ii− v)Ci can be calculated simulta-neously in a parallel manner. Once the Schur complement hasbeen solved, (18) can be decoupled by solving the subdomainproblem

Aii(ii− v)ei(i−v) = gi (19)

where gi = bi − Ci(i−v)x�. The subdomain problems canbe solved in parallel since the subdomain Aii or Aii−v areindependent of each other. The parallel divide-and-conqueralgorithm can be summarized as follows.

1) Reorder the system matrix Asys according to the subdo-mains and interfaces defined in (15) and (16) to obtainthe matrix (17).

2) Use parallel computing to calculate the summation∑Mi=1 CT

i A−1ii(ii− v)Ci and then obtain the Schur comple-

ment matrix S.3) Solve (18) for interface unknowns e�.4) Solve subdomains (19) simultaneously.

IV. NUMERICAL RESULTS

This section applies the proposed modeling approach tovarious RDL transmission lines connected to TSVs. The firsttwo examples consist of RDL–TSV–RDL and a differentialRDL–TSV–RDL transition structure. These two examples areused to validate the accuracy of the proposed approach inSection II for incorporating multiport network into FDFD. Inthe third example, a five RDL–TSV–RDL transition structureis simulated to consider the coupling effects between multipleRDL transmission lines and TSVs. In the fourth example, theRDL traces are routed irregularly on the silicon interposer andconnected to a 7 × 2 TSV array. This example shows that the

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XIE AND SWAMINATHAN: FDFD MODELING OF SIGNAL PATHS 713

Fig. 12. S-parameters of one RDL–TSV–RDL transition structure with RDLlength 2.4 mm. (a) Return loss. (b) Insertion loss.

Fig. 13. S-parameters of one RDL–TSV–RDL transition structure with RDLlength 20 mm. (a) Return loss. (b) Insertion loss.

proposed approach is able to handle irregular routing of RDLtraces and larger TSV arrays. Finally, in the fifth example,multiple long RDL traces are considered and an eight RDL–TSV–RDL transition structure is simulated. The efficiency ofthe proposed approach has been compared with direct solverand iterative QMR method [15], [19].

Fig. 14. Differential RDL–TSV–RDL transition structure.

Fig. 15. S-parameters of differential RDL–TSV–RDL transition structurewith RDL length 2.4 mm. (a) Return loss. (b) Insertion loss.

A. RDL–TSV–RDL Transition Structure

The first example with dimensions and port setup is shownin Fig. 11. Two 4-μm-thick silicon dioxide layers (with dielec-tric constant εr = 3.9) are on both sides of 200-μm-thicksilicon substrate (with dielectric constant εr = 11.9 and siliconconductivity σ = 10 S/m). The length and width of the RDLtrace is 2.4/20 mm and 40 μm, respectively. The length, radius,and oxide liner thickness of the TSV are fixed at 200, 15, and1 μm, respectively. The entire structure is enclosed in a perfectelectric conductor box with dimensions 400 μm×2400 μm×280 μm/400 μm ×20 mm ×280 μm and is discretized usinga cell size of 20 μm × 40 μm × 4 μm. This structure issolved directly without dividing into subdomains after theTSVs are incorporated as a multiport network into FDFD.The RDL trace model in CST Microwave Studio (MWS)[31] is chosen with thickness of 10 μm and conductivity ofσ = 5.8 × 107 S/m. The correlation of the CST simulationand the proposed method justifies that the RDL traces can bemodeled with infinite conductivity and zero thickness providedthat the traces are above a lossy silicon substrate.

As can be observed from Figs. 12 and 13, the insertionloss and return loss data for this transition structure fromthe proposed modeling approach and CST MWS show good

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Fig. 16. S-parameters of differential RDL–TSV–RDL transition structurewith RDL length 20 mm. (a) Return loss. (b) Insertion loss.

Fig. 17. Five RDL–TSV–RDL transition structure. (a) Geometry. Dottedlines show how the subdomains are created. (b) Cross-sectional view.

correlation over a bandwidth of 20 GHz. It can be observedfrom Fig. 12(b) that the insertion loss has a sharp slope at lowfrequency. This is caused by the TSV structure, which has alarge capacitance value at low frequency due to the small oxideliner thickness [6].

B. Differential RDL–TSV–RDL Transition Structure

In the second example, a differential transition structurewith dimensions and port definition, as shown in Fig. 14, issimulated. Long and short RDL traces with length 20 and2.4 mm are used in this structure. Two 4-μm-thick silicon

TABLE I

COMPARISON OF THE PROPOSED METHOD, DIRECT SOLVING,

QMR METHOD, AND CST

Fig. 18. S-parameters of five RDL–TSV–RDL transition structure.(a) Coupling S15, S14, S13, and S12. (b) Insertion loss S16 and S38.

dioxide layers are on both sides of 200-μm-thick siliconsubstrate. The width and spacing of the differential RDL tracesare 40 and 40 μm, respectively. The length, radius, pitch, andoxide thickness of the TSV pair are 200, 15, 80, and 1 μm,respectively. The entire structure is discretized using a cellsize of 20 μm × 40 μm × 4 μm. This structure is solveddirectly without dividing into subdomains after the TSVs areincorporated as a multiport network into FDFD.

As can be observed from Figs. 15 and 16, the insertionloss and return loss data for this transition structure fromthe proposed modeling approach and CST simulation showgood correlation over a bandwidth of 20 GHz. The sharpslope of the insertion loss of cases A and B shows that theTSV parasitic effects have been captured by the proposedmodeling approach.

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XIE AND SWAMINATHAN: FDFD MODELING OF SIGNAL PATHS 715

Fig. 19. Irregular RDL traces routing with 7 × 2 TSV array. (a) Geometry. Dotted lines show how the subdomains are created. (b) Cross-sectional view.

C. Five RDL–TSV–RDL Transition Structure

In the third example, multiple RDL transmission linesand TSV arrays are considered. The five RDL–TSV–RDLtransition structure with dimensions and port definition isshown in Fig. 17. Two 4-μm-thick silicon dioxide layersare on both sides of 200-μm-thick silicon substrate. Thelength, width, and spacing of the multiple RDL traces are1.2 mm, 40 μm, and 20 μm, respectively. The length, radius,pitch, and oxide thickness of the 5 × 1 TSV arrays are200, 15, 60, and 1 μm, respectively. The entire structure isenclosed in a perfect electric conductor box with dimensions600 μm × 1200 μm × 280 μm and is discretized usinga cell size of 10 μm × 50 μm × 4 μm. This structureis divided into 15 subdomains with each subdomain thesize of 200 μm × 240 μm × 280 μm and the divide-and-conquer approach is utilized to solve each subdomainsimultaneously.

The computational times and memory consumption tosimulate the RDL–TSV–RDL transition structure using theproposed method, direct solver, and iterative QMR methodare compared in Table I. All the simulations were performedon a computer with two Intel 2.4-GHz six-core processorswith 48-GB memory. As can be observed from Table I,the proposed method is efficient and consumes less memorycompared with direct solver, which requires about 27–45-GBmemory. Although the QMR method uses only a small amountof memory, the computational time is too long.

The coupling between RDL–TSV-1 and other RDL–TSVs(RDL–TSV-2, RDL–TSV-3, RDL–TSV-4, and RDL–TSV-5)are compared with CST simulations and show good cor-relation up to 20 GHz, as shown in Fig. 18(a). The cor-relation shows that the proposed method captures all thecoupling effects of the TSV arrays and multiple RDL traces.It can be observed that the isolation is high at low fre-quency due to the oxide but decreases as the frequencyincreases.

The insertion loss illustrated in Fig. 18(b) shows goodcorrelation with CST simulations up to 20 GHz. It can beobserved that the RDL–TSV–RDL transition in the middle(S38) shows larger insertion loss compared with the RDL–TSV–RDL transition at the edge (S16) due to the enhancedcoupling in the middle.

Fig. 20. S-parameters of seven irregular RDL–TSV–RDL transition structure.(a) Coupling S12, S13, and S14. (b) Insertion loss at the edge (S18) and inthe center (S4–11).

D. Irregular RDL Transmission Line Routing With LargeTSV Arrays

This example considers irregular routing of the RDL trans-mission lines on silicon substrate and large TSV arrays.The structure with dimensions and port definition is shownin Fig. 19. Two 4-μm-thick silicon dioxide layers are on bothsides of 200-μm-thick silicon substrate. The length, radius,pitch in x-direction, pitch in y-direction, and oxide thicknessof the 7 × 2 TSV array are 200, 15, 80, 100, and 1 μm, respec-tively. The geometries of the RDL traces are shown in Fig. 19.The entire structure is enclosed in a perfect electric conductorbox with dimensions 900 μm × 1200 μm × 280 μm and isdiscretized using a cell size of 20 μm × 20 μm × 4 μm. Thisstructure is divided into 20 subdomains with each subdomainthe size of 220 μm×240 μm×280 μm and each subdomain issolved simultaneously using the divide-and-conquer approach.The computational times and memory consumption to simulate

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Fig. 21. Multiple long RDL traces routing with 8 × 1 TSV array. (a) Geometry. Dotted lines show how the subdomains are created. (b) Cross-sectional view.

Fig. 22. S-parameters of eight RDL–TSV–RDL transition structure.(a) Coupling S12, S13, and S14. (b) Insertion loss at the edge (S19) andin the center (S4–12).

this structure using the proposed method, direct solver, anditerative QMR method are compared in Table I.

The insertion loss and coupling of this structure obtainedfrom the proposed approach and full-wave simulation arecompared in Fig. 20. Good correlation with the results fromCST MWS shows that the proposed method is applicable togeneral irregular geometric configurations of RDL transmis-sion lines.

E. Eight Long RDL Transmission Line to TSV Transitions

This example applies the proposed modeling method tomultiple long RDL transmission lines connected to a 8 × 1TSV array. The eight RDL–TSV–RDL transition structurewith dimensions and port definition is shown in Fig. 21.

Two 4-μm-thick silicon dioxide layers are on both sides of200-μm-thick silicon substrate. The length, width, and spacingof the multiple RDL traces are 10 mm, 40 μm and 20 μm,respectively. The length, radius, pitch, and oxide thickness ofthe 8 × 1 TSV arrays are 200, 15, 80, and 1 μm, respectively.The entire structure is enclosed in a perfect electric conductorbox with dimensions 800 μm × 10 mm × 280 μm and isdiscretized using a cell size of 20 μm × 60 μm × 4 μm. Thisstructure is divided into 21 subdomains with each subdomainthe size of 260 μm × 1400 μm × 280 μm and each subdo-main is solved simultaneously using the divide-and-conquerapproach. The computational times and memory consumptionto simulate this structure using the proposed method, directsolver, and iterative QMR method are compared in Table I.

The insertion loss and coupling of this structure obtainedfrom the proposed approach are shown in Fig. 22. There aresome resonances in the coupling due to the long RDL traces.In addition, due to the long lines directly over the silicon, theinsertion loss is very high. Since CST was unable to simulatethis structure due to the memory required to mesh this structurebeing too large, the results have not been compared with CSTsimulation.

V. CONCLUSION

This paper presents an efficient EM-based modelingapproach for the RDL transmission lines and TSVs in sil-icon interposer for 3-D integration. In this approach, TSVarrays are modeled using an integral equation based solverwithout mesh and RDL transmission lines are modeled usingFDFD method. A new formulation on incorporating multiportnetwork is presented to incorporate the responses of TSVarrays into the FDFD modeling of RDL traces. A divide-and-conquer approach is used to solve the entire system matrix.The proposed approach has the advantage that the multiscalestructures, which require large amount of mesh elements toapproximate using FDFD can be modeled separately, andthe complex system can be divided into subdomains, whichcan be solved simultaneously. The validation examples showgood correlation between the proposed approach and full-waveEM simulations. The capability to address a large number ofRDL transmission lines and TSVs shows that the proposedmodeling approach enables better and faster electrical designof the signal paths in the silicon interposer for 3-D systems.

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XIE AND SWAMINATHAN: FDFD MODELING OF SIGNAL PATHS 717

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Biancun Xie received the B.S. degree in controlscience and engineering from the Huazhong Univer-sity of Science and Technology, Wuhan, China, in2007, the M.S. degree in electrical engineering fromShanghai Jiao Tong University, Shanghai, China,in 2010, and the M.S. degree in electrical andcomputer engineering from the Georgia Institute ofTechnology, Atlanta, GA, USA, in 2010, where he iscurrently pursuing the Ph.D. degree with the Schoolof Electrical and Computer Engineering.

His current research interests include computa-tional electromagnetic, signal/power integrity analysis for 3-D systems andelectromagnetic modeling of electronic packaging, and interconnections in3-D integration.

Madhavan Swaminathan (F’06) received the M.S.and Ph.D. degrees in electrical engineering fromSyracuse University, Syracuse, NY, USA, in 1989and 1991, respectively.

He is the John Pippin Chair of electromagneticswith the School of Electrical and Computer Engi-neering (ECE) and Director of the Interconnect andPackaging Center, Georgia Institute of Technology(Georgia Tech), Atlanta, GA, USA, and the Founderand CTO of E-System Design, a company focusingon the development of CAD tools for achieving

signal and power integrity in integrated 3-D micro and nano-systems. He is theco-founder of jacket micro devices, a company that specialized in integratedRF modules and substrates for wireless applications that was acquired by AVXCorporation. He formerly held the position of Joseph M. Pettit Professor ofelectronics in ECE and Deputy Director of the NSF Microsystems PackagingCenter, Georgia Tech. Prior to joining Georgia Tech, he was with IBMinvolved in packaging for supercomputers. He is the author of more than400 technical articles, holds 27 patents, the author of three book chapters,and primary author or co-editor of three books Power Integrity Modeling andDesign for Semiconductors and Systems (Prentice Hall, 2007), Introduction toSystem on Package (McGraw Hill, 2008), and Design and modeling for 3DICs and Interposers (World Scientific Publications, 2013).

Dr. Swaminathan serves as the Distinguished Lecturer for the IEEE EMCSociety from 2012 to 2013.