30718 component
DESCRIPTION
ComponentTRANSCRIPT
SGLS136A − NOVEMBER 2002 − REVISED APRIL 2008
1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Qualified for Automotive Applications
ESD Protection Exceeds 2000 V PerMIL-STD-883, Method 3015; Exceeds 200 VUsing Machine Model (C = 200 pF, R = 0)
Triple Supervisory Circuits for DSP andProcessor-Based Systems
Power-On Reset Generator with FixedDelay Time of 200 ms, No ExternalCapacitor Needed
Temperature-Compensated VoltageReference
Maximum Supply Current of 40 µA
Supply Voltage Range . . . 2 V to 6 V
Defined RESET Output from V DD ≥ 1.1 V
SO-8 Package
Temperature Range . . . −40°C to 125°C
typical applications
Figure 1 lists some of the typical applications for theTPS3307 family, and a schematic diagram for aprocessor-based system application. Thisapplication uses TI part numbers TPS3307−18 andTMS470R1Vxxx.
SENSE 1
SENSE 2 RESET
TPS3307-18
SENSE 3
VDD
GND
100 nF
RESET
VDD
GND
1.8 V3.3 V2.5 V
470 kΩ
620 kΩ
• Automotive applications using DSPs,Microcontrollers or Microprocessors
Industrial Equipment Programmable Controls Automotive Systems
Figure 1. Applications Using the TPS3307-18
TMS470R1Vxxx
description
The TPS3307-18 is a micropower supply voltage supervisor designed for circuit initialization primarily inautomotive DSP and processor-based systems, which require more than one supply voltage.
The TPS3307-18 is designed for monitoring three independent supply voltages: 3.3 V/1.8 V/adj,. The adjustableSENSE input allows the monitoring of any supply voltage >1.25 V.
The various supply voltage supervisors are designed to monitor the nominal supply voltage as shown in thefollowing supply voltage monitoring table.
Copyright 2008, Texas Instruments Incorporated !" #!$% &"'&! #" #" (" " ") !"&& *+' &! #", &" ""%+ %!&"", %% #""'
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications ofTexas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
8
7
6
5
SENSE1SENSE2SENSE3
GND
VDDMRRESETRESET
D PACKAGE(TOP VIEW)
SGLS136A − NOVEMBER 2002 − REVISED APRIL 2008
2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
description (continued)
SUPPLY VOLTAGE MONITORING
DEVICENOMINAL SUPERVISED VOLTAGE THRESHOLD VOLTAGE (TYP)
DEVICESENSE1 SENSE2 SENSE3 SENSE1 SENSE2 SENSE3
TPS3307-18 3.3 V 1.8 V User defined 2.93 V 1.68 V 1.25 V†
† The actual sense voltage has to be adjusted by an external resistor divider according to the application requirements.
During power-on, RESET is asserted when the supply voltage VDD becomes higher than 1.1 V. Thereafter, thesupply voltage supervisor monitors the SENSEn inputs and keeps RESET active as long as SENSEn remainbelow the threshold voltage VIT+.
An internal timer delays the return of the RESET output to the inactive state (high) to ensure proper system reset.The delay time, td typ = 200 ms, starts after all SENSEn inputs have risen above the threshold voltage VIT+. Whenthe voltage at any SENSE input drops below the threshold voltage VIT–, the RESET output becomes active (low)again.
The TPS3307-18 incorporates a manual reset input, MR. A low level at MR causes RESET to become active.In addition to the active-low RESET output, the TPS3307-18 includes an active-high RESET output.
The device is available in a standard 8-pin SO package, and is characterized for operation over a temperaturerange of −40°C to 125°C.
ORDERING INFORMATION
TA PACKAGE ‡ ORDERABLEPART NUMBER
TOP-SIDEMARKING
−40°C to 125°C Small Outline (D) Tape and Reel TPS3307-18QDRQ1 30718Q
† For the most current package and ordering information, see the Package Option Addendum at the end ofthis document, or see the TI web site at http://www.ti.com.
‡ Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging.
FUNCTION/TRUTH TABLES
MR SENSE1>VIT1 SENSE2>VIT2 SENSE3>VIT3 RESET RESET
L X X X L H
H 0 0 0 L H
H 0 0 1 L H
H 0 1 0 L H
H 0 1 1 L H
H 1 0 0 L H
H 1 0 1 L H
H 1 1 0 L H
H 1 1 1 H L
X = Don’t care
PowerPAD is a trademark of Texas Instruments Incorporated.
SGLS136A − NOVEMBER 2002 − REVISED APRIL 2008
3POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
functional block diagram
_+
_+
_
+
R4
R2
R1
R3
ReferenceVoltage
of 1.25 V
RESETLogic + Timer
Oscillator
14 kΩ
VDD
MR
SENSE 1
SENSE 2
GND
SENSE 3
RESET
RESET
TPS3307
timing diagram
tdtd
td
RESET Because of SENSE Below V ITRESET Because of MR
RESET Because of SENSE Below V IT−RESET Because of SENSE Below V IT−
SENSEnV(nom)
VIT−
MR1
0
1
0
RESET
t
t
t
SGLS136A − NOVEMBER 2002 − REVISED APRIL 2008
4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted) †
Supply voltage, VDD (see Note1) 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . All other pins (see Note 1) −0.3 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Maximum low output current, IOL 5 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Maximum high output current, IOH −5 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input clamp current, IIK (VI < 0 or VI > VDD) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output clamp current, IOK (VO < 0 or VO > VDD) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous total power dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating free-air temperature range, TA −40°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Storage temperature range, Tstg −65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Soldering temperature 260C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, andfunctional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is notimplied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltage values are with respect to GND. For reliable operation the device must not be operated at 7 V for more than t = 1000 hcontinuously.
DISSIPATION RATING TABLE
PACKAGETA ≤ 25°C
POWER RATINGDERATING FACTORABOVE TA = 25°C
TA = 70°CPOWER RATING
TA = 85°CPOWER RATING
TA = 125°CPOWER RATING
D 725 mW 5.8 mW/°C 464 mW 377 mW 145 mW
recommended operating conditions at specified temperature range
MIN MAX UNIT
Supply voltage, VDD 2 6 V
Input voltage at MR and SENSE3, VI 0 VDD+0.3 V
Input voltage at SENSE1 and SENSE2, VI 0 (VDD+0.3)VIT/1.25V V
High-level input voltage at MR, VIH 0.7xVDD V
Low-level input voltage at MR, VIL 0.3×VDD V
Input transition rise and fall rate at MR, ∆t/∆V 50 ns/V
Operating free-air temperature range, TA −40 125 °C
SGLS136A − NOVEMBER 2002 − REVISED APRIL 2008
5POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unlessotherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VDD = 2 V to 6 V, IOH = −20 µA VDD– 0.2V
VOH High-level output voltage VDD = 3.3 V, IOH = −2 mA VDD– 0.4V VVOH High-level output voltage
VDD = 6 V, IOH = −3 mA VDD– 0.4V
V
VDD = 2 V to 6 V, IOL = 20 µA 0.2
VOL Low-level output voltage VDD = 3.3 V, IOL = 2 mA 0.4 VVOL Low-level output voltage
VDD = 6 V, IOL = 3 mA 0.4
Power-up reset voltage (see Note 2) VDD ≥ 1.1 V, IOL = 20 µA 0.4 V
Negative-going input threshold voltageVSENSE3
VDD = 2 V to 6 V,1.2 1.25 1.29 V
VIT−Negative-going input threshold voltage
(see Note 3)VSENSE2
VDD = 2 V to 6 V,
TA = −40°C to 125°C1.6 1.68 1.73
VVIT− (see Note 3)
VSENSE1TA = −40°C to 125°C
2.8 2.93 3.02V
VIT− = 1.25 V 2 10 30
Vhys Hysteresis at VSENSEn input VIT− = 1.68 V 2 15 40 mVVhys Hysteresis at VSENSEn input
VIT− = 2.93 V 3 30 60
mV
MR MR = 0.7 × VDD, VDD = 6 V −130 −180
IH High-level input currentSENSE1 VSENSE1 = VDD = 6 V 5 8
AIH High-level input currentSENSE2 VSENSE2 = VDD = 6 V 6 9
µA
SENSE3 VSENSE3 = VDD −1 1
IL Low-level input currentMR MR = 0 V, VDD = 6 V −430 −600
AIL Low-level input currentSENSEn VSENSE1,2,3 = 0 V −1 1
µA
IDD Supply current 40 µΑ
Ci Input capacitance VI = 0 V to VDD 10 pF
NOTES: 2. The lowest supply voltage at which RESET becomes active. tr, VDD ≥ 15 µs/V3. To ensure best stability of the threshold voltage, a bypass capacitor (ceramic 0.1 µF) should be placed close to the supply terminals.
SGLS136A − NOVEMBER 2002 − REVISED APRIL 2008
6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
timing requirements at V DD = 2 V to 6 V, RL = 1 MΩ, CL = 50 pF, TA = 25°CPARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tw Pulse widthSENSEn VSENSEnL = VIT− −0.2 V, VSENSEnH = VIT+ +0.2 V 6 10 µs
tw Pulse widthMR VIH = 0.7 × VDD, VIL = 0.3 × VDD 100 150 ns
switching characteristics at V DD = 2 V to 6 V, RL = 1 MΩ, CL = 50 pF, TA = 25°CPARAMETER TEST CONDITIONS MIN TYP MAX UNIT
td Delay timeVI(SENSEn) ≥ VIT+ + 0.2 V,MR ≥ 0.7 × VDD, See timing diagram
140 200 280 ms
tPHLPropagation (delay) time,
high-to-low level output
MR to RESET
MR to RESET VI(SENSEn) ≥ VIT+ +0.2 V,200 600 ns
tPLHPropagation (delay) time,
low-to-high level output
MR to RESET
MR to RESET
VI(SENSEn) ≥ VIT+ +0.2 V,VIH = 0.7 × VDD, VIL = 0.3 × VDD
200 600 ns
tPHLPropagation (delay) time,
high-to-low level outputSENSEn to RESET
VIH = VIT+ +0.2 V, VIL = VIT− −0.2 V,1 5 s
tPLHPropagation (delay) time,
low-to-high level outputSENSEn to RESET
VIH = VIT+ +0.2 V, VIL = VIT− −0.2 V,MR ≥ 0.7 × VDD
1 5 µs
SGLS136A − NOVEMBER 2002 − REVISED APRIL 2008
7POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 2
1
0.999
0.997
0.995−40 −15 10 35N
orm
aliz
ed In
put T
hres
hold
Vol
tage
− V
IT(T
A),
VIT
(25
)
1.002
1.003
NORMALIZED SENSE THRESHOLD VOLTAGEvs
FREE-AIR TEMPERATURE AT V DD1.005
60 85
VDD = 2 VMR = Open1.004
1.001
0.998
0.996
C°
TA − Free-Air Temperature − °C
Figure 3
4
0
−6
−10−0.5 0 0.5 1 2.5 3 3.5
− S
uppl
y C
urre
nt − 8
14
SUPPLY CURRENTvs
SUPPLY VOLTAGE18
4 5 6 7
16
12
10
6
2
−2
−4
−8
1.5 2 4.5 5.5 6.5I D
DA
µ
VDD − Supply Voltage − V
SENSEn = VDDMR = OpenTA = 25°C
TPS3307−33
Figure 4
−400
−500
−700
−900−1−0.5 0 1 1.5 2.5 3
− In
put C
urre
nt −
−200
−100
INPUT CURRENTvs
INPUT VOLTAGE AT MR100
3.5 4 5.5 6.5
0
−300
−600
−800
0.5 2 4.5 5 6
VI − Input Voltage at MR − V
I IA
µ
VDD = 6 VTA = 25°C
Figure 5
5
4
2
00 100 200 300 400 500 600
− M
inim
um P
ulse
Dur
atio
n at
7
9
MINIMUM PULSE DURATION AT SENSEvs
THRESHOLD OVERDRIVE10
700 800 900 1000
8
6
3
1
SENSE − Threshold Overdrive − mV
t wV
sens
e −
sµ
VDD = 6 VMR = Open
SGLS136A − NOVEMBER 2002 − REVISED APRIL 2008
8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 6
1
0.5
00 −0.5 −1 −1.5 −2 −2.5 −3
− H
igh-
Leve
l Out
put V
olta
ge −
V
1.5
2
HIGH-LEVEL OUTPUT VOLTAGEvs
HIGH-LEVEL OUTPUT CURRENT2.5
−3.5 −4 −5 −6−4.5 −5.5
IOH − High-Level Output Current − mA
V OH
85°C
−40°C
VDD = 2 VMR = Open
Figure 7
− H
igh-
Leve
l Out
put V
olta
ge −
V
HIGH-LEVEL OUTPUT VOLTAGEvs
HIGH-LEVEL OUTPUT CURRENT
IOH − High-Level Output Current − mA
V OH
3.5
3
2
00 −5 −10 −15 −20 −25 −30
4.5
6
6.5
−35 −40 −45 −50
85°C
−40°C
5.5
5
4
2.5
1.5
1
0.5
VDD = 6 VMR = Open
Figure 8
85°C
−40°C
VDD = 2 VMR = Open
1
0.5
00 0.5 1 1.5 2 3 3.5
− Lo
w-L
evel
Out
put V
olta
ge −
V
1.5
2
LOW-LEVEL OUTPUT VOLTAGEvs
LOW-LEVEL OUTPUT CURRENT2.5
4 4.5 5.5 62.5 5IOL − Low-Level Output Current − mA
V OL
Figure 9
3.5
3
1.5
00 5 10 15 20 30 35
4.5
5.5
6.5
40 50 55 60
85°C
−40°C
VDD = 6 VMR = Open
− Lo
w-L
evel
Out
put V
olta
ge −
V
LOW-LEVEL OUTPUT VOLTAGEvs
LOW-LEVEL OUTPUT CURRENT
IOL − Low-Level Output Current − mA
V OL
6
5
4
2.5
2
1
0.5
25 45
PACKAGE OPTION ADDENDUM
www.ti.com 24-Jan-2013
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status(1)
Package Type PackageDrawing
Pins Package Qty Eco Plan(2)
Lead/Ball Finish MSL Peak Temp(3)
Op Temp (°C) Top-Side Markings(4)
Samples
TPS3307-18QDRG4Q1 ACTIVE SOIC D 8 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 30718Q
TPS3307-18QDRQ1 ACTIVE SOIC D 8 2500 Green (RoHS& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM -40 to 125 30718Q
(1) The marketing status values are defined as follows:ACTIVE: Product device recommended for new designs.LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.PREVIEW: Device has been announced but is not in production. Samples may or may not be available.OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availabilityinformation and additional product content details.TBD: The Pb-Free/Green conversion plan has not been defined.Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement thatlead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used betweenthe die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weightin homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) Only one of markings shown within the brackets will appear on the physical device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on informationprovided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken andcontinues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TPS3307-18-Q1 :
• Catalog: TPS3307-18
PACKAGE OPTION ADDENDUM
www.ti.com 24-Jan-2013
Addendum-Page 2
• Enhanced Product: TPS3307-18-EP
• Military: TPS3307-18M
NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
• Enhanced Product - Supports Defense, Aerospace and Medical Applications
• Military - QML certified for Military and Defense Applications
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device PackageType
PackageDrawing
Pins SPQ ReelDiameter
(mm)
ReelWidth
W1 (mm)
A0(mm)
B0(mm)
K0(mm)
P1(mm)
W(mm)
Pin1Quadrant
TPS3307-18QDRQ1 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Mar-2013
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPS3307-18QDRQ1 SOIC D 8 2500 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Mar-2013
Pack Materials-Page 2
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