3 n 4 sem syllabus of rvce

8/16/2019 3 n 4 sem syllabus of RVCE

1/36

1

Rashtreeya Sikshana Samithi Trust

R.V.COLLEGE OF ENGINEERING(Autonomous Institution Affiliated to VTU, Belgaum)

R.V. Vidyaniketan Post, Mysore RoadBangalore – 560 059

Scheme & Syllabus

III & IV Semester B.E.ELECTRONICS & COMMUNICATION ENGINEERING

(2012 Scheme)


2/36

2


3/36

3

R. V. College of Engineering, Bangalore – 59.(An Autonomous Institution affiliated to VTU, Belgaum)

Department of Electronics & Communication Engineering

THIRD SEMESTER

Sl.

No.

Course

CodeCourse BoS

Credit AllocationTotal

CreditsTheory Practical TutorialSelf

Study1. 12MA31 Applied Mathematics-III Science 3 0 1 0 4

2. 12EB32 Environmental Science &Biology for Engineers Science 3 0 0 1 4

3. 12EC33Analog MicroelectronicCircuits (Theory & Practice)

ECE3 1 0 1 5

4. 12EC34 Analysis and Design of DigitalCircuits (Theory & Practice)ECE 3 1 0 1 5

5. 12EC/TE35 Network Analysis & ControlTheoryECE/TE 3 0 1 0 4

6. 12TE/EC/

EE36Signals and Systems TE/ECE/

EE3 0 1 1 5

7. 12DMA37 Bridge Course Mathematics-I**27

No. of Hrs. 18 04 06 16 44

FOURTH SEMESTER

Sl.No.

CourseCode

Course BoSCredit Allocation

TotalCreditsTheory Practical Tutorial

SelfStudy

1. 12MA41 Applied Mathematics IV Science 3 0 1 0 42. 12EM42 Engineering Materials ME 3 0 0 0 3

3. 12EC/EE/TE43

Microprocessors & MicroController(Theory & Practice)

ECE3 1 0 1 5

4. 12EE/EC/TE44 Fields and WavesEEE 3 0 1 1 5

5. 12TE/EC/EE45 Digital Signal ProcessingTE 3 0 1 1 5

6. 12EC46 Digital System Design usingHDL (Theory & Practice)ECE 3 1 0 1 5

7. 12HSS47 Innovation and Social skills 0 1 0 0 1

8. 12DMA48 Bridge Course Mathematics-II**

28No. of Hrs. 18 04 06 16 44

**Mandatory Audit Course for lateral entry (Diploma Students)


4/36

4

Semester III Applied Mathematics III

Course Code : 12MA31 CIE Marks : 100Hrs/Week: L:T:P:S : 3:2: 0:0 SEE Marks : 100Credits : 04 SEE Hrs : 03

Course Learning Objectives:At the end of the course the student should be able to: Analyze periodic phenomena using concept of Fourier series. Understand the basics of matrix theory and its applications for finding solution of system of linear

equations. Find the approximate solutions using numerical methods, for problems which do not have

analytical solutions. Approximate the functional values with different curves. Optimize the real functional with various applications.

UNIT – I 08 HrsFourier Series and Fourier Transforms:Introduction, periodic functions, Even and odd functions, properties. Special waveforms - Squarewave, half wave rectifier, saw- tooth wave and triangular wave. Euler’s formula for Fourier series,Fourier series for functions of pe riod 2L (particular cases), Dirichlet’s conditions - problems. HalfRange Fourier series- Construction of Half range cosine and sine series, Complex form of Fourierseries problems. Complex Fourier Transforms – Properties & simple problems.

UNIT – II 07 HrsMatrices and Linear Equations:

Elementary transformation, rank of matrix by using Echelon form, consistency of system of linearequations and solutions, solution of system of linear equations using Gauss elimination method,Gauss Jordan method, Gauss Seidel method, Eigenvalues and Eigenvectors, finding largesteigenvalue by using Power method.

UNIT – III 07 HrsCurve Fitting:Method of Least squares - fitting of the curves of the form y = ax + b, y = ae bx , y = ax b and y = ax 2 +bx + c , Correlation and Regression analysis.Finite differences-forward and backward differences, Interpolation- Newton’s forward and backwardinterpolation f ormulae, Lagrange’s interpolation formula.

UNIT – IV 07 HrsNumerical Methods for Ordinary Differential Equations:

Numerical integration – Simpson’s rules, Weddle’s rule and Gaussian quadrature ( two point & three point formula). Numerical methods for first order ODE – Single step & Multistep methods- Taylor’sseries method, Runge-Kutta fourth order method, Adam- Bash forth’s method, BVP for ODE – Shooting methods for second order ODE (All methods without proof).

UNIT – V 07 HrsCalculus of Variation:Introduction, Variation of functions and functional, extremal of a functional, variational problem,

Euler’s equation and special cases. Examp les - Geodesics, Hanging cable, and Brachistochrome problem.


5/36


6/36

6

Semester IIIEnvironmental Science and Biology for Engineers

Course Code : 12EB32 CIE Marks : 100Hrs/Week : L:P:T:S : 3:0:0:4 SEE Marks : 100

Credits : 04 SEE Hrs : 03

Course Learning Objectives (CLO):At the end of the course the student should be able to:

Make engineering graduates understand the changes happening in the environment overdecades (to give statistics with causes)

Role of human beings in the changes in environment and ways and means of controlling thechanges through technology

Sustainability issues in new technologies and its adaptation Innovation (case studies) to arrest degradation of environment To create awareness among all engineering graduates the need of biological study in

engineering (biology related issues in each engineering profession with case studies and alsoapplication of biology in each program of engineering

Various branches of biological sciences (this might contain discussion of basic human physiology, sensors and systems)

Effect of environment on biological issues and think of solutions (case studies in industrialenvironment to be studied)

UNIT – I 06 HrsEcosystems and Environment: Principles of ecosystem, impact of human being on environment:

pollution, resource depletion and global environmental issues, ecosystem health and environmental

changes and human health. Procedure to assess ecosystem’s health. Standards - ISO14000 andEnvironmental Impact Assessment – definition, objectives, and types. Rapid and ComprehensiveEnvironmental Impact Assessment (EIA), Environmental Impact Statement (EIS) and Finding Of NoSignificant Impact (FONSI). Some EIA examples – Thermal Power Plant, Mining, Fertilizer,Construction Projects, Airport, Water and Wastewater Treatment Plants.

UNIT – II 10 HrsStrategies and Technology-based Solutions for Improvement of Environment Quality:Environment quality objectives and ‘Waste challenge’ in modern society - types of waste: municipal,agricultural, medical, E- waste, industrial, nuclear. Engineering ethics, 3 R’s – Reduce, Reuse &Recycle, and Sustainable waste management: Compacting, drying, composting, bioremediation,

biodegradation (chemicals and oil spillage). Waste to energy – energy recovery by incineration, bio-gasification, gasification and pyrolysis, bioconversion to clean energy (biofuels). Some examples:Upflow anaerobic sludge blanket (UASB) digestion for waste water treatment and biogas production.Technology for Cleaner Environment : SO 2/CO 2 reduction by smoke-scrubber in coal thermal

plants, chlorofluorocarbon (CFC) and incandescent bulb replacement, Renewable energy sources – wind, solar, tidal waves and biomass. Overview of emerging technologies.

UNIT - III 06 HrsDesign and Modeling for Development of Environment:Environmental Design : Principles, benefits and motivation. Environmental design for manufactured

products, building and for developmental planning. Systems Engineering – Analysis - Design –

synthesis - applications to environmental Engineering Systems.


7/36

7

Environmental Modeling : Introduction, forecast modeling and growth modeling, sensitivityanalysis. Application of remote-sensing and geographic information systems (GIS) in environmentalmodeling.

UNIT – IV 06 Hrs Introduction to Cell and Organ Systems: Cell Types: Structure of plant, animal and microbial cell

and Specialized cells like stem cells and nerve cells. Biological macromolecules: Carbohydrates, proteins and nucleic acids and Special biomolecules – hormones, enzymes, vitamins and antibiotics.Introduction to organ systems for example digestive, respiratory, excretory nervous and circulatory.

Nervous Control and coordination, sensory organs: Auditory, vision, olfactory, touch and taste.

UNIT – V 08 Hrs Bio-Inspired Engineering (BIE) or Bionics: Biological phenomena and innovative engineering.Introduction to Bioelectronics, Bio-computing, bio-photonics and bio-mechatronics. Locomotion andBio-inspired Robotics, Prosthesis and biomedical implants, Aerodynamics and flight musclefunctioning (birds & Drosophila).Signaling : Enzymes and recognition receptors in biosensors; Neurotransmission and neural networks

(artificial intelligence, signal processing and imaging); Bioelectric signals and cardiac generator.Sound : Ultrasonics in biology (echolocation in bats, sonar in whales & dolphins) andinstrumentation (medical ultrasonography - ultrasound imaging).Light : Photosynthesis and photovoltaic cells.

Course outcomes: The adverse changes in the environment due to human activities The need of innovative technology to arrest or reverse these changes. Ethical considerations important for systems engineering. Basics of biological phenomena. Their application in innovative engineering and development of technology.

Reference Books :1. Vijay Kulkarni and T. V. Ramachandra 2009. Environment Management. TERI Press; ISBN:

8179931846, 97881799318442. Gerald Kiely 1997. Environmental Engineering. McGraw-Hill; ISBN: 97800770912793. Sven Erik Jørgensen 2002. Integration of Ecosystem Theories: A Pattern Ecology &

Environment; Edition 3, Springer; ISBN: 1402007558, 97814020075524. Linvil Gene Rich 2003. Environmental Systems Engineering , McGraw-Hill; ISBN:

97800705225035. Ni-Bin Chang: Systems Analysis for Sustainable Engineering: Theory and Applications (Green

Manufacturing & Systems Engineering). McGraw-Hill Professional, 2011, ISBN: 0071630058,9780071630054

6. Larry Canter 1995. “ Environmental Impact Assessment ”, McGraw -Hill. ISBN: 0070097674

Scheme of Continuous Internal Evaluation:CIE consists of Three Tests each for 45 marks (15 marks for Quiz + 30 marks for descriptive) out ofwhich best of two will be considered. In addition there will be one seminar on new topics / model

presentation etc. for 10 marks.

Scheme of Semester End Examination:The question paper consists of Part A and Part B. Part A will be for 20 marks covering the complete

syllabus and is compulsory. Part B will be for 80 marks and shall consist of five questions(descriptive, analytical, problems or/and design) carrying 16 marks each. All five from Part B willhave internal choice and one of the two have to be answered compulsorily.


8/36

8

Semester IIIAnalog Microelectronic Circuits

(Theory & Practice)

Course Code: 12EC33 CIE Marks: 100+50Hrs/Week: L:T:P:S : 3:0:2:4 SEE Marks: 100+50Credits: 05 SEE Hrs : 3 +3

Course Learning Objectives:At the end of the course the student should be able to:

Explain the operation of MOSFET based on physical principles and analyze MOSFET circuitsat DC conditions.

Analyze MOSFET/BJT amplifier circuits using small signal models, both at low and highfrequencies, for obtaining gain, input & output impedances and frequency response.

Design different types of current mirror circuits either with BJTs or MOSFETs. Explain the operation of differential amplifiers and able to analyze differential amplifier

circuits using either BJTs or MOSFETs. Outline the characteristics of an op amp and describe the effects of non-idealities such as finitegain, finite bandwidth, finite slew rate and input and output impedances.

Implement different applications using op amp such as difference amplifiers, instrumentationamplifiers, controlled sources, precision rectifiers and active filters.

Analyze practical feedback amplifier circuits of the 4 different feedback topologies todetermine their performance characteristics.

Design class B and class AB power output amplifier stages and calculate the heat sinkrequirements for the power transistors.

UNIT – I 07 HrsMOS Field Effect Transistors (MOSFETS):Device structure and physical operation, current voltage characteristics, MOSFET as an amplifierand as a switch, biasing, small signal operation and models, MOSFET internal capacitors and highfrequency model and frequency response of common source amplifier

UNIT – II 08 HrsBipolar Junction Transistors (BJTs):BJT as an amplifier and as a switch, small signal models, internal capacitors and high frequencymodel, frequency response of the common emitter amplifier, Darlington transistors, cascodeconfiguration, current sources and current mirrors using BJT/MOSFETs.

UNIT – III 07 HrsDifferential Amplifiers:MOS and BJT differential pairs, small signal operation, differential amplifier with active load andfrequency response of the differential amplifier and multi stage amplifiers.

UNIT – IV 07 HrsOperational Amplifiers:Effect of finite open loop gain, finite bandwidth, finite slew rate, and input and output impedances,large signal operation, applications such as difference amplifier, precision rectifiers, controlledsources, waveform generators and active filters


9/36

9

UNIT – IV 07 HrsFeedback Amplifiers and Large Signal Amplifiers:The four basic feedback topologies, practical circuits, RC and LC oscillators, classification of outputstages, class A, class AB, class B circuits, thermal resistance and heat sinking of power transistors.

Self Study:

Seminars, Projects, Paper publication, etc. on emerging technologies pertaining to the subject1 Credit 4 Hrs/Week:Practicals: Analog Circuits Design & Simulation Lab

1. Design & testing of half wave / full wave rectifier circuits, and a Zener diode voltage regulator.2. Design & testing of an RC coupled amplifier using BJT/CMOS in CE/CS configuration.3. Design &testing of (a) Inverting amplifier (b) Non inverting amplifier (c) Summing circuit (d)

Comparator and (e) Schmitt trigger, using operational amplifier.4. Design & testing of Darlington emitter follower circuit with and without boot strapping.5. Design and testing of RC phase shift and Wien bridge oscillator circuits using operational

amplifier.6. LC Oscillators: Hartley and Colpitts oscillators.

7. Design and testing of class B and class AB power amplifier circuits.8. Simulation of feedback amplifier circuits (all 4 topologies) using BJT/CMOS.9. Simulation of (a) Differentiator (b) Integrator and (c) Schmitt trigger circuits.10. Simulation of differential amplifier circuits using MOSFETs and BJTs.

Course outcomes: Ability to apply the knowledge of BJTs and MOSFETs to design practical electronic circuits. Ability to design and conduct experiments using BJTs/MOSFETs/Op Amps and to analyze and

interpret the results. Ability to design electronic subsystems such as feedback amplifiers, oscillators, power

amplifiers and filters to meet the required specifications. Ability to identify an analog electronic subsystem, formulate specifications, and design the sub

system to find a solution to the given problem. Ability to use circuit techniques, laboratory practices and software tools for simulation in

designing analog microelectronic circuits. Ability to communicate and discuss effectively the technical details with reference to analog

electronic subsystems using BJTs, MOSFETs and Op Amps. Possess the knowledge of latest technology trends with reference to analog microelectronics.

Reference Books:1. Adel S Sedra, & Kenneth C Smith, adapted by A Chandorkar: “Microelectronic Circuits Theory

and Applications”, International version, Oxford University Press, 5th

Edition, 2009. ISBN:0195338839.2. Jacob Millman, Christos C Halkias & Satyabrata Jit, “Electronic Devices and Circuits”, Tata

McGraw Hill publication, 2 nd edition, 2008. ISBN: 0070634556.3. Robert L Boylestad & Louis Nashelsky, “Electronic Devices and Circuit Theory”, PHI

publication, 10 th Edition, 2008. ISBN: 9788131725290.4. D Roy Choudhury & Shail B Jain: “Linear Integrated Circuits”, New Age International

Publishers, 3 rd Edition, 2007. ISBN : 978-81-224-3098-1

Scheme of Continuous Internal Evaluation:CIE consists of Three Internal Evaluations, each consisting of a Quiz for 15 Marks and a Test for 25

Marks, out of which best TWO will be considered. In addition 20 marks to be earned through selflearning component on emerging topics.


10/36


11/36

11

Semester IIIAnalysis and Design of Digital Circuits

(Theory & Practice)

Course Code: 12EC34 CIE Marks: 100 + 50Hrs/Week: L:T:P:S : 3:0:2:4 SEE Marks: 100 + 50Credits : 05 SEE Hrs : 03 +03


Explain the concept of logic family to build digital circuits and compare electricalcharacteristics of classic digital integrated circuits

Explain and relate the following concepts for designing a logic circuit: truth table, K- map,Boolean Algebra and logic functions, SoP (sum of products) and PoS (product of sums),canonical algebraic equations, minterms and maxterms.

Design and use standard combinational circuit building blocks: multiplexers, demultiplexers,

binary decoders and encoders, decoders, Arithmetic Circuits, code converters, etc. Understand the behavior, timing issues, and internal structure of various flip-flops (RS, JK, Dand T) and registers.

Implement different sequential circuits using various flip flops to realize state machines forgiven timing behavior.

Analyze processor organization & design arithmetic & logic unit by using combinational &sequential circuits.

UNIT – I 08 HrsDigital Integrated Circuits:Characteristics and Performance Parameters of Digital ICs : Introduction, Propagation delay,

Sourcing, Sinking, Fan-in, Fan-out, V IH, V OH , V IL, V OL and corresponding currents, Noise margin,Power dissipation, power consumption, power-delay product as a figure of merit, typical values foreach logic family (as applicable). Bipolar Transistor Characteristics, Transistor as a switch andInverter.Digital IC Logic Families: Transistor-Transistor Logic (TTL), Emitter Coupled Logic (ECL), MetalOxide Semiconductor (MOS) Logic, N-MOS and P-MOS basics, Complementary MOS (CMOS)Logic and Transmission Gates.Review of Simplification Basics: Review of canonical SOP, POS forms simplification andimplementation, 5 variable K-Map, Numerical Examples.

UNIT – II 07 HrsCombinational Circuits Design and Analysis:Review of Binary Adders, Subtractors, Decoders, Encoders, Multiplexers and De-Multiplexers.Priority encoder and Magnitude comparator. Arithmetic circuits and code converters usingMultiplexers, De-Multiplexer and Decoders. Concepts of ripple carry and carry look ahead adders.Decimal Adder, Binary multiplier

UNIT – III 07 HrsSequential Circuits Design and Analysis:Introduction, Flip Flops, Triggering of Flip Flops, Analysis of Clocked Sequential Circuits, StateReduction, Flip Flop Excitation Tables, Design Procedure, Design of Counter, Design with StateEquation.


12/36

12

UNIT – IV 07 HrsRegisters and Counters:Introduction, Ripple Counters, Synchronous Counters, Registers, Shift Registers and VariousOperations, Ring counters, Johnson counters and Sequence generators, Serial adder.

UNIT – V 07 Hrs

Design of a Processor Unit:Introduction, Processor Organization, Arithmetic Logic Unit, Design of Arithmetic Unit, Design ofLogic unit, Design of Arithmetic and Logic unit, Status Register, Design of Shifter, The CompleteProcessor unit and op-code generation.

Self Study:Seminars, Projects, Paper publication, etc. on emerging technologies pertaining to the subject

1 Credit 4 Hrs/Week:Practicals: Digital Circuits Design Lab:

1. Arithmetic Circuits(i) Realization of Half / Full Adder and Half / Full Subtractor using Logic Gates.

(ii) Realization of Parallel Adder/Subtractor using IC-7483 Chip.2. Realization of Arithmetic Circuits and Code Convertors using MUX/DEMUX3. Code Convertors:

(i) Binary to Gray Code Conversions & Vice Versa.(ii) BCD To Ex-3 Code Conversions & Vice Versa.

4. Comparators: Realization of One/Two Bit Comparator and Study of Magnitude ComparatorIC.

5. Encoder-Decoders: Use of Decoder Chip to Drive LED/LCD and Priority Encoder Design.6. Flip-Flops: Design & implementation of (i) J K Master Slave FF (ii) T-FF and (iii) D-FF.7. Asynchronous Counters: Design and verification of Asynchronous Counters (Mod N

Counter).(i) Up-down Counters using FF ICs.(ii) Ripple Counters using IC-7490 and IC-7493.

8. Synchronous Counters: Design and verification of Synchronous Counters.(i) Counters design usingState Diagrams (Non-binary sequence and skipping state).(ii) Programmable Counters using IC-74192 and IC-74193.

9. Shift Registers: Shift Left, Shift Right, SIPO, SISO, PISO, PIPO Operations using 8-bit shiftregister IC.

10. Design and Testing of Ring Counter, Johnson Counter and Sequence generators.11. Binary Multiplier: Design and implementation of 2bit/3bit binary multiplier.12. Arithmetic Logic Unit: Verification of arithmetic and logic operations using a MSI chip.

Course outcomes: Ability to design circuits using digital devices for simple applications involving Combinational

and Sequential blocks. Ability to build basic building blocks in digital electronics and design systems involving the

above sub-systems. Apply knowledge of number systems, codes and Boolean algebra to the analysis and design of

digital systems. Identify, formulate, and solve engineering problems in the area of digital system design. Use the techniques and skills in system design through modern engineering tools such as logic

works SPICE and hardware description languages such as VHDL and Verilog.

Able to function in multi-disciplinary teams through digital circuit experiments and projects. To design a digital system, components or process to meet desired needs within realisticconstraints.


13/36

13

Overall, the student would have a good idea about the usage of the concepts learnt andknowledge acquired, in industry for real world applications.

Reference Books:1. M. Morris Mano & Michael D. Ciletti, “Digital Design”, 4 th Edition, Pearson Education Inc.,

ISBN: 978-81-317-1450-8, 2008.

2.

M. Morris Mano, “Digital Logic and Computer Design”, Pearson Education Inc., 13th

Impression, ISBN: 978-81-7758-409-7, 2011.3. Herbert Taub and Donald Schilling, “Digital Integrated Electronics”, McGraw Hill

Publications, 2008.4. Charles H. Roth (Jr.), “Fundamentals of Logic Design”, West publications, 4 th Edition, 1992.5. R. P. Jain, “Modern Digital Electronics”, McGraw Hill Publications, 3 rd Edition, 2003,

ISBN: 0-07-049492-4.

Scheme of Continuous Internal Evaluation:CIE consists of Three Internal Evaluations, each consisting of a Quiz for 15Marks and a Test for 25Marks, out of which best TWO will be considered. In addition 20 marks to be earned through self

learning component on emerging topics.

Scheme of Continuous Internal Evaluation: Practicals:A student is expected to conduct one experiment in the lab test.

Scheme of Semester End Examination:The question paper consists of Part A and Part B. Part A will be for 20 marks covering the completesyllabus and is compulsory. Part B will be for 80 marks and shall consist of five questions(descriptive, analytical, problems or/and design) carrying 16 marks each. All five from Part B willhave internal choice and one of the two have to be answered compulsorily

Scheme of Semester End Examination: Practicals: A student is expected to conduct one experiment in the practical exam


14/36

14

Semester IIINetwork Analysis and Control Theory

Course Code : 12EC/TE35 CIE Marks : 100Hrs/Week : L: T: P: S: 3:2:0:0 SEE Marks : 100Credits : 04 SEE Hrs : 03


Use mesh and nodal analysis for formulating the transfer function of electrical networks Apply network theorems for reducing complex electrical networks into simpler networks. Evaluate the initial and final values of different RL, RC and RLC networks for various input

signals. Apply Laplace transforms to analyze and synthesize the networks for different input signals. Analyze control systems using signal flow graphs and block diagram techniques Compute time domain response of first and second order systems. Analyze the stability of systems using root locus methods

UNIT – I 07 HrsBasic Concepts: Meaning of Networks and Network Analysis, Classification of Network Elements,Active and Passive, Linear & Non-Linear, Unilateral & Bilateral, Lumped & Distributed withexamples.Mesh and Node Analysis: Loop and Node Analysis with Linearly Dependent and IndependentSources for DC and AC Networks including Concepts of Super Mesh and Super Node.

UNIT – II 07 HrsNetwork Theorems: Principle of Dual Networks, Analysis of Networks using Superposition,Reciprocity, Thevenin’s & Norton's , Millman’s & Maximum Power Transfer Theorem with Proofs.

UNIT – III 07 HrsInitial Conditions & Transient Analysis in Networks: Behavior of R, L, C components underswitching conditions and their representations. Examination of initial and final values in differenttypes of RL, RC and RLC networks.Laplace Transforms: Introduction, The Laplace Transformation, Basic Theorem for the LaplaceTransformation, Solution of Linear differential Equation, Partial Fraction Expansion.

UNIT –

IV 07 HrsBasic Ideas of Control Systems: Definition of Control System, Requirements of a Control System,Classification of Control Systems - Linear, Non- Linear, Analog and Digital, Open Loop and ClosedLoop (in detail), Single- Input, Single- Output, Multiple Input Multiple Output Systems.System Modeling: Modeling of Electrical (i) Mathematical Model (Integro-Differential Equations)(ii) Transfer Function, Definition, Three Forms of Transfer Functions, Polynomial Form, Pole- ZeroForm and Time- Constant Form.Block Diagram: Block Diagram ReductionSignal Flow Graphs: Signal Flow Graphs, Mason's Gain Formula (No Proof), Relative Advantages.


15/36

15

UNIT – V 07 HrsTime Response of Feedback Control Systems: Standard Test Signals, Step Response for First andSecond Order, Impulse Response for First and Second Order, Distinction between Type and Order ofthe System, Time Domain Specifications for Second Order System. t r , td, t p, M p(No Derivation), e ss Steady State Error Analysis, Error Constants, K p, K v, K a. Stability Analysis and Introduction to Root Locus Technique: Concepts of Stability, Types of

Stability, Asymptotic Stability. Definition of Root Locus Diagram, Steps to Draw the Root LocusDiagram.

Course Outcomes: Ability to carry out steady state and dynamic analysis of different electrical networks Ability to design a system, component or process to meet desired needs. Ability to Identify, formulate and solve control engineering problems. Ability to use the techniques, skills and tools pertaining to modern control engineering

practice.

Reference Books:

1. D. Roy Choudhury, “Networks and Systems”, New Age International Publications, 2nd

Edition,2008.

2. M. E.Van Valkenburg, “Network Analysis”, PHI, 3 rd Edition, 2004.3. Nagarath and M. Gopal, “Control Systems Engineering”, New Age International (P) Limited

Publishers, 5 th Edition, 2007.4. D. Roy Choudhury, “Modern Control Engineering”, PHI , 2005.

Scheme of Continuous Internal Evaluation:CIE consists of Three Internal Evaluations, each consisting of a Quiz for 15Marks and a Test for 35Marks, out of which best TWO will be considered.

Scheme of Semester End Examination:The question paper consists of Part A and Part B. Part A will be for 20 marks covering the completesyllabus and is compulsory. Part B will be for 80 marks and shall consist of five questions(descriptive, analytical, problems or/and design) carrying 16 marks each. All five from Part B willhave internal choice and one of the two have to be answered compulsorily


16/36

16

Semester IIISignals and Systems

Course Code : 12TE/EC/EE36 CIE Marks : 100Hrs/Week: L:T:P:S : 3:2:0:4 SEE Marks : 100Credits : 05 SEE Hrs : 03


Recognize naturally existing signals in Electrical Engineering context that are mathematicallytractable in time and frequency.

Define a system in Electrical Engineering domain as a mathematical expression in time orfrequency that operates on signals.

Express a signal and a system in both time and frequency domains and develop amathematical process to migrate between the two representations of the same entity.

Analyze a complex signal in terms of basic signals in continuous and discrete time flavors. Create a new signal from a part of the original signal and reconstruct the original signal from

its sampled parts.

UNIT – I 07 HrsSignals:Definition of Signals, Classification of Signals, Basic Operations on Signals: Operations Performedon the Independent and Dependent Variable, Precedence Rule, Elementary Signals.Systems:Definition of Systems, System Viewed as Interconnection of Operations, Properties of Systems.

UNIT – II 08 Hrs

Linear Time Invariant Systems:Discrete Time Systems: Convolution Sum, Convolution Sum Evaluation Procedure. Continuous Time Systems: Convolution Integrals, Convolution Integrals Evaluation Procedure,Interconnections of LTI System, Relations between LTI System Properties and Impulse ResponseRepresentation, Difference Equation Representation of LTI System and Solving DifferenceEquation, Block diagram representation of systems.

UNIT – III 07 HrsFourier Representation of Continuous SignalsFourier series: Introduction, Complex Sinusoids and Frequency Response of LTI System, Fourierseries representation for signals

Fourier Transform: Fourier Transform representation. Properties of Fourier Transform, InverseFourier Transform by using Partial Fraction Expansion, Fourier Transform of Periodic Signals,Frequency response of Systems characterized by LCC difference equation.

UNIT – IV 08 HrsFourier Representation of Discrete Signals:Discrete Time Fourier series, Discrete time Fourier transforms. Properties of Fourier Transform,Inverse Fourier TransformApplication of Fourier RepresentationSampling: Sampling Continuous-Time Signals, Sampling theorem, Sub-sampling: Sampling DiscreteTime Signals, Reconstruction of Continuous Time Signals from Samples.


17/36

17

UNIT – V 08 HrsZ Transforms:Introduction, Z Transforms, Properties of ROC, Poles and Zeros, Properties of Z- Transforms,Inverse of Z Transforms: Partial-Fraction Expansions, Power Series Expansion, Transfer Function,Causality, Stability and Inverse Systems. Unilateral Z Transform and its application to solvedifference equation. Relation between Z-Transform and Fourier Transform

Self Study:Seminars, Projects, Paper publication, etc. on emerging technologies pertaining to the subject

1 Credit 4 Hrs/WeekCourse Outcomes: Ability to recognize basic signals like impulse, UNIT step, ramp, sinusoids and exponentials,

represented both in time and frequency domains. Ability to represent a Linear Time Invariant system as a response to an impulse in different

domains such as time domain and frequency domain. Ability to represent a complex signal in terms of sinusoids and express the signal in time and

frequency domains.

Ability to develop a sampled version of the signal and compute the response of a LTI system tothis signal.

Ability to demonstrate mathematical reconstruction of the original continuous signal from itssampled version.

Reference Books:1. Simon Haykin and Barry Van Veen, “Signals and Systems”, John Wiley & Sons, 2 nd Edition,

2008.2. V. Oppenheim, Alan Willsky and A. Hamid Nawab, “Signals and Systems”, Pearson Education

Asia/ PHI, 2 nd Edition, 20063. H. P. Hsu, R. Ranjan, “Signals and Systems”, Schaum's O utlines, TMH, 2006

Scheme of Continuous Internal Evaluation:CIE consists of Three Internal Evaluations, each consisting of a Quiz for 15Marks and a Test for 25Marks, out of which best TWO will be considered. In addition 20 marks to be earned through selflearning component on emerging topics.

Scheme of Semester End Examination:The question paper consists of Part A and Part B. Part A will be for 20 marks covering the completesyllabus and is compulsory. Part B will be for 80 marks and shall consist of five questions(descriptive, analytical, problems or/and design) carrying 16 marks each. All five from Part B will

have internal choice and one of the two have to be answered compulsorily


18/36

18

Semester IIIBridge Course Mathematics - I

Course Code: 12DMA37 CIE Marks : 100Hrs/Week:L: T:P:S : 2:0:0:0 SEE Marks : 100Audit Course SEE Hrs : 03

Course Learning Objectives (CLO):At the end of the course the student should be able to: Apply the knowledge of ordinary and partial differentiation in engineering and real life problems; Learn how to formulate and interpret a Taylor series approximation of a function. Comprehend basic meaning of partial derivatives. Recognize and model differential equations and apply analytical techniques to compute solutions.

UNIT – I 06 HrsDifferential Calculus:Successive differentiation, n th derivat ives of standard functions, Leibnitz’s theorem (without proof).Taylor’s series and Maclaurin’s series for function of single variable (without proof).

UNIT – II 06 HrsPartial Differentiation:Introduction-partial derivatives, total derivative, differentiation of composite and implicit functions.Jacobians and problems.

UNIT – III 06 HrsOrdinary Differential Equations:Solution of first order and first degree differential equations - variable separable methodshomogeneous, linear, Bernoulli, exact equations (without integrating factor).

UNIT – IV 06 HrsLinear Ordinary Differential Equations of Second and Higher Order:Linear differential equations of higher order with constant coefficients. Solution by inversedifferential operator method. Solution by method of variation of parameters.

.UNIT – V 06 Hrs

Vector Analysis:Vector Algebra - Vector addition, Multiplication (dot, cross & triple products), Vectordifferentiation – velocity, acceleration of a vector point function.

Course Outcomes: Ability to use the concept of functions of several variables and their partial derivatives forcomputing the areas, volumes using multiple integrals.

Ability to apply concept of differential equations to handle physical problems.

Reference Books1. B. S. Grewal, “Higher Engineering Mathematics”, Khanna Publications, 40 th Edition 2007.2. N. P. Bali, Manish Goyal “A Text Book of Engineering Mathematics”, Laxmi Publications, 7 th

Edition, 2007.3. B. V. Ramana “Higher Engineering Mathematics”, Tata Mc Graw Hill Publications, 2007.4. E- Kreyszig, “Advanced Engineering Mathematics”, John Wiley & sons Publications, 8 th Edition,

2007.


19/36

19

Scheme of Continuous Internal Evaluation:CIE consists of Two Tests each for 50 marks (20 marks for Quiz + 30 marks for descriptive).

Scheme of Semester End Examination:The question paper consists of Part A and Part B. Part A will be for 20 marks covering the completesyllabus and is compulsory. Part B will consist of eight questions out of which five questions have to

be answered.


20/36

20

Semester IV

Applied Mathematics-IV

Course Code : 12MA41 CIE Marks: 100Hrs/Week : L: P: T:S : 3: 0 : 2 : 0 SEE Marks: 100

Credits : 04 SEE Hrs: 03

Course Learning Objectives (CLO):At the end of the course the student should be able to: Provide basic definitions and theorems of the calculus of complex functions which are involved in

any field problems of Engineering. Use of Bessel functions and Legendre polynomials and their properties in Heat, wave and Laplace

equations with cylindrical and spherical symmetry. Apply theory of probability in study of random phenomena, analyzing and interpreting data that

involves uncertainty.

Apply linear programming techniques for optimization problems subject to linear constraints inthe various areas of Engineering & Science.

Find the solution of partial differential equations which arise in physical situations.

UNIT – I 07 HrsComplex Analysis:Complex variables - Function of a complex variable, analytic functions-Cauchy-Riemann equationsin cartesian and polar forms (without proof), properties of analytic functions, construction of analyticfunctions by Milne-Thomson method.Complex integration - Complex line integrals- Cauchy’s theorem and corollaries (without proof),Taylor’s and Laurent’s series (statements only), singularities, poles, residues, residue theorem(without proof) - problems.

UNIT – II 07 HrsSpecial Functions:Introduction of Bessel’s and Legendre’s differential equation using the solution of Laplace equationin cylindrical and spherical system. Series solution of Bessel’s differential equation leading to Besselfunction of first kind, recurrence relations, generating functions, Bessel’s integra l formula,orthogonality of Bessel function. Legendre’s differential equation, Legendre polynomials,Rodrigue’s formula.

UNIT – III 08 HrsLinear Programming Problem:Mathematical formulation of Linear Programming Problem, Graphical method, Simplex method andBig M method.

UNIT – IV 07 HrsProbability and Distributions:Basics of Probability: Sample Space, events, probability of an event, addition theorem. Conditional

probability, Multiplication theorem, Baye’s rule. Random Variables: Discrete and continuous,Probability mass function, Probability density function, Cumulative density function, Mean,

Variance, standard deviation Binomial, Poisson, Exponential and Normal Distributions.


21/36

21

UNIT – V 07 HrsPartial Differential Equations:Classification of second order Partial differential equations - Elliptic, Parabolic and Hyperbolic.Solution of two dimensional Laplace equation in polar coordinates by the method of separation ofvariables. Solution of two dimensional heat flow in transient state and steady state. Solution of twodimensional wave equation by the method of separation of variables. Vibrating membrane, solution

in the case of rectangular and circular membrane - Simple problems.

Course outcomes: Ability to provide basic definitions and theorems of the calculus of complex functions which are

involved in any field problems of Engineering. Ability to use Bessel functions, Legendre polynomials and their properties in heat, wave and

Laplace equations with cylindrical and spherical symmetry. Ability to analyze and interpret data that involves uncertainty, using theory of probability. Interpret the models of probability distributions for real life and engineering problems.

Reference Books 1. B.S. Grewal; Higher Engineering Mathematics; Khanna Publishers; 40 th Edition; 2007; ISBN: 81-

7409-195-5; Chapters 16, 17, 19, 20, 26, 32.2. N.P Bali & Manish Goyal; A Text Book of Engineering Mathematics; Lakshmi Publications; 7 th

edition; 2010; ISBN: 978-81-7008-992-6; Chapters: 1, 15, 16, 21.3. Theory & problems of Fourier Analysis with applications to Boundary Value problems, Murray R

Spiegel, Schaum’s Outline Series. 4. Erwin Kreyszig; Advanced Engineering Mathematics; John Wiley & Sons; 9 th Edition; 2007;

ISBN: 978-81-265-3135-6; Chapters: 4,11, 12, 20, 22.

Scheme of Continuous Internal Evaluation:CIE consists of Three Tests each for 45 marks (15 marks for Quiz + 30 marks for descriptive) out ofwhich best of two will be considered. In addition there will be one seminar on new topics / model

presentation etc. for 10 marks.

Scheme of Semester End Examination:The question paper consists of Part A and Part B. Part A will be for 20 marks covering the completesyllabus and is compulsory. Part B will be for 80 marks and shall consist of five questions(descriptive, analytical, problems or/and design) carrying 16 marks each. All five from Part B willhave internal choice and one of the two have to be answered compulsorily.


22/36

22

Semester IV

Engineering Materials

Course Code : 12EM42 CIE Marks : 100Hrs/Week : L: P: T:S : 3: 0 : 0 : 0 SEE Marks : 100

Credits : 03 SEE Hrs : 03

Course Learning Objectives (CLO):1. The versatile use of materials from biomedical applications to aerospace industries2. The different properties of materials.3. Different types of ferrous alloy its properties and applications.4. Concept of phase transformation due to temperature in alloys.5. Various heat treatment methods employed in the industry and its effect on the mechanical

properties.6. Importance of ceramics, polymers and composites, its types, applications.7. Nano Materials synthesis, advantages over conventional materials.

UNIT – I 06 HrsIntroduction:Classification of Materials - Metals, Ceramics, Polymers, composites, Advanced Materials-semiconductors, biomaterials, smart materials, nanostructured materials and their applications.Material properties – Mechanical properties, thermal properties – Heat capacity, CTE, thermalconductivity, Electrical and Electronic conductivity, Magnetic properties – dia, para, ferro, ferri,antiferro, domains and hysteresis. Optical properties -Luminescence and photoconductivity.

UNIT – II 08 HrsFerrous Materials and Alloys:Binary phase diagrams, Phase Rule, Lever Rule, Solidification, Nucleation and Grain Growth.Cast Iron, Chromium steels, Nickel steels, Silicon Steels, Tungsten and Molybdenum Steels &Stainless Steels; Tool Steels, structural steels, Corrosion and Heat TreatmentNon-ferrous Materials and Alloys:Aluminum, Copper and Titanium, their alloys, properties and applications.

UNIT – III 08 HrsOverview of Flexible Electronics Technology:History of Flexible Electronics, Materials for Flexible Electronics , Fabrication Technology forFlexible Electronics Fabrication on Sheets by Batch Processing, Fabrication on Web by Roll-to-

Roll Processing , Additive Printing, Low-temperature Amorphous and Nano crystalline SiliconMaterials, Low-temperature Dielectrics, Low-temperature Thin-film Transistor Devices.Ceramic Materials:Definition, Classification of Ceramic Materials, Processing Methods, Properties and Industrial,Medical and Commercial Applications.Polymers:Definition, Classification of Polymers, Properties and their applications, intrinsically conductivematerials.


23/36


24/36

24

Semester IVMicroprocessor and Microcontroller

(Theory & Practice)

Course CODE : 12EC/EE/TE43 CIE Marks : 100+50Hrs / Week:L:T:P:S : 3:0:2:4 SEE Marks : 100+50Credits : 05 SEE Hrs : 03 +03

Course Learning Objectives (CLO):At the end of the course the student should be able to: Specify, design, implement, and debug simple microprocessor-based applications using the Intel

8086 architecture. Demonstrate the differences between microprocessor and microcontroller Analyze the architecture of 8051 microcontroller Use software development tools to assemble, test and debug the programs by using breakpoints,

single-stepping, monitoring the changes in register/memory contents, on a hardware platform or

on an emulator. Apply assembly directives to initialize memory for global variables and use assembly languageto implement flow control (sequential, conditional and iterative).

Analyze the architectural support of MCUs to interface with external world.

UNIT – I 07 HrsMPU Organization:CISC & RISC Design Philosophy, Harvard & Von-Neuman Architectures, Microprocessor &Microcont roller, Intel’s 8086 architecture, Pin groups, Functioning, Segmentation, Maximum Mode,Minimum Mode, Address generation, Stack, Interrupts.

UNIT – II 07 Hrs8086 Assembly Language Programming:Addressing Modes of 8086, Instruction Formats, Program Development Tools, AssemblerDirectives, Instruction Set of 8086. Data Transfer Instructions, Arithmetic Instructions, BitManipulation Instructions, Branching Instructions, Processor Control Instructions and StringInstructions, Macros, Modular Programs, Procedures, Assembly Language Programming Examples,

UNIT – III 07 HrsHardware of 8051 Microcontrollers:Introduction of Intel MCS 51 family, Comparison of Microprocessor and Microcontroller,Architecture and Pin Functions of 8051 Microcontroller, CPU Organization, Program Counter,Timing and Machine Cycles, Internal Memory Organization, Registers, Stack, Input/ Output Ports,Counters and Timers, Serial Data Input and Output, Interrupts, Power Saving Modes.

UNIT – IV 07 Hrs8051 Microcontroller Based System Design:I/o Port Programming, Programming timers, Asynchronous Serial Data Communication, InterruptService Routines. Programming in C, Inline Assembly, Interfacing Matrix Keyboard and SevenSegment Displays, Interfacing ADC and DAC, Interfacing of LCD.

UNIT – IV 07 HrsAdvanced Processors & Controllers:Parallel Architectures, Pentium, Multicore Architectures, Cache Coherence issues, ARM, PICArchitectures.


25/36

25

Self Study:Seminars, mini projects, Paper publication, etc. on emerging technologies pertaining to the subject.

4 Hrs/Week: 1 CreditPracticals: Processor & Controller Lab:Experiments with 8086 Assembly using MASM

1. Data Transfer Programs: Block Moves & Exchange (With & Without Overlap) with

&without String Instructions.2. Arithmetic Operations: Addition, Subtraction, Multiplication & Division on 32-Bit Data.3. Code Conversions: Use XLAT Instruction to Convert Binary to BCD, Binary to ASCII.

Input from Keyboard & Display Result on the Console.4. (a) Search for A Key in an Array of Elements using Linear Search, Binary Search.

Find Efficiency in each case.(b) Sort An Array Using Bubble Sort & Selection Sort. Find Efficiency in each case.

5. (a) ASCII Operations: Addition, Subtraction, Multiplication & Division on 16-Bit Data.(b) Logic Controller Interfacing: Realize Boolean Expressions Like Full Adder, FullSubtractor, Code Conversions, Etc.

Experiments with 8051 C using Keil software6. a) Write 8051 C program to interface Logic Controller card and perform various logical

functions. b) Write 8051 C program to interface stepper motor to rotate in clockwise/ anti clockwise

directions & and to rotate the motor through predefined angle of rotation.7. a) Write 8051 C program to interface elevator card & simulate the operations of the

elevator. b) Write 8051 C program to interface DAC to generate sine wave.

8. Write 8051 C program to interface 4X4 keypad &display the key pressed on LCD9. a) Write 8051 C program to interface ADC in polled mode.

b) Write 8051 C program t/o interface ADC in interrupt mode.c) Generate PWM wave on pin P3.1 to control speed of DC motor. Control the duty

cycle by analog input.10. Write 8051 C program to measure frequency of TTL waveform.11. Write 8051 C program to interface relay to control AC device.

Course outcomes: Ability to analyze the architecture and instruction set of the microprocessor. Ability to design programmable controller using microprocessor to control practical applications. Ability to posses the knowledge of microprocessor to use for real time applications.

Ability to explore the architecture of 8051 microcontroller Ability to write a microcontroller program for a given algorithm and implement the same. Ability to interpret and Debug a given microcontroller program.

References:1. Douglas Hall, “Micro -Processors and Interfacing- Programming & Hardware”, TMH, 2 nd

Edition, 2002.2. Barry B. Brey, “The Intel Micro -processors, Architect ure, Programming and Interfacing”,

Pearson Education, 6 th Edition, 2008.3. Kenneth J. Ayala; “The 8051 Microcontroller Architecture, Programming &Applications”;

Thomson Learning; 2 nd Edition, 2004.4. Muhammad A Mazidi ;”The 8051 Microcontroller and Embedded Sys tems”; Pearson

Education; 2 nd Edition, 2009.


26/36


27/36

27

Semester IVFields and Waves

Course Code : 12EE/EC/TE44 CIE Marks : 100Hrs / Week:L:T:P:S : 3:2:0:4 SEE Marks : 100Credits : 05 Exam Hrs : 03


Apply knowledge of mathematics, science, and engineering basics to the analysis and designof electrical systems involving electric and magnetic fields as well as electromagnetic waves.

Interpret and apply the concepts which comes in Antenna and RF communication Develop and design mathematical models of communication channels Analyze and compare different type of wave propagation Use the techniques, skills, and modern engineering tools such as CAME, necessary for

engineering practice.

UNIT – I 07 Hrs

Electrostatics 1:Coulomb’s law, illustrative examples, Electric Field Intensity, Applications (field due to Line chargedistribution, Surface charge distribution- sheet, Circular ring, disk), Illustrative examples.Flux, fluxdensity Gauss' Law, Divergence Theorem(qualitative treatment), Application of Gauss's Law (Fielddue to Continuous Volume Charge, Line Charge, Sheet Charge, Metal sphere, spherical shell)Illustrative examples.

UNIT – II 08 Hrs

Electrostatics-2: Electric potential, Relation between E and V, Applications (field and potential due to Line chargedistribution, Surface charge distribution- sheet, Circular ring), Energy Density in an Electric Field ,Illustrative examples. Boundary Conditions (dielectric-dielectric, dielectric-conductor), Poisson's and Laplace's Equations,Uniqueness Theorem, Applications Laplace’s and Poisson's Equations (different capacitor s, Coaxialconductors), Illustrative examples.

UNIT – III 08 HrsMagneto Static Fields-1:

Current , Current density , Biot -Savart Law ,Applications (Infinite linear conductor, current carryingin loop, solenoid), Magnetic Flux and Flux Density, Ampere’s Circuital Law, Stroke’s theorem(qualitative treatment), Applications (Infinite line current, sheet current, coaxial transmission line),Problems.

UNIT – IV 07 HrsMagneto Static Fields-2:Magnetic Boundary Conditions, Inductors and Inductances. Maxwell's Equations: Introduction, Faraday's Law, Transformer and Motional EMFs, DisplacementCurrent, Maxwell's Equations in Final Forms, Time-Varying Potentials, Time-Harmonic Fields,Illustrative examples.


28/36

28

UNIT – IV 07 HrsElectromagnetic Waves:Introduction, Waves in General, Wave Propagation in Lossy Dielectrics, Plane Waves in LosslessDielectrics, Plane Waves in Free Space, Plane Waves in Good Conductors, Power and the PoyntingVector, Reflection of a Plane Wave at Normal Incidence, Reflection of a Plane Wave at ObliqueIncidence. Illustrative examples.

Self Study:Seminars, Projects, Paper publication, etc. on emerging technologies pertaining to the subject 1Credit 4 Hrs/Week:

Course Outcomes: Ability to analyze the concepts of electromagnetic wave theory in communication Ability to analyze the behavior of various mediums through which electromagnetic signals propagates. Students can have knowledge about electromagnetic shielding. Perform the communication operations on RF signals through various modes like transmissionlines, waveguides; space and antenna concepts.

Reference Books:1. Matthew N O Sadiku,”Elements of Electromagnetics”, Oxford University Press, 4 th Edition,

20072. William H. Hayt Jr. and John A. Buck ,”Engineering Electromagnetics”, Tata McGraw Hill,

6th Edition, 20013. Edward C. Jordan and Keith G. Balmain, “Electromagnetics Waves and Radiating Systems”,

Prentice Hall of India, 2 nd Edition, 1968. Reprint 2002.4. John Krauss and Daniel A. Fleisch, “Electromagnetics with Applications”, McGraw Hill, 5 th

Edition, 1999.


Scheme of Semester End Examination:The question paper consists of Part A and Part B. Part A will be for 20 marks covering the completesyllabus and is compulsory. Part B will be for 80 marks and shall consist of five questions(descriptive, analytical, problems or/and design) carrying 16 marks each. All five from Part B will

have internal choice and one of the two have to be answered compulsorily


29/36

29

Semester IVDigital Signal Processing

Course Code : 12TE/EC/EE45 CIE Marks: 100Hrs/Week:L:T:P:S:3:2:0:4 SEE Marks: 100Credits : 05 SEE Hrs : 03


Define discrete-time signals and systems, and express the differences with their continuous-timeanalogy.

Analyze the effect of sampling on continuous-time signal and system. Analyze and interpret the frequency representation of discrete-time signal and system. Develop the efficient method of calculating the DFTs. Define the various structures for discrete-time systems. Apply z-transform for analysis and design of discrete-time systems.

Demonstrate the Frequency transformation in the Analog Domain and Frequency transformationin the Digital Domain. Design & implement FIR & IIR filters.

UNIT – I 08 HrsDFT: Frequency Considerations:Discrete Fourier Transform (DFT), Frequency domain Sampling and Reconstruction of Discrete timesignals, DFT as a linear Transformation, and Relationship of DFT to other transforms.Properties of DFT : Periodicity, Linearity and Symmetry properties, Multiplication of two DFTs andcircular convolution, additional DFT properties.Linear filtering methods based on the DFT: Use of DFT in linear filtering, Filtering of long data

sequences.UNIT – II 07 Hrs

Efficient computation of DFT: FFT Algorithms:Direct computation of DFT, Divide and conquer approach to computation of DFT, Radix-2 FFTAlgorithms and Implementation of FFT Algorithms.Application of FFT Algorithms : Efficient computation of DFT of two real sequences, Efficientcomputation of DFT of a 2N – point real sequence, Use of the FFT Algorithm in linear Filtering andcorrelation.

UNIT – III 07 HrsStructures for the Realization of the Discrete Time Systems:Structures for FIR Systems : Direct form structure, Cascade form structures, frequency Samplingstructures, lattice Structure.Structure for IIR Systems: Direct form structures, Signal Flow Graphs and Transposed Structures,Cascade Form Structures, Parallel- Form Structures, Lattice and Lattice – Ladder Structures for IIRSystems.

UNIT – IV 07 HrsDesign of Digital Filters:Causality and its Implications, Characteristics of practical Frequency Selective Filters.Design of FIR Filters : Symmetric and anti-symmetric FIR Filters, Design of Linear phase FIRFilters using Windows, Design of Linear phase FIR filters by frequency Sampling method, Design ofOptimum Equi-ripple Linear Phase FIR Filters


30/36


31/36

31

Semester IVDigital System Design using HDL

(Theory & Practice)

Course Code : 12EC46 CIE Marks : 100+50Hrs/Week:L:T:P:S : 3:0:2:4 SEE Marks : 100+50Credits : 05 SEE Hrs : 03+03


Design and analyze the performance of combinational and sequential digital circuits using theVHDL and Verilog hardware description language.

Implement state machine of digital circuits using the VHDL and Verilog hardwaredescription languages.

Integrate various digital circuits to obtain digital systems using the VHDL and Veriloghardware description languages at the structural and behavioral levels.

Design and simulate digital circuits described with VHDL/Verilog using Xilinx ISE designtools.

Implement digital circuits described with VHDL/Verilog on FPGA Xilinx Spartan 3.

UNIT – I 08 HrsIntroduction to VHDL:VHDL Description of Combinational circuit, Multiplexer, Decoder, Adder Modeling sequentialcircuits as Flip- flops, Counter, Shift register using VHDL. Modeling a Sequential Machine,Variables, Signals and Constants, Arrays and VHDL operators.

UNIT – II 08 HrsAdditional Topics in VHDL:VHDL Functions, VHDL Procedures, VHDL Packages Libraries. VHDL Model for a 8 or 16 bitCounter, VHDL Model for a 8 or 16 bit Counter and shift register using ICs (structural) Attributes,Transport and Inertial Delays, Operator Overloading, Multivalued Logic and Signal Resolution,IEEE-1164 Standard Logic, Generics, Generate Statements.Introduction to Verilog:Verilog History, System representation, Number representation and Verilog ports, Verilog DataTypes: Net, Register and Constant. Operator Types: Logical, Arithmetic, Bitwise, Reduction andRelational.

UNIT – III 07 HrsAdditional Topics in Verilog:Concatenation and Conditional, Dataflow Modeling, Behavioral Modeling (if, case, casex, casez),Blocking Assignment, Non-Blocking assignment, Loop Statement(For, repeat, while and forever),Modeling sequential circuits Flip-flops, Counter, Shift register using Verilog. Structural Modeling,Task & Function.Verilog Description of Combinational circuits, Multiplexer, Decoder, Adder etc.

UNIT – IV 07 HrsDesign of Networks for Arithmetic Operations: Design of a Serial Adder with Accumulator, State Graphs for Control Networks.Design of a BinaryMultiplier, Multiplication of Signed Binary Numbers, Design of unsigned Binary Divider.


32/36

32

UNIT – V 09 HrsDigital Design with SM Charts:State Machine Charts, Derivation of SM Charts, Realization of SM Charts, Implementation of theDice Game. Derivation of SM Charts for Dice game module.Floating-Point Arithmetic:Representation of Floating-point Numbers, Floating-point Multiplication, Other Floating-point

Operations.Designing with Programmable Gate Arrays and CPLDs:Xilinx 3000 series FPGAs, Designing with FPGAs, Xilinx 4000 series FPGAs, Using a One- HotState Assignment, Altera Complex Programmable Logic Devices(CPLDs).Self Study:Seminars, Projects, Paper publication, etc. on emerging technologies pertaining to the subject 4Hrs/Week: 1 Credit

Practicals: HDL Lab 1. Write VHDL /VERILOG code to realize all the logic gates.2. Write VHDL / VERILOG program for the following combinational designs.

a.

2 to 4 decoder b. 8 to 3 (encoder without priority & with priority)c. 8 to 1 multiplexerd. 4 bit binary to gray convertere. Multiplexer, Demultiplexer, comparator

3. Write VHDL /VERILOG code to describe the functions of a Full Adder.4. Write a model for 8 bit ALU using the schematic diagram shown below.(example only)

a. ALU should use combinational logic to calculate an output based on the four bit op-code input. b. ALU should pass the result to the out bus when enable line in high, and tri-state the out bus

when the enable line is low.c. ALU should decode the 3 bit op-code according to the given in example below

OPCODE ALU OPERATION1. A + B2. A – B3. A Complement4. A * B5. A AND B6. A OR B7. A NAND B8. A XOR B

B (7:0)A (7:0)

Out

Opcode (2:0)


33/36

33

5. Develop VERILOG codes for the following flip-flops :D, JK, T.6. Design 4 bit binary, BCD counters (Synchronous reset and Asy nchronous reset) and “any

sequence” counters. 7. Write VERILOG code to display messages on the given seven segment display interface.8. Write VERILOG codes to display messages on the given LCD panel.9. Write VERILOG code to control speed and direction of stepper motor.

10. Write VERILOG code to read analog signals through the given ADC interface and displaythe values on the LCD panel.

NOTE: All the combinational logic to be done using FPGA and the sequential logic to be done usingCadence EDA Tool.

Reference Books:1. Charles H. Roth, “Digital Systems Design Using VHDL” , Thomson Learning, Inc, 1 st Edition,

2002.2. Samir Palnitkar, “Verilog HDL -A Guide to Digital Design & Synthesis”, SunSoft Press, 1 st

Edition, 1996.3. D Perry, “Introduction to VHDL P rogramming”, 4 th Edition, 2002.

4. Floyd, “ Digital Fundamentals using VHDL”, Pearson Education, 2

nd

Edition, 20035. J Bhaskar , “Verilog Primer”, Pearson / PHI, New Delhi, 3rd Edition, 2003

Course Outcomes: Ability to design and verify different digital blocks using HDLs. Ability to integrate various digital blocks and implement a complete digital system. Ability to prototype different architectures of various digital blocks and optimize the area,

speed and power. Ability to develop automatic control system for several applications. Ability to develop System On(SOC) Chip architecture for specific applications.


Scheme of Continuous Internal Evaluation: Practicals:A student is expected to conduct one experiment in the lab test.

Scheme of Semester End Examination:The question paper consists of Part A and Part B. Part A will be for 20 marks covering the completesyllabus and is compulsory. Part B will be for 80 marks and shall consist of five questions(descriptive, analytical, problems or/and design) carrying 16 marks each. All five from Part B willhave internal choice and one of the two have to be answered compulsorily.

Scheme of Semester End Examination: Practicals:A student is expected to conduct one experiment in the practical exam.


34/36


35/36

35

Scheme of Continuous Internal Evaluation:CIE consists of Two Tests each for 50 marks (20 marks for Quiz + 30 marks for descriptive).

Scheme of Semester End Examination:The question paper consists of Part A and Part B. Part A will be for 20 marks covering the completesyllabus and is compulsory. Part B will have eight questions out of which five questions have to be

answered.


36/36

3 n 4 sem syllabus of rvce

Documents