3. concurrency control for transactions€¦ · 3.1 a simple system model Ł goal - ensure...

52
3. Concurrency Control for Transactions Part One 4/1/07 1 CSEP 545 Transaction Processing Philip A. Bernstein Copyright '2007 Philip A. Bernstein

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Page 1: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

3. C

oncu

rren

cy C

ontro

lfo

r Tra

nsac

tions

Part

One

4/1/

071

CSE

P 54

5 Tr

ansa

ctio

n Pr

oces

sing

Phili

p A

. Ber

nste

in

Cop

yrig

ht ©

2007

Phi

lip A

. Ber

nste

in

Page 2: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

Out

line

1. A

Sim

ple

Syst

em M

odel

2. S

eria

lizab

ility

The

ory

3. S

ynch

roni

zatio

n R

equi

rem

ents

fo

r Rec

over

abili

ty

4/1/

072

4. T

wo-

Phas

e Lo

ckin

g5.

Pre

serv

ing

Tran

sact

ion

Han

dsha

kes

6. Im

plem

entin

g Tw

o-Ph

ase

Lock

ing

7. D

eadl

ocks

Page 3: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

3.1

A S

impl

e Sy

stem

Mod

el

�G

oal -

Ensu

re se

rializ

able

(SR

) exe

cutio

ns�

Impl

emen

tatio

n te

chni

que

-Del

ay o

pera

tions

th

at w

ould

lead

to n

on-S

R re

sults

(e.g

. set

lock

s on

shar

edda

ta)

4/1/

073

on sh

ared

dat

a)�

For g

ood

perf

orm

ance

min

imiz

e ov

erhe

ad a

nd

dela

yfr

om sy

nchr

oniz

atio

n op

erat

ions

�Fi

rst,

we�

ll st

udy

how

to g

et c

orre

ct (S

R) r

esul

ts�

Then

, we�

ll st

udy

perf

orm

ance

impl

icat

ions

(m

ostly

in P

art T

wo)

Page 4: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

Ass

umpt

ion

-Ato

mic

Ope

ratio

ns�

We

will

sync

hron

ize

Rea

ds a

nd W

rites

.�

We

mus

t the

refo

re a

ssum

e th

ey�r

e at

omic

�el

se w

e�d

have

to sy

nchr

oniz

e th

e fin

er-g

rain

ed

oper

atio

ns th

at im

plem

ent R

ead

and

Writ

e�

Rea

d(x)

-ret

urns

the

curr

entv

alue

ofx

inth

eD

B

4/1/

074

Rea

d(x)

re

turn

s the

cur

rent

val

ue o

f x in

the

DB

�W

rite(

x, v

al) o

verw

rites

all

of x

(the

who

le p

age)

�Th

is a

ssum

ptio

n of

ato

mic

ope

ratio

ns is

wha

t al

low

s us t

o ab

stra

ct e

xecu

tions

as s

eque

nces

of

read

s and

writ

es (w

ithou

t los

s of i

nfor

mat

ion)

.�

Oth

erw

ise,

wha

t wou

ld w

k[x]

r i[x

] mea

n?�

Als

o, c

omm

it (c

i) an

d ab

ort (

a i) a

re a

tom

ic

Page 5: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

Syst

em M

odel

Tran

sact

ion

1Tr

ansa

ctio

n N

Star

t, Co

mm

it, A

bort

Read

(x),

Writ

e(x)Tr

ansa

ctio

n 2

4/1/

075

Dat

aM

anag

er

Dat

abas

e

Page 6: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

3.2

Seria

lizab

ility

The

ory

�Th

e th

eory

is b

ased

on

mod

elin

g ex

ecut

ions

as

hist

orie

s, su

ch a

s H

1=

r 1[x

] r2[

x] w

1[x]

c1

w2[

y] c

2

�Fi

rst,

char

acte

rize

a co

ncur

renc

y co

ntro

l l

ithb

thti

fhi

ti

itll

4/1/

076

algo

rithm

by

the

prop

ertie

s of h

isto

ries i

t allo

ws.

�Th

en p

rove

that

any

his

tory

hav

ing

thes

e pr

oper

ties i

s SR

�W

hy b

othe

r? It

hel

ps y

ou u

nder

stan

d w

hy

conc

urre

ncy

cont

rol a

lgor

ithm

s wor

k.

Page 7: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

Equi

vale

nce

of H

isto

ries

�Tw

o op

erat

ions

con

flict

if th

eir e

xecu

tion

orde

r af

fect

s the

ir re

turn

val

ues o

r the

DB

stat

e.�

a re

ad a

nd w

rite

on th

e sa

me

data

item

con

flict

�tw

o w

rites

on

the

sam

e da

ta it

em c

onfli

cttw

ore

ads(

onth

esa

me

data

item

)do

notc

onfli

ct

4/1/

077

�tw

o re

ads (

on th

e sa

me

data

item

) do

notc

onfli

ct�

Two

hist

orie

s are

equ

ival

ent

if th

ey h

ave

the

sam

e op

erat

ions

and

con

flict

ing

oper

atio

ns a

re in

th

e sa

me

orde

r in

both

his

torie

s�

beca

use

only

the

rela

tive

orde

r of c

onfli

ctin

g op

erat

ions

can

aff

ect t

he re

sult

of th

e hi

stor

ies

Page 8: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

Exam

ples

of E

quiv

alen

ce�

The

follo

win

g hi

stor

ies a

re e

quiv

alen

tH

1=

r 1[x

] r2[

x] w

1[x]

c1

w2[

y] c

2H

2=

r 2[x

] r1[

x] w

1[x]

c1

w2[

y] c

2H

3=

r 2[x

] r1[

x] w

2[y]

c2

w1[

x] c

1H

4=

r 2[x

]w2[

y]c 2

r 1[x

]w1[

x]c 1

4/1/

078

H4

r 2[x

] w2[

y] c

2r 1

[x] w

1[x]

c1

�B

ut n

one

of th

em a

re e

quiv

alen

t to

H5

= r 1

[x] w

1[x]

r 2[x

] c1

w2[

y] c

2be

caus

e r 2

[x] a

nd w

1[x]

con

flict

and

r 2

[x] p

rece

des w

1[x]

in H

1-H

4, bu

tr 2

[x] f

ollo

ws w

1[x]

in H

5.

Page 9: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

Seria

lizab

le H

isto

ries

�A

his

tory

is se

rializ

able

if it

is e

quiv

alen

t to

a se

rial

hist

ory

�Fo

r exa

mpl

e,H

1=

r 1[x

] r2[

x] w

1[x]

c1

w2[

y] c

2

ii

ltt

4/1/

079

is e

quiv

alen

t to

H4

= r 2

[x] w

2[y]

c2

r 1[x

] w1[

x] c

1

(r2[

x] a

nd w

1[x]

are

in th

e sa

me

orde

r in

H1

and

H4.)

�Th

eref

ore,

H1

is se

rializ

able

.

Page 10: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

Ano

ther

Exa

mpl

e�

H6 =

r 1[x

] r2[

x] w

1[x]

r 3[x

] w2[

y] w

3[x]

c3

w1[

y] c

1c 2

is e

quiv

alen

t to

a se

rial e

xecu

tion

of T

2T 1

T 3,

H7

= r 2

[x] w

2[y]

c2

r 1[x

] w1[

x] w

1[y]

c1

r 3[x

] w3[

x] c

3

�Ea

chco

nflic

tim

plie

saco

nstra

into

nan

yeq

uiva

lent

4/1/

0710

�Ea

ch c

onfli

ct im

plie

s a c

onst

rain

t on

any

equi

vale

nt

seria

l his

tory

:

H6 =

r 1[x

] r2[

x] w

1[x]

r 3[x

] w2[

y] w

3[x]

c3

w1[

y] c

1c 2

T 2→

T 1T 1

→T 3

T 2→

T 1

T 2→

T 3

Page 11: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

Seria

lizat

ion

Gra

phs

�A

seria

lizat

ion

grap

h, S

G(H

), fo

r his

tory

H te

lls th

e ef

fect

ive

exec

utio

n or

der o

f tra

nsac

tions

in H

.�

Giv

en h

isto

ry H

, SG

(H) i

s a d

irect

ed g

raph

who

se

node

s are

the

com

mitt

ed tr

ansa

ctio

ns a

nd w

hose

ed

gesa

real

lT→

Tsu

chth

atat

leas

tone

ofT

�s

4/1/

0711

edge

s are

all

T i →

T ksu

ch th

at a

t lea

st o

ne o

f Ti

s op

erat

ions

pre

cede

s and

con

flict

s with

at l

east

one

of

Tk�

s ope

ratio

ns

H6 =

r 1[x

] r2[

x] w

1[x]

r 3[x

] w2[

y] w

3[x]

c3

w1[

y] c

1c 2

SG(H

6) =

T

2 →

T 1 →

T 3

Page 12: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

The

Seria

lizab

ility

The

orem

A h

isto

ry is

SR

if a

nd o

nly

if SG

(H) i

s acy

clic

.Pr

oof:

(if) S

G(H

) is a

cycl

ic. S

o le

t Hs

be a

seria

l hi

stor

y co

nsis

tent

with

SG

(H).

Each

pai

r of

conf

lictin

g op

s in

H in

duce

s an

edge

in S

G(H

). Si

nce

conf

lictin

gop

sin

Han

dH

are

inth

esa

me

4/1/

0712

Sinc

e co

nflic

ting

ops i

n H

san

d H

are

in th

e sa

me

orde

r, H

s≡H

, so

H is

SR

.(o

nly

if) H

is S

R. L

et H

sbe

a se

rial h

isto

ry e

quiv

alen

t to

H. W

e cl

aim

that

if T

i →T k

in S

G(H

), th

en T

ipr

eced

es T

kin

Hs

(els

e H

s ≢ H

). If

SG

(H) h

ad a

cy

cle,

T1→

T 2→

�→

T n→

T 1, t

hen

T 1pr

eced

es T

1in

H

s, a

cont

radi

ctio

n. S

o SG

(H) i

s acy

clic

.

Page 13: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

How

to U

se

the

Seria

lizab

ility

The

orem

�C

hara

cter

ize

the

set o

f his

torie

s tha

t a

conc

urre

ncy

cont

rol a

lgor

ithm

allo

ws

�Pr

ove

that

any

such

hist

ory

mus

thav

ean

4/1/

0713

Prov

e th

at a

ny su

ch h

isto

ry m

ust h

ave

an

acyc

lic se

rializ

atio

n gr

aph.

�Th

eref

ore,

the

algo

rithm

gua

rant

ees S

R

exec

utio

ns.

�W

e�ll

use

this

soon

to p

rove

that

lock

ing

prod

uces

seria

lizab

le e

xecu

tions

.

Page 14: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

3.3

Sync

hron

izat

ion

Req

uire

men

tsfo

r Rec

over

abili

ty�

In a

dditi

on to

gua

rant

eein

g se

rializ

abili

ty,

sync

hron

izat

ion

is n

eede

d to

impl

emen

t abo

rt ea

sily

.�

Whe

n a

trans

actio

n T

abor

ts, t

he d

ata

man

ager

wip

es

out a

ll of

T�s

eff

ects

, inc

ludi

ng

4/1/

0714

,g

�un

doin

g T�

s writ

es th

at w

ere

appl

ied

to th

e D

B, a

nd�

abor

ting

trans

actio

ns th

at re

ad v

alue

s writ

ten

by T

(thes

e ar

e ca

lled

casc

adin

g ab

orts

)�

Exam

ple

-w

1[x]

r 2[x

] w2[

y]

�to

abo

rt T 1

, we

mus

t und

o w

1[x]

and

abor

t T2

(a c

asca

ding

abo

rt)

Page 15: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

Rec

over

abili

ty�

If T

kre

ads f

rom

Tia

nd T

iabo

rts, t

hen

T km

ust a

bort

�Ex

ampl

e -w

1[x]

r 2[x

] a1 im

plie

s T2

mus

t abo

rt �

But

wha

t if T

kal

read

y co

mm

itted

? W

e�d

be st

uck.

�Ex

ampl

e -w

1[x]

r 2[x

] c2

a 1�

T 2ca

n�t a

bort

afte

r it c

omm

its

4/1/

0715

�Ex

ecut

ions

mus

t be

reco

vera

ble:

A tr

ansa

ctio

n T�

s com

mit

oper

atio

n m

ust f

ollo

w th

e co

mm

it of

eve

ry tr

ansa

ctio

n fr

om w

hich

T re

ad.

�R

ecov

erab

le -

w1[

x] r 2

[x] c

1c 2

�N

ot re

cove

rabl

e -w

1[x]

r 2[x

] c2

a 1�

Rec

over

abili

ty re

quire

s syn

chro

nizi

ng o

pera

tions

.

Page 16: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

Avo

idin

g C

asca

ding

Abo

rts�

Cas

cadi

ng a

borts

are

wor

th a

void

ing

to�

avoi

d co

mpl

ex b

ookk

eepi

ng, a

nd�

avoi

d an

unc

ontro

lled

num

ber o

f for

ced

abor

ts�

To a

void

cas

cadi

ng a

borts

, a d

ata

man

ager

shou

ld

ensu

retra

nsac

tions

only

read

com

mitt

edda

ta

4/1/

0716

ensu

re tr

ansa

ctio

ns o

nly

read

com

mitt

ed d

ata

�Ex

ampl

e�

avoi

ds c

asca

ding

abo

rts: w

1[x]

c1

r 2[x

]�

allo

ws c

asca

ding

abo

rts: w

1[x]

r 2[x

] a1

�A

syst

em th

at a

void

s cas

cadi

ng a

borts

als

o gu

aran

tees

reco

vera

bilit

y.

Page 17: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

Stric

tnes

s�

It�s c

onve

nien

t to

undo

a w

rite,

w[x

], by

rest

orin

g its

be

fore

imag

e (=

the

valu

e of

x b

efor

e w

[x] e

xecu

ted)

�Ex

ampl

e -w

1[x,

1] w

rites

the

valu

e �1

� in

to x

.�

w1[

x,1]

w1[

y,3]

c1

w2[

y,1]

r 2[x

] a2

�ab

ort T

2by

rest

orin

g th

e be

fore

imag

e of

w2[

y,1]

(i.e

. 3)

4/1/

0717

�B

ut th

is is

n�t a

lway

s pos

sibl

e.

�Fo

r exa

mpl

e, c

onsi

der w

1[x,

2] w

2[x,

3] a

1a 2

�a 1

& a

2ca

n�t b

e im

plem

ente

d by

rest

orin

g be

fore

imag

es�

notic

e th

at w

1[x,

2] w

2[x,

3] a

2a 1

wou

ld b

e O

K�

A sy

stem

is st

rict

if it

only

read

s or o

verw

rites

co

mm

itted

dat

a.

Page 18: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

Stric

tnes

s (co

nt�d

)�

Mor

e pr

ecis

ely,

a sy

stem

is st

rict

if it

only

exe

cute

s r i[

x] o

r wi[x

] if a

ll pr

evio

us tr

ansa

ctio

ns th

at w

rote

x

com

mitt

ed o

r abo

rted.

�Ex

ampl

es (�

��

mar

ks a

non

-stri

ct p

refix

)�

stric

t:

w

1[x]

c1

w2[

x] a

2

4/1/

0718

1[]

12[

]2

�no

t stri

ct: w

1[x]

w2[

x] �

c1

a 2�

stric

t:w

1[x]

w1[

y] c

1r 2

[x] w

2[y]

a2

�no

t stri

ct: w

1[x]

w1[

y] r 2

[x] �

c1

w2[

y] a

2

�To

see

why

stric

tnes

s mat

ters

in th

e ab

ove

hist

orie

s, co

nsid

er w

hat h

appe

ns if

T1

abor

ts�

�Stri

ct�

impl

ies �

avoi

ds c

asca

ding

abo

rts.�

Page 19: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

3.4

Two-

Phas

e Lo

ckin

g�

Bas

ic lo

ckin

g -E

ach

trans

actio

n se

ts a

lock

on e

ach

data

item

bef

ore

acce

ssin

g th

e da

ta�

the

lock

is a

rese

rvat

ion

�th

ere

are

read

lock

s and

writ

e lo

cks

�if

one

trans

actio

nha

saw

rite

lock

onx

then

noot

her

4/1/

0719

if on

e tra

nsac

tion

has a

writ

e lo

ck o

n x,

then

no

othe

r tra

nsac

tion

can

have

any

lock

on

x�

Exam

ple

�rl i

[x],

rui[x

], w

l i[x]

, wu i

[x] d

enot

e lo

ck/u

nloc

k op

erat

ions

�w

l 1[x]

w1[

x] rl

2[x]

r 2[x

] is i

mpo

ssib

le�

wl 1[

x] w

1[x]

wu 1

[x]r

l 2[x]

r 2[x

] is O

K

Page 20: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

Bas

ic L

ocki

ng Is

n�t E

noug

h�

Bas

ic lo

ckin

g do

esn�

t gua

rant

ee se

rializ

abili

ty

�rl 1

[x] r

1[x]

ru1[

x]

wl 1[

y] w

1[y]

wu 1

[y]c

1

rl 2[y

] r2[

y] w

l 2[x]

w2[

x] ru

2[y]

wu 2

[x] c

2

�El

imin

atin

gth

elo

ckop

erat

ions

we

have

4/1/

0720

�El

imin

atin

g th

e lo

ck o

pera

tions

, we

have

r 1[x

] r2[

y] w

2[x]

c2 w

1[y]

c1 w

hich

isn�

t SR

�Th

e pr

oble

m is

that

lock

s are

n�t b

eing

rele

ased

pr

oper

ly.

Page 21: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

Two-

Phas

e Lo

ckin

g (2

PL) P

roto

col

�A

tran

sact

ion

is tw

o-ph

ase

lock

edif:

�be

fore

read

ing

x, it

sets

a re

ad lo

ck o

n x

�be

fore

writ

ing

x, it

sets

a w

rite

lock

on

x�

it ho

lds e

ach

lock

unt

il af

ter i

t exe

cute

s the

co

rres

pond

ing

oper

atio

n

4/1/

0721

�af

ter i

ts fi

rst u

nloc

k op

erat

ion,

it re

ques

ts n

o ne

w lo

cks

�Ea

ch tr

ansa

ctio

n se

ts lo

cks d

urin

g a

grow

ing

phas

e an

d re

leas

es th

em d

urin

g a

shri

nkin

g ph

ase.

�Ex

ampl

e -o

n th

e pr

evio

us p

age

T 2is

two-

phas

e lo

cked

, but

not

T1

sinc

e ru

1[x]

< w

l 1[y]

�us

e �<

� fo

r �pr

eced

es�

Page 22: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

2PL

The

orem

:If a

ll tra

nsac

tions

in a

n ex

ecut

ion

are

two-

phas

e lo

cked

, the

n th

e ex

ecut

ion

is S

R.

Proo

f:D

efin

e T i⇒

T k if

eith

er�

T ire

ad x

and

Tk

late

r wro

te x

, or

�T i

wro

te x

and

Tk

late

r rea

d or

wro

te x

�If

Ti⇒

T k, t

hen

T ire

leas

ed a

lock

bef

ore

T kob

tain

ed so

me

lock

.

4/1/

0722

�If

Ti⇒

T k ⇒

T m, t

hen

T ire

leas

ed a

lock

bef

ore

T mob

tain

ed so

me

lock

(bec

ause

Tk

is tw

o-ph

ase)

.�

If T

i⇒...⇒

T i, t

hen

T ire

leas

ed a

lock

bef

ore

T iob

tain

ed so

me

lock

, bre

akin

g th

e 2-

phas

e ru

le.

�So

ther

e ca

nnot

be

a cy

cle.

By

the

Seria

lizab

ility

Th

eore

m, t

he e

xecu

tion

is S

R.

Page 23: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

2PL

and

Rec

over

abili

ty�

2PL

does

not

guar

ante

e re

cove

rabi

lity

�Th

is n

on-r

ecov

erab

le e

xecu

tion

is 2

-pha

se lo

cked

wl 1[

x] w

1[x]

wu 1

[x] r

l 2[x]

r 2[x

] c2

� c

1�

henc

e, it

is n

ot st

rict a

nd a

llow

s cas

cadi

ng a

borts

4/1/

0723

�H

owev

er, h

oldi

ng w

rite

lock

s unt

il af

terc

omm

it or

ab

ort g

uara

ntee

s stri

ctne

ss�

and

henc

e av

oids

cas

cadi

ng a

borts

and

is re

cove

rabl

e�

In th

e ab

ove

exam

ple,

T1

mus

t com

mit

befo

re it

s firs

t un

lock

-writ

e (w

u 1):

wl 1[

x] w

1[x]

c1

wu 1

[x] r

l 2[x]

r 2[x

] c2

Page 24: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

Aut

omat

ing

Lock

ing

�2P

L ca

n be

hid

den

from

the

appl

icat

ion

�W

hen

a da

ta m

anag

er g

ets a

Rea

d or

Writ

e op

erat

ion

from

a tr

ansa

ctio

n, it

sets

a re

ad o

r writ

e lo

ck.

�H

owdo

esth

eda

tam

anag

erkn

owit�

ssaf

eto

4/1/

0724

How

doe

s the

dat

a m

anag

er k

now

its s

afe

to

rele

ase

lock

s (an

d be

two-

phas

e)?

�O

rdin

arily

, the

dat

a m

anag

er h

olds

a tr

ansa

ctio

n�s

lock

s unt

il it

com

mits

or a

borts

. A d

ata

man

ager

can

rele

ase

read

lock

s afte

r it r

ecei

vesc

omm

it�

rele

ases

writ

elo

cks o

nly

afte

r pro

cess

ing

com

mit,

to e

nsur

e st

rictn

ess

Page 25: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

3.5

Pres

ervi

ng T

rans

actio

n H

ands

hake

s

�R

ead

and

Writ

e ar

e th

e on

ly o

pera

tions

the

syst

em w

ill c

ontro

l to

atta

in se

rializ

abili

ty.

�So

, if t

rans

actio

ns c

omm

unic

ate

via

mes

sage

s, th

en im

plem

ent S

endM

sg a

s Writ

e, a

nd

4/1/

0725

pg

,R

ecei

veM

sg a

s Rea

d.�

Else

, you

cou

ld h

ave

the

follo

win

g:w

1[x]

r 2[x

] sen

d 2[M

] rec

eive

1[M

]�

data

man

ager

did

n�t k

now

abo

ut se

nd/re

ceiv

e an

d th

ough

t the

exe

cutio

n w

as S

R.

�A

lso

wat

ch o

ut fo

r bra

in tr

ansp

ort

Page 26: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

Tran

sact

ions

Can

Com

mun

icat

e vi

a B

rain

Tr

ansp

ort

T1: Start

. . .

Display output

Commit

Use

r rea

ds o

utpu

t� U

sere

nter

sinp

ut

Bra

intra

nspo

rt

4/1/

0726

T2: Start

Get input from display

. . .

Commit

Use

r ent

ers i

nput

Page 27: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

Bra

in T

rans

port

(con

t�d)

�Fo

r pra

ctic

al p

urpo

ses,

if us

er w

aits

for T

1to

co

mm

it be

fore

star

ting

T 2, t

hen

the

data

man

ager

ca

n ig

nore

bra

in tr

ansp

ort.

�Th

is is

cal

led

a tra

nsac

tion

hand

shak

e(

ib

f)

4/1/

0727

(T1

com

mits

bef

ore

T 2st

arts

) �

Rea

son

-Loc

king

pre

serv

es th

e or

der i

mpo

sed

by

trans

actio

n ha

ndsh

akes

�e.

g., i

t ser

ializ

es T

1be

fore

T2.

Page 28: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

2PL

Pres

erve

s Tra

nsac

tion

Han

dsha

kes

�2P

L se

rializ

es tr

ansa

ctio

ns (a

bbr.

txns

) con

sist

ent

with

all

trans

actio

n ha

ndsh

akes

. I.e

. the

re�s

an

equi

vale

nt se

rial e

xecu

tion

that

pre

serv

es th

e tra

nsac

tion

orde

r of t

rans

actio

n ha

ndsh

akes

�Th

isis

n�tt

rue

fora

rbitr

ary

SRex

ecut

ions

Eg

4/1/

0728

�Th

is is

nt t

rue

for a

rbitr

ary

SR e

xecu

tions

. E.g

.�

r 1[x

] w2[

x] c

2r 3

[y] c

3w

1[y]

c1

�T 2

com

mits

bef

ore

T 3st

arts

, but

the

only

equ

ival

ent

seria

l exe

cutio

n is

T3

T 1T 2

�rl 1

[x] r

1[x]

wl 1[

y] ru

1[x]

wl 2[

x] w

2[x]

wu 2

[x] c

2bu

t now

we�

re st

uck,

sinc

e w

e ca

n�t s

et rl

3[y]

r 3[y

].So

the

hist

ory

cann

ot o

ccur

usi

ng 2

PL.

Page 29: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

2PL

Pres

erve

s Tra

nsac

tion

Han

dsha

kes (

cont

�d)

�St

atin

g th

is m

ore

form

ally

��

Theo

rem

: Fo

rany

2PL

exec

utio

nH

4/1/

0729

For a

ny 2

PL e

xecu

tion

H,

ther

e is

an

equi

vale

nt se

rial e

xecu

tion

Hs,

such

that

for a

ll T i

, Tk,

if T i

com

mitt

ed b

efor

e T k

star

ted

in H

, th

en T

ipre

cede

s Tk

in H

s.

Page 30: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

Bra

in T

rans

port

⎯O

ne L

ast T

ime

�If

a u

ser r

eads

com

mitt

ed d

ispl

ayed

out

put o

f Ti

and

uses

that

dis

play

ed o

utpu

t as i

nput

to

trans

actio

n T k

, the

n he

/she

shou

ld w

ait f

orT

toco

mm

itbe

fore

star

ting

T

4/1/

0730

T ito

com

mit

befo

re st

artin

g T k

.�

The

user

can

then

rely

on

trans

actio

n ha

ndsh

ake

pres

erva

tion

to e

nsur

e T i

is se

rializ

ed b

efor

e T k

.

Page 31: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

3.6

Impl

emen

ting

Two-

Phas

e Lo

ckin

g�

Even

if y

ou n

ever

impl

emen

t a D

B sy

stem

, it�s

va

luab

le to

und

erst

and

lock

ing

impl

emen

tatio

n,

beca

use

it ca

n ha

ve a

big

eff

ect o

n pe

rfor

man

ce.

�A

dat

a m

anag

er im

plem

ents

lock

ing

by

4/1/

0731

�im

plem

entin

g a

lock

man

ager

�se

tting

a lo

ck fo

r eac

h R

ead

and

Writ

e�

hand

ling

dead

lock

s

Page 32: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

Syst

em M

odel

Tran

sact

ion

1Tr

ansa

ctio

n N

Star

t,SQ

L O

psCo

mm

it, A

bort

4/1/

0732

Dat

abas

eSy

stem

Que

ry O

ptim

izer

Que

ry E

xecu

tor

Acc

ess M

etho

d(r

ecor

d-or

ient

ed fi

les)

Page

-orie

nted

File

s

Dat

abas

e

Page 33: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

How

to Im

plem

ent S

QL

�Q

uery

Opt

imiz

er -

trans

late

s SQ

L in

to a

n or

dere

d ex

pres

sion

of r

elat

iona

l DB

ope

rato

rs (S

elec

t, Pr

ojec

t, Jo

in)

�Q

uery

Exe

cuto

r -ex

ecut

es th

e or

dere

d ex

pres

sion

b

if

hhi

hi

4/1/

0733

by ru

nnin

g a

prog

ram

for e

ach

oper

ator

, whi

ch in

tu

rn a

cces

ses r

ecor

ds o

f file

s�

Acc

ess m

etho

ds -

prov

ides

inde

xed

reco

rd-a

t-a-

time

acce

ss to

file

s (O

penS

can,

Get

Nex

t, �

)�

Page

-orie

nted

file

s -R

ead

or W

rite

(pag

e ad

dres

s)

Page 34: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

Whi

ch O

pera

tions

Get

Syn

chro

nize

d?

Rec

ord-

orie

nted

ope

ratio

ns

Pag

e-or

ient

ed o

pera

tions

SQ

L op

erat

ions

Que

ry O

ptim

izer

Que

ry E

xecu

tor

Acc

ess M

etho

d(r

ecor

d-or

ient

ed fi

les)

Page

-orie

nted

File

s

4/1/

0734

�It�

s a tr

adeo

ff be

twee

n �

amou

nt o

f con

curr

ency

and

runt

ime

expe

nse

and

prog

ram

min

g co

mpl

exity

of

sync

hron

izat

ion

Page 35: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

Lock

Man

ager

�A

lock

man

ager

serv

ices

the

oper

atio

ns�

Lock

(tran

s-id

, dat

a-ite

m-id

, mod

e)�

Unl

ock(

trans

-id, d

ata-

item

-id)

�U

nloc

k(tra

ns-id

)�

Itst

ores

lock

sin

alo

ckta

ble

Lock

opin

serts

4/1/

0735

It st

ores

lock

s in

a lo

ck ta

ble.

Loc

k op

inse

rts

[tran

s-id

, mod

e] in

the

tabl

e. U

nloc

k de

lete

s it.

Dat

a Ite

mLi

st o

f Loc

ks

Wai

t Lis

tx

[T1,r

] [T 2

,r]

[T

3,w]

y

[T

4,w]

[T5,w

] [T 6

, r]

Page 36: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

Lock

Man

ager

(con

t�d)

�C

alle

r gen

erat

es d

ata-

item

-id, e

.g. b

y ha

shin

g da

ta

item

nam

e�

The

lock

tabl

e is

has

hed

on d

ata-

item

-id�

Lock

and

Unl

ock

mus

t be

atom

ic, s

o ac

cess

to th

e l

kt

bltb

�lk

d�

4/1/

0736

lock

tabl

e m

ust b

e �l

ocke

d�

�Lo

ck a

nd U

nloc

k ar

e ca

lled

freq

uent

ly. T

hey

mus

t be

ver

y fa

st. A

vera

ge <

100

inst

ruct

ions

.�

This

is h

ard,

in p

art d

ue to

slow

com

pare

-and

-sw

ap

oper

atio

ns n

eede

d fo

r ato

mic

acc

ess t

o lo

ck ta

ble

Page 37: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

Lock

Man

ager

(con

t�d)

�In

MS

SQL

Serv

er�

Lock

s are

app

rox

32 b

ytes

eac

h.�

Each

lock

cont

ains

aD

atab

ase-

ID,O

bjec

t-Id,

and

othe

r

4/1/

0737

Each

lock

con

tain

s a D

atab

ase

ID, O

bjec

tId,

and

oth

er

reso

urce

-spe

cific

lock

info

rmat

ion

such

as r

ecor

d id

(R

ID) o

r key

. �

Each

lock

is a

ttach

ed to

lock

reso

urce

blo

ck (6

4 by

tes)

an

d lo

ck o

wne

r blo

ck (3

2 by

tes)

Page 38: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

Lock

ing

Gra

nula

rity

�G

ranu

larit

y-s

ize

of d

ata

item

s to

lock

�e.

g., f

iles,

page

s, re

cord

s, fie

lds

�C

oars

e gr

anul

arity

impl

ies

�ve

ry fe

w lo

cks,

so li

ttle

lock

ing

over

head

�m

ust l

ock

larg

e ch

unks

of d

ata,

so h

igh

chan

ce o

f

4/1/

0738

g,

gco

nflic

t, so

con

curr

ency

may

be

low

�Fi

ne g

ranu

larit

y im

plie

s�

man

y lo

cks,

so h

igh

lock

ing

over

head

�lo

ckin

g co

nflic

t occ

urs o

nly

whe

n tw

o tra

nsac

tions

try

to a

cces

s the

exa

ct sa

me

data

con

curr

ently

�H

igh

perf

orm

ance

TP

requ

ires r

ecor

d lo

ckin

g

Page 39: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

Mul

tigra

nula

rity

Lock

ing

(MG

L)�

Allo

w d

iffer

ent t

xns t

o lo

ck a

t diff

eren

t gra

nula

rity

�bi

g qu

erie

s sho

uld

lock

coa

rse-

grai

ned

data

(e.g

. tab

les)

�sh

ort t

rans

actio

ns lo

ck fi

ne-g

rain

ed d

ata

(e.g

. row

s)�

Lock

man

ager

can

�t de

tect

thes

e co

nflic

ts�

each

dat

a ite

m (e

.g.,

tabl

e or

row

) has

a d

iffer

ent i

d

4/1/

0739

�M

ultig

ranu

larit

y lo

ckin

g �t

rick�

�ex

ploi

t the

nat

ural

hie

rarc

hy o

f dat

a co

ntai

nmen

t�

befo

re lo

ckin

g fin

e-gr

aine

d da

ta, s

et in

tent

ion

lock

son

coar

se

grai

ned

data

that

con

tain

s it

�e.

g., b

efor

e se

tting

a re

ad-lo

ck o

n a

row

, get

an

inte

ntio

n-re

ad-lo

ck o

n th

e ta

ble

that

con

tain

s the

row

�In

tent

ion-

read

-lock

s con

flict

s with

a w

rite

lock

Page 40: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

3.7

Dea

dloc

ks�

A se

t of t

rans

actio

ns is

dea

dloc

ked

if ev

ery

trans

actio

n in

the

set i

s blo

cked

and

will

rem

ain

bloc

ked

unle

ss th

e sy

stem

inte

rven

es.

�Ex

ampl

erl 1

[x]

gran

ted

rl 2[y

]gr

ante

d

4/1/

0740

wl 2[

x]bl

ocke

dw

l 1[y]

bloc

ked

and

dead

lock

ed�

Dea

dloc

k is

2PL

�s w

ay to

avo

id n

on-S

R e

xecu

tions

�rl 1

[x] r

1[x]

rl2[

y] r 2

[y] �

can

�t ru

n w

2[x]

w1[

y] a

nd b

e SR

�To

repa

ir a

dead

lock

, you

mus

tabo

rt a

trans

actio

n�

if yo

u re

leas

ed a

tran

sact

ion�

s loc

k w

ithou

t abo

rting

it,

you�

d br

eak

2PL

Page 41: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

Dea

dloc

k Pr

even

tion

�N

ever

gra

nt a

lock

that

can

lead

to d

eadl

ock

�O

ften

advo

cate

d in

ope

ratin

g sy

stem

s�

Use

less

for T

P, b

ecau

se it

wou

ld re

quire

runn

ing

trans

actio

ns se

rially

.�

Exam

ple

to p

reve

nt th

e pr

evio

us d

eadl

ock,

4/1/

0741

pp

p,

rl 1[x

] rl 2[

y] w

l 2[x]

wl 1[

y], t

he sy

stem

can

�t gr

ant r

l 2[y]

�A

void

ing

dead

lock

by

reso

urce

ord

erin

g is

unu

sabl

e in

gen

eral

, sin

ce it

ove

rly c

onst

rain

s app

licat

ions

.�

But

may

hel

p fo

r cer

tain

hig

h fr

eque

ncy

dead

lock

s�

Setti

ng a

ll lo

cks w

hen

txn

begi

ns re

quire

s too

muc

h ad

vanc

e kn

owle

dge

and

redu

ces c

oncu

rren

cy.

Page 42: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

Dea

dloc

k D

etec

tion

�D

etec

tion

appr

oach

: Det

ect d

eadl

ocks

aut

omat

ical

ly,

and

abor

t a d

eadl

ocke

d tra

nsac

tions

(the

vic

tim).

�It�

s the

pre

ferr

ed a

ppro

ach,

bec

ause

it�

allo

ws h

ighe

r res

ourc

e ut

iliza

tion

and

�us

es c

heap

er a

lgor

ithm

s

4/1/

0742

�Ti

meo

ut-b

ased

dea

dloc

k de

tect

ion

-If a

tran

sact

ion

is b

lock

ed fo

r too

long

, the

n ab

ort i

t.�

Sim

ple

and

easy

to im

plem

ent

�B

ut a

borts

unn

eces

saril

y an

d �

som

e de

adlo

cks p

ersi

st fo

r too

long

Page 43: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

Det

ectio

n U

sing

Wai

ts-F

or G

raph

�Ex

plic

it de

adlo

ck d

etec

tion

-Use

a W

aits

-For

Gra

ph�

Nod

es =

{tra

nsac

tions

}�

Edge

s={T

i→T k

|Tii

swai

ting

forT

kto

rele

ase

alo

ck}

4/1/

0743

Edge

s {

T i→

T k| T

iis w

aitin

g fo

r Tk

to re

leas

e a

lock

}�

Exam

ple

(pre

viou

s dea

dloc

k)

T 1

T 2

�Th

eore

m: I

f the

re�s

a d

eadl

ock,

then

the

wai

ts-f

or

grap

h ha

s a c

ycle

.

Page 44: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

Det

ectio

n U

sing

Wai

ts-F

or G

raph

(c

ont�d

)�

So, t

o fin

d de

adlo

cks

�w

hen

a tra

nsac

tion

bloc

ks, a

dd a

n ed

ge to

the

grap

h�

perio

dica

lly c

heck

for c

ycle

s in

the

wai

ts-f

or g

raph

Nd

tttf

ddl

kt

ft(A

l

4/1/

0744

�N

eed

not t

est f

or d

eadl

ocks

too

ofte

n. (A

cyc

le

won

�t di

sapp

ear u

ntil

you

dete

ct it

and

bre

ak it

.)�

Whe

n a

dead

lock

is d

etec

ted,

sele

ct a

vic

tim fr

om

the

cycl

e an

d ab

ort i

t.�

Sele

ct a

vic

tim th

at h

asn�

t don

e m

uch

wor

k (e

.g.,

has s

et th

e fe

wes

t loc

ks).

Page 45: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

Cyc

lic R

esta

rt�

Tran

sact

ions

can

cau

se e

ach

othe

r to

abor

t for

ever

.�

T 1st

arts

runn

ing.

The

n T 2

star

ts ru

nnin

g.

�Th

ey d

eadl

ock

and

T 1 (t

he o

ldes

t) is

abo

rted.

�T 1

rest

arts

, bum

ps in

to T

2an

d ag

ain

dead

lock

sT

(hld

)ib

d

4/1/

0745

�T 2

(the

old

est)

is a

borte

d ...

�C

hoos

ing

the

youn

gest

in a

cyc

le a

s vic

tim a

void

s cy

clic

rest

art,

sinc

e th

e ol

dest

runn

ing

trans

actio

n is

ne

ver t

he v

ictim

.�

Can

com

bine

with

oth

er h

euris

tics,

e.g.

few

est-l

ocks

Page 46: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

MS

SQL

Serv

er�

Abo

rts th

e tra

nsac

tion

that

is �

chea

pest

� to

roll

back

. �

�Che

apes

t� is

det

erm

ined

by

the

amou

nt o

f log

ge

nera

ted.

Allo

wst

rans

actio

nsth

atyo

u�ve

inve

sted

alo

tin

to

4/1/

0746

�A

llow

s tra

nsac

tions

that

you

ve in

vest

ed a

lot i

n to

co

mpl

ete.

�SE

T D

EAD

LOC

K_P

RIO

RIT

Y L

OW

(v

s. N

OR

MA

L) c

ause

s a tr

ansa

ctio

n to

sacr

ifice

its

elf a

s a v

ictim

.

Page 47: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

Dis

tribu

ted

Lock

ing

�Su

ppos

e a

trans

actio

n ca

n ac

cess

dat

a at

man

y da

ta m

anag

ers

�Ea

ch d

ata

man

ager

sets

lock

s in

the

usua

l way

Wh

ii

bi

4/1/

0747

�W

hen

a tra

nsac

tion

com

mits

or a

borts

, it r

uns

two-

phas

e co

mm

it to

not

ify a

ll da

ta m

anag

ers i

t ac

cess

ed�

The

only

rem

aini

ng is

sue

is d

istri

bute

d de

adlo

ck

Page 48: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

Dis

tribu

ted

Dea

dloc

k�

The

dead

lock

span

s tw

o no

des.

Nei

ther

nod

e al

one

can

see

it.

rl 1[x

]w

l 2[x]

(blo

cked

)

Nod

e 1

rl 2[y

]w

l 1[y]

(blo

cked

)

Nod

e 2

4/1/

0748

�Ti

meo

ut-b

ased

det

ectio

n is

pop

ular

. Its

wea

knes

ses

are

less

impo

rtant

in th

e di

strib

uted

cas

e:�

abor

ts u

nnec

essa

rily

and

som

e de

adlo

cks p

ersi

st to

o lo

ng�

poss

ibly

abo

rt yo

unge

r unb

lock

ed tr

ansa

ctio

n to

avo

id

cycl

ic re

star

t

Page 49: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

Ora

cle

Dea

dloc

k H

andl

ing

�U

ses a

wai

ts-f

or g

raph

for s

ingl

e-se

rver

de

adlo

ck d

etec

tion.

�Th

etra

nsac

tion

that

dete

ctst

hede

adlo

ckis

4/1/

0749

The

trans

actio

n th

at d

etec

ts th

e de

adlo

ck is

th

e vi

ctim

.�

Use

s tim

eout

s to

dete

ct d

istri

bute

d de

adlo

cks.

Page 50: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

Fanc

ier D

ist�d

Dea

dloc

k D

etec

tion

�U

se w

aits

-for

gra

ph c

ycle

det

ectio

n w

ith a

cen

tral

dead

lock

det

ectio

n se

rver

�m

ore

wor

k th

an ti

meo

ut-b

ased

det

ectio

n, a

nd n

o ev

iden

ce it

doe

s bet

ter,

perf

orm

ance

-wis

e�

phan

tom

dea

dloc

ks?

-No,

bec

ause

eac

h w

aits

-for

edg

e

4/1/

0750

is a

n SG

edg

e. S

o, W

FG c

ycle

=>

SG c

ycle

(m

odul

o sp

onta

neou

s abo

rts)

�Pa

th p

ushi

ng (a

.k.a

. flo

odin

g) -

Send

pat

hs T

i→�

T kto

eac

h no

de w

here

Tk

mig

ht b

e bl

ocke

d.�

Det

ects

shor

t cyc

les q

uick

ly�

Har

d to

kno

w w

here

to se

nd p

aths

. Po

ssib

ly to

o m

any

mes

sage

s

Page 51: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

Wha

t�s C

omin

g in

Par

t Tw

o?�

Lock

ing

Perf

orm

ance

�M

ore

deta

ils o

n m

ultig

ranu

larit

y lo

ckin

g�

Hot

spot

tech

niqu

es

4/1/

0751

Hot

spot

tech

niqu

es�

Que

ry-U

pdat

e Te

chni

ques

�Ph

anto

ms

�B

-Tre

es a

nd T

ree

lock

ing

Page 52: 3. Concurrency Control for Transactions€¦ · 3.1 A Simple System Model Ł Goal - Ensure serializable (SR) executions Ł Implementation technique - Delay operations that would lead

Lock

ing

Perf

orm

ance

�Th

e fo

llow

ing

is o

vers

impl

ified

. We�

ll re

visi

t it.

�D

eadl

ocks

are

rare

. �

Typi

cally

1-2

% o

f tra

nsac

tions

dea

dloc

k.�

Lock

ing

perf

orm

ance

pro

blem

s are

not

rare

.

4/1/

0752

�Th

e pr

oble

m is

too

muc

h bl

ocki

ng.

�Th

e so

lutio

n is

to re

duce

the

�loc

king

load

��

Goo

d he

uris

tic �

If m

ore

than

30%

of t

rans

actio

ns

are

bloc

ked,

then

redu

ce th

e nu

mbe

r of c

oncu

rren

t tra

nsac

tions