250w hbt doherty
TRANSCRIPT
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250W HVHBT Doherty with 57% WCDMA Efficiency
Linearized to -55dBc for 2c11 6.5dB PAR
Craig Steinbeiser, Thomas Landon, Charles Suckling
TriQuint Semiconductor, 500 W. Renner Road, Richardson, Texas 75080 USA
Abstract A 2-way symmetrical Doherty amplifier exhibiting250W saturated power has been developed using High-VoltageHBT (HVHBT) GaAs technology biased at 28V on the Collector.Greater than 57% collector efficiency at 50W (47dBm) averageoutput power has been demonstrated while achieving 55dBclinearized ACPR at 5MHz offset using a 2-carrier-side-by-sideWCDMA input signal with 6.5dB peak to average ratio measuredat .01% probability on the CCDF. At this condition, themeasured overall power-added efficiency is 53%. The HVHBTDoherty exhibits 200W (53dBm) P1dB at 70% efficiency with57% efficiency at 6dB output back-off (OBO) from P1dBshowing a 25 percentage point improvement over class ABoperation.
Index Terms GaAs HVHBT, Doherty, efficiency, WCDMA,digital pre-distortion, power amplifier.
I. INTRODUCTION
Recent developments in High Voltage Heterojunction
Bipolar Transistor (HVHBT) GaAs technology have enabled
significant advancement in WCDMA basestation RF power
amplifier efficiency.
The highest priority and main concern of base-station
designers is focused on RF power amplifier efficiency-
enhancement solutions due to the high efficiency RF lineup
requirement for multi-carrier WCDMA high power base-
stations. Class AB amplifiers are no longer attractive for use
in the final power stage, even with the best crest reduction
algorithms.
To improve WCDMA RF power amplifier efficiency, the
Doherty amplifier has been investigated and is well
documented in the literature [1,2]. As an advantage, the
Doherty amplifier enhances efficiency without need of any
additional complex circuitry. However, the load modulation
of the carrier amplifier may create a challenge for some
simple types of digital pre-distortion linearization.
In this work we present a 250W HVHBT Doherty amplifierthat exhibits WCDMA efficiency rivaling results reported for
more complex envelope tracking solutions utilizing
LDMOS[3] and GaN[4] technology. We observed greater
than 57% collector efficiency at 50W (47dBm) average output
power while achieving 55dBc linearized ACPR at 5MHz
offset using a 2-carrier-side-by-side WCDMA input signal
with 6.5dB peak to average ratio measured at .01% probability
on the CCDF.
In this paper we describe a relatively simple design method
that performed remarkably well, producing a HVHBT
Doherty that exhibits 200W (53dBm) P1dB at 70% efficiency
with 57% efficiency at 6dB output-back-off (OBO) from
P1dB. The HVHBT Doherty amplifier is shown to improve
efficiency by 25 points over class AB at 6dB OBO from
P1dB. In addition the HVHBT Doherty amplifier is shown to
be compatible with industry standard pre-distortion
technology improving adjacent channel ACPR by more than
20dB.
II. PACKAGED DEVICE
Transistor devices in this work are fabricated using
TriQuints proprietary InGaP GaAs High-Voltage
Heterojunction Bipolar Transistor (HVHBT) process. Figure
1 shows a top view of a single-ended HVHBT module that
exhibits 100W (50dBm) at P1dB.
Fig. 1. Photograph of HVHBT Module that exhibits 100W(50dBm) at P1dB. Base (bottom lead) Collector (top chamferedlead) and Emitter (flange).
The module consists of two HVHBT transistor die each
capable of delivering 50W (47dBm) at P1dB. Internal
prematching circuits are fabricated using TriQuints standardGaAs passive process. The output impedance is near 2-j2 at
2140MHz enabling an easily realizable output matching
network.
The module is routinely measured on a 50 single-ended
test fixture biased Class AB with a quiescent collector current
of 400mA and an operating voltage of 28V. CW P1dB
compression is typically 100W (50dBm) with collector
efficiency of 65%. CW P4dB is typically 140W (51.4dBm)
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with collector efficiency of 72%. Single carrier WCDMA
efficiency is typically 36% at 25W (44dBm) average output
power linearized to 60dBc using an input signal with
PAR=7.5dB. At 44dBm gain is typically 14.5dB.
III.DOHERTY PALLET
represented our
adjustments. The optimum values forc & p
ed in the three follo
Fi
2. Without this phase
adjustment the impedance would have been 1.1-j1.4,
approximate
ig. 4. Output impedance presented at peak power (2-j2) and 6dB
O
carrier amplifier shifted by a small but appreciable amount.
A symmetric 2-way Doherty amplifier was designed to
boost efficiency at 6dB Output-Back-Off from P1dB (OBO)
shown in figure 2.
Fig. 2. Photograph of Doherty Amplifier.
The Doherty amplifier is composed of a main amplifier and
a peaking amplifier employing a pair of 100W (50dBm)
HVHBT GaAs modules. The carrier amplifier is biased Class
AB at 550mA collector current. The peaking amplifier is
biased well below turn-on at 550mV.
A. Design Method
Theory of Doherty operation is well covered in the
literature[5]. In Doherty operation the efficiency boost
achieved is a result of modulating the carrier amplifier load
between Ropt at peak output power and 2Ropt at 6dB OBO.
For our Doherty amp we choose a simple 50 Doherty output
combining network. This allowed re-use of matching
elements previously developed for the 50 single-ended class
AB test fixture. To achieve the desired load modulation at
the carrier amplifier module output reference plane it is
important to have the correct phase offset (c) between theoutput match of the carrier amplifier and the Doherty
combiner. Equally vital for good Doherty performance is to
ensure the peaking amplifier does not load the carrier
amplifier when the output power level is at or below 6dB
OBO. This too can be achieved with an optimized phase
offset (p).
For this design, the general approach was to model the load
presented to the carrier amplifier at and below 6dB OBO. A
model of the Doherty combiner including both device output
matching sections (Zc & Zp) was developed in AWR, see
figure 3. Due to physical PCB layout constraints, additional
wavelength 50 transmission lines were added to the
model. Last, 50 transmission lines of electrical length = c
andp were added to the model. c & p
phase offset
were determin wing steps.
g. 3. Block Diagram of Doherty Combiner AWR Model.
First, recall the class AB target measured at the module
output reference plane, Ropt, was 2-j2. In a Doherty amplifier
operating at 6 dB OBO the carrier amplifier load target should
be 2Ropt, or 4-j2. In the AWR model, the peaking arm was
disconnected at the TEE junction and replaced with an open
circuit stub. Next c was adjusted until the load presented to
the carrier amplifier rotated to 4-j
ly 90 degrees off target.
F
BO (4-j2) plotted on a 4.2 ohm smith chart.
The next step was to account for the effect of the peaking
amplifiers off-state output impedance. The peaking arm was
reconnected to the TEE junction andp was set to equal c.
The peaking amplifier module port was then loaded with the
off-state s-parameters of the 100W (50dBm) HVHBT module.
After simulation it was noted that the load presented to the
c
p
Rt
50
Dohertytw
Zcorkne
Zp
0 1
.0
0
.2
- 0. 2
0
.4
- 0.4
6
0
.8
0
.6
-1
.0
-0.
-0.
8
2 j2
4 j2
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purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work
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and edge
im
sted to
provide signal alignment for proper power summing.
B. Prototype Phase Adjustments -
verified providing further confirmation of
de
as adjusted to center Pin/Pout
pe
am
mplifier to the output side
centered AM/PM characteristic.
llector bias at 28V and base-plate temperature near 25-
30C.
A. CW Performance
15-point
put Power for
Doherty and non-Doherty (class AB) bias conditions.
overall power-
ad
quency at 6dB, 7dB, and
8dB Output Back-Off from P1dB (OBO).
Both p & c were optimized until the load presented to the
carrier amplifier returned to near 4-j2 and b
pedance was grouped tight with minimal slope.
Finally the input Wilkinson phase offset was adju
A prototype was built. First performance in non-Doherty
configuration was measured (that is, both amplifiers biased
Class AB). CW Pin/Pout versus frequency showed non-
Doherty performance to be as expected, confirming the
matching elements, Wilkinson splitter, and output combiner
were properly aligned. In addition single ended performance
of each channel was
vice matching.
In Doherty operation, CW Pin/Pout showed efficiency
peaked near 2110MHz indicating the carrier phase offset was
too long. An empirical adjustment method, similar to the
modeled approach was employed. First the peaking arm was
disconnected from the TEE junction and the input to thecarrier amplifier disconnected from the Wilkinson, re-routed
to a 50 port connector. Next, the phase offset at the output
of the carrier amplifier w
rformance at 2140MHz.
The peaking amplifier was then reconnected to the output
combiner. To maintain phase balance, the phase length of the
peaking amplifier input Wilkinson arm was increased by the
ount that the carrier amplifier output phase was decreased.
Efficiency measured to be centered at 2140MHz, however,
AM/PM remained centered at 2110MHz getting worse at
2170MHz. Transferring the phase offset from the Wilkinson
arm at the input of the peaking a
IV.DOHERTY PERFORMANCE
The Doherty amplifier was measured under both single-tone
CW and WCDMA single and multi-carrier signals with and
without linearization. The Doherty bias condition sets the
carrier amplifier to Class AB at 550mA collector current and
the peaking amplifier to well below turn-on at 550mV. The
Non-Doherty bias condition sets both amplifiers Class AB at
400mA collector current. All measurements were performed
with co
CW gain and efficiency versus output power curves for
Doherty and non-Doherty bias conditions at 2140MHz are
shown in figure 5. CW saturated output power is 54dBm
(250W) and P1dB-Compression at 53dBm (200W). Notice at
6dB OBO, output power is 47dBm (50W) and corresponding
Doherty efficiency is greater than 57%, a 25-point
improvement compared to non-Doherty efficiency of 32% at
2140MHz. At 10dB OBO, output power is 43dBm (20W)
and corresponding Doherty efficiency is near 35%, a
improvement over non-Doherty efficiency of 20%.
0
1
2
3
4
5
6
7
8
9
10
1112
13
14
15
30 32 34 36 38 40 42 44 46 48 50 52 54
Gain(dB)
0
5
10
15
20
25
30
35
40
45
50
5560
65
70
75
CollectorEfficiency(%)
Gain_2140MHz_AB
Gain_2140MHz
Ceff_2140MHz_AB
Ceff_2140MHz
Fig. 5. Gain and Collector Efficiency versus Out
As shown, HVHBT Doherty gain is between 11dB and
12dB at 6dB OBO. At 50W (47dBm) the
ded-efficiency is above 53% at 2140MHz.
Doherty collector efficiency versus frequency at 6dB OBO,
7dB OBO, and 8dB OBO is shown in Figure 6. Notice the
efficiency curve is well centered within the band from
2110MHz through 2170MHz and changes by less than 3-
po s across band.int
Fig. 6. Collector Efficiency versus Fre
Amplitude and Phase versus Output Power is an important
indication of Digital Pre-Distortion compatibility shown in
Fig 7. Notice phase and amplitude remain relatively
unchanged until peaking amplifier begins to turn on (near
46dBm). Minimizing the amount of change in phase over a
Output Power (dBm)
40
45
50
55
60
2100 2110 2120 2130 2140 2150 2160 2170 2180 2190 2200
6dB-OBO
7dB-OBO
8dB-OBO
Efficiency(%)
Frequency (MHz)
2007 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional
purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work
in other works must be obtained from the IEEE
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2007 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional
purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work
in other works must be obtained from the IEEE
indication that digital linearization
B. WCDMA Performance -
digital pre-distortion test system provided by PMC
Si
ted while achieving
s
both with and without digital pre-distortion at 2140MHz are
shown in Figure 9.
Fig. 9. PSD with and without Digital Predistortion at 2140MHz.
esigners seeking a
simple efficiency-enhancement solution.
discussions and independent verification of measured results.
[2]
[3]
[4]
[5]Efficiency, IEEE Int. Microw. Symp. Workshop, 2004.
WCDMA Power Spectral Density (PSD) measurement20dB output power dynamic range is important. Notice the
change in phase is highest at 2170MHz but shows less than 10
degrees of relative change over a 20dB range. This
characteristic is a first
should function well.
0
2
4
6
8
10
12
14
32 34 36 38 40 42 44 46 48 50 52 54
Gain(dB)&Phase(De
g)
Gain-2110
Phase-2110
Gain-2140
Phase-2140
Gain-2170
Phase-2170
Output Power (dBm)
Fig. 7. Amplitude and Phase versus Output Power. V.CONCLUSIONS
We have shown a 2-way symmetrical Doherty amplifierbuilt using HVHBT GaAs transistor devices. A simplistic
design approach combining modeling and empirical
adjustments was used and found to be successful. The
HVHBT Doherty amplifier produces 250W of CW saturated
power at 72% collector efficiency. We reported observing
57% WCDMA efficiency at 50W average power while
linearized to 55dBc using an input signal with two-carriers
side by side with PAR=6.5dB. This solution provides an
interesting alternative to basestation d
WCDMA linearity was characterized both with and without
Digital Pre-Distortion. The WCDMA input signal comprised
of 2 carriers side-by-side with peak to average ratio of 6.5dB
measured 0.01% on the CCDF. This waveform takes full
advantage of the Doherty efficiency boost at 6dB OBO.
Linearization was accomplished using a PALADIN-15
adaptive
erra.
Figure 8 shows Doherty Collector Efficiency and ACPR
versus Output Power both with and without linearization.
Notice greater than 57% collector efficiency at 47dBm (50W)
average output power has been demonstraVI.ACKNOWLEDGEMENT
The authors would like to thank Andrzej Haczewski,
Sandro Lanfranco, and Jukka Holster of Nokia Siemens
Networks Oulu Finland for their insightful technical
55dBc linearized ACPR at 5MHz offset.
5
10
15
20
25
30
35
40
45
50
55
60
65
Efficiency(%)&PeakPower(dBm)
-65
-60
-55
-50
-45
-40
-35
-30
-25
-20
-15
-10
-5
ACPR(dBc)
CollectorEfficiency
Peak Output Power0.01% on CCDF
REFERENCES
[1] S. C. Cripps, RF Power Amplifier for WirelessCommunications, Norwood, MA: Artech House, 1999.F.H.Raab, Efficiency of Doherty RF power-amplifier
ACP5(not Linearized)
ACP10(not Linearized)
47dBm(50W) systems,IEEE Trans. Broadcast., vol.BC-33, no. 3, pp. 77-83,
Sep.1987.P. Draxler, S. Lanfranco, D.Kimball, C.Hsia, J.Jeong, J. Van de
Sluis, and P.M.Asbeck, High Efficiency Envelope TrackingLDMOS Power amplifier for W-CDMA, IEEE
ACP5Linearized
ACP10Linearized
MTT-S Int.Microw. Symp. Dig., Jun. 2006, pp. 1534-1537.D.F. Kimball, J. Jeong, C. Hsia, P. Draxler, S. Lanfranco, W.Nagy, K. Linthicum, and L.E. Larson, High-EfficiencyEnvelope-Tracking W-CDMA Base-Station Amplifier UsingGaN H
30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
Averag e Pout (d Bm)
Fig. 8. ACPR-5MHz, ACPR-10MHz, efficiency, and peak output
power at 0.01 on CCDF vs. average output power with and withou FETsIEEE MTT, Vol. 54, No. 11, Nov. 2006, pp. 3848-3856.B. Kim, Microwave Doherty Amplifier for High Linearity and
t
linearization for WCDMA 2-carrier side-by-side with PAR=6.5dB.