2013 a comparison of carrier-based and space vector pwm techniques for three-level five-phase...

IEEE TRANSACTIONS ON INDUSTRIAL INFORMATICS, VOL. 9, NO. 2, MAY 2013 609

A Comparison of Carrier-Based and Space VectorPWM Techniques for Three-Level Five-Phase Voltage

Source InvertersObrad Dordevic, Student Member, IEEE, Martin Jones, and Emil Levi, Fellow, IEEE

AbstractMultilevel inverter supplied multiphase vari-able-speed drive systems have in recent times started attractingmore attention, due to various advantages that they offer whencompared to the standard three-phase two-level drives. For properfunctioning of such systems good pulsewidth modulation (PWM)strategy is of crucial importance. Control complexity of multi-phase multilevel inverters increases rapidly with an increase inthe number of phases and the number of levels. This paper dealswith a three-level neutral point clamped (NPC) inverter suppliedfive-phase induction motor drive and analyses five PWM strate-gies: three are carrier-based (CBPWM) and two are space vectorbased (SVPWM). The aim is to provide a detailed comparison andthus conclude on pros and cons of each solution, providing a guide-line for the selection of the most appropriate PWM technique.Experimental results are provided for all analysed PWM methods.The comparison of the PWM techniques is given in terms of thevoltage and current waveforms and spectra, as well as the totalharmonic distortion (THD) in a whole linear modulation indexrange, which is used as the global figure of merit. Properties of thecommon mode voltage (CMV) are also investigated. Complexity ofthe algorithms, in terms of the computational time requirementsand memory consumption, is addressed as well. It is shown thatthe performance of the PWM techniques is very similar and thatone CBPWM and one SVPWM technique are characterised withidentical performance. However, using the algorithm complexityas the main criterion, space vector techniques are more involved.

Index TermsCarrier-based pulsewidth modulation (PWM),multilevel inverters, multiphase machines, space vector PWM.

I. INTRODUCTION

T HE advantages of multiphase machines with respect totheir three-phase counterparts are well documented [1].Also, standard topologies of the multilevel inverters, their ad-vantages with respect to two-level inverters, pulsewidth mod-ulation (PWM) control strategies, and applications are nowa-days well understood [2], [3]. Individual advantages of mul-tiphase machines and multilevel inverters can be convenientlycombined by realising multilevel multiphase drive structure [1].

Manuscript received December 02, 2011; revised March 07, 2012 and May10, 2012; accepted June 09, 2012. Date of publication September 24, 2012;date of current version January 09, 2013. This work was supported by NPRPGrant 4-152-02-053 from the Qatar National Research Fund (a member of QatarFoundation). The statements made herein are solely the responsibility of theauthors. Paper no. TII-11-0968.

O. Dordevic, M. Jones, and E. Levi are with the School of Engineering, Tech-nology, and Maritime Operations, Liverpool John Moores University, LiverpoolL3 3AF, U.K. (e-mail: [email protected]; [email protected];[email protected]).

Color versions of one or more of the figures in this paper are available onlineat http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/TII.2012.2220553

For proper control of multiphase machines supplied frommultilevel inverters, modulation strategy is the key issue.Carrier-based modulation strategies can be easily extendedfrom two-level to multilevel structures, as discussed in [4] forthe three-phase case, and they are nowadays well-establishedfor multilevel three-phase systems [5]. Also, carrier-basedapproach is independent of the number of phases, so that itsextension to multiphase systems presents no difficulties. Nev-ertheless, there is little evidence of any machine performanceanalysis when carrier-based PWM (CBPWM) techniques areutilized for multiphase multilevel structure. Indeed, in theexisting works [6], [7] an load is used and the emphasisis on the capacitor voltage balancing.

Situation regarding space vector based approaches is some-what different and the problem of generalization still exists.Space vector strategies deal with switching states of the inverterthat should be applied in each switching period to obtain thedesired references on average. The source of the problemfor generalization is exponential increase of the number ofswitching states, which equals (where is the number ofphases, while is the number of inverter levels). Having moreswitching states means more possible solutions. For three-phasemultilevel case, because of the symmetry and possibility offorming equilateral triangles, situation is simpler. However,an additional problem that appears in multiphase case is thepresence of more than one plane [1] and decrease in symmetry.Consequently, the majority of existing multiphase multilevelspace vector based PWM (SVPWM) algorithms are for thespecific cases.

One of the first ideas [8], applied to a five-phase three-leveltopology, followed three-phase three-level SVPWM algorithmof [9] and divided sectors into triangles. The consequence wasthat only three instead of five space vectors were applied ina switching period. Hence the second plane of the five-phasesystem was not controlled, meaning that it was not possible toobtain sinusoidal output voltages. The same principle was fol-lowed in [10], where the same algorithm was applied for controlof two five-phase series-connected induction machines suppliedfrom a three-level neutral point clamped (NPC) inverter. Simi-larly, insufficient number of space vectors during the switchingperiod, without considering the plane, is used in [11], [12]where five-phase three-level topology was again considered.

A different approach to SVPWM of multiphase multilevelinverters, which recognizes that the number of applied vectorsin a switching period must equal the number of phases, wasdeveloped in [13][16]. A universal solution for any number ofphases and levels is provided, using multidimensional space as

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610 IEEE TRANSACTIONS ON INDUSTRIAL INFORMATICS, VOL. 9, NO. 2, MAY 2013

TABLE ICOMPARED MODULATION STRATEGIES

the basis for the analysis. The general implementation of thealgorithm of [13] by creating VHDL module for an arbitrarynumber of phases and levels is given in [17]. However, the usedapproach is in essence level-shifted CBPWM method, and theanalysis is not conducted by considering vector projections in2-D planes as is customary when vector space decomposition(VSD) is used. An alternative method, which again does not relyon VSD and per-plane analysis, is utilization of single-phasemodulator for each phase in a multiphase system [18].

The first complete SVPWM solution, based on VSD ap-proach, is provided for a five-phase three-level topology in[19]. This is the supply structure discussed here as well, inconjunction with an induction motor drive. The VSD approachis used and decomposition of the variables into 2-D orthogonalplanes is conducted, following the methodology introducedin [20] and predominantly used in conjunction with two-levelmultiphase inverter control strategies. This approach definesthe mutually perpendicular planes of a multidimensional spaceand is one of the basic concepts for SVPWM control strategydevelopment. An extension of the algorithm of [19] fromfive-phase to seven-phase three-level NPC inverter structure isreported in [21].

This paper builds on [22], where an initial attempt to com-pare the three-level five-phase PWM techniques was described.The study in [22] was purely simulation-based and restricted toconsideration of the voltages. In contrast to this, the work de-scribed here verifies experimentally theoretical analysis usinga laboratory prototype of the five-phase induction motor drivesupplied from a three-level NPC inverter. Load phase voltageand current, as well as the CMV, are encompassed by the exper-imental work. Last but not least, the complexity of the studiedalgorithms is analyzed as well, in terms of memory requirementsand the algorithm execution time.

As a benchmark in comparison, pure sinusoidal CBPWMstrategy (without any injection, denoted further on asCBPWM0) is used (this is an addition with respect to[22]). Two other analyzed carrier-based modulation strate-gies are: sinusoidal reference CBPWM with single minmaxinjection (denoted as CBPWM1) and CBPWM with doublezero-sequence injection (CBPWM2). Two SVPWM strategies,investigated here, are the algorithm of [19], denoted further asSVPWM1, and a modified version of that algorithm, labelledSVPWM2. The PWM techniques, compared in the paper,are summarised in Table I. The chosen carrier disposition islevel-shifted phase disposition (PD-CBPWM) for all discussedCBPWM strategies. The implementation of all compared PWM

techniques does not include additional means for capacitorvoltage balancing.

It should be noted that a carrier-based disposition ofPD-CBPWM type is also used in [18], where it is formalizedinto a computer algorithm form using a flow chart diagram.All CBPWM strategies analyzed here can be implementedusing formalized form of [18] and reference signals with anappropriate injection. Hence the single-phase modulator of[18] is not included in the comparison as a separate method;however, it is revisited in Section II-A where some additionalconsiderations are given.

The paper is organized as follows. In Section II all the ana-lyzed modulation strategies are introduced. Importance of thecomparison of the modulation strategies and choice of the car-rier disposition are also addressed. Section III presents experi-mental results and associated discussion. Algorithm complexityis studied since this is an important consideration for real-timeimplementation. Section IV summarizes conclusions.

II. THE ANALYZED PWM TECHNIQUESTopology of a five-phase induction machine with sinusoidally

distributed windings, supplied from an NPC voltage source in-verter (VSI), is shown in Fig. 1. Since induction machine is withsinusoidally distributed windings, the task of the PWM is torealize sinusoidal output voltages. Standard notation for mul-tilevel inverter output leg voltages is used. It is based on thenormalized form, so that the lowest leg voltage value is 0 whilethe highest value is for an -level VSI. The step of theoutput voltage is constant, hence voltages on capacitors are bal-anced and each capacitor carries voltage of . Thus,for the studied inverter structure of Fig. 1, the leg voltages cantake values and , which in normalised form become0, 1, and 2, respectively.

The comparison of space vector and carrier-based PWMmethods is important, since it reveals similarities and dif-ferences, thus enabling the selection of the best techniquefor a given application. As already mentioned, in this paperPD-CBPWM is adopted. This choice is good for comparisonwith space vector strategies for NPC topology and has alreadybeen used in three-phase case related comparisons in [23], [24].The actual reason why PD-CBPWM is the most suitable forcomparison with SVPWM is the following. During the con-struction of the space vector sequence it is normally assumedthat each leg increases (decreases) its level during the firsthalf-period of the switching period , and then each leg de-creases (increases) its level in the second half-period. Increaseand decrease are usually for one level to minimise switchinglosses. Let us consider the most common multilevel techniques,with carriers in phase disposition (PD), phase opposition dispo-sition (POD), and alternatively in phase opposition disposition(APOD), which are shown in Fig. 2. For the shown three-levelcase APOD and POD are identical, Fig. 2(b) (this does not af-fect the generality of the example). Also, in the shown example,for the sake of clarity, only two phases (legs) are shown. Onecan see that the only method in which all legs always changeits level in the same direction (all increase or all decreasetheir level) in each half-period of the switching period is PD,Fig. 2(a). Thus, this is the actual reason why PD-CBPWM is

DORDEVIC et al.: COMPARISON OF CARRIER-BASED AND SPACE VECTOR PWM TECHNIQUES 611

Fig. 1. Topology of a three-level five-phase NPC inverter supplied induction motor drive, studied in the paper.

Fig. 2. Choice of CBPWM that is suitable for comparison with SVPWM tech-niques: (a) PD-PWM. (b) POD and APOD for three-level case.

the most suitable carrier-based PWM strategy for comparisonwith SVPWM methods for the NPC VSI topology.

When PD-PWM strategy is used, the gating signals can be ob-tained using a single carrier. Graphically, this can be explainedas follows: all reference signals can be shifted to the commoncarrier band (two-level zone) and times of application of ap-plied multilevel switching states can be obtained as in two-leveloperation with the single carrier. For correct reconstruction ofthe leg voltages, information regarding the earlier carrier zonemust be saved for each leg. This problem can be also presentedmathematically. If normalized voltages are in use, then shiftingof the leg voltages to common carrier band represents the frac-tional part of the references. Also, for correct reconstruction ofleg voltages, the integer part must be saved. The signal shiftingto the common carrier band (by taking the fractional part) canbe then easily done by the modulus function [24]. This is a stan-dard way for practical implementation of the PD-CBPWM.

A. CBPWM0 and CBPWM1As noted, CBPWM0 and CBPWM1 stand for the basic

CBPWM technique with pure sinusoidal references, andmethod with sinusoidal references and addition of the min-maxinjection, respectively. Carrier-based PWM is always the easiesttechnique for implementation on any digital platform. Findingthe equivalent injection that leads to the same operation as a

space vector algorithm is therefore useful to simplify practicalimplementation of the developed space vector strategy.

It is shown in [4] that the level-shifted PD-CBPWM approachleads to the minimum phase voltage harmonic distortion. Thisresult is given for a three-phase load, but is also valid for mul-tiphase case since single-leg output was analysed. The resultcomes as a consequence of the fact that significant harmonics ofthe output leg voltage, located at the multiples of the switchingfrequency, will have the same magnitude and phase in all legs,so that they will not be present in the phase voltages, regard-less of the number of phases. This further supports previouslygiven argument, that PD-CBPWM is the most suitable CBPWMmethod for comparison with SVPWM techniques.

If modulating signals are pure sinusoidal signals, as inCBPWM0, the maximum modulation index (defined as theratio of the maximum fundamental peak phase voltage to onehalf of the dc-link voltage) in the linear PWM region is limitedto 1. It is shown in [18] that the formalized PD-PWM algorithmwith no injection is equivalent to the algorithm of [13] (whereCMV does not exist due to the nonisolated neutral point of theload). This reveals that the algorithm of [13] actually comesfrom PD-PWM. This is also clear from the detailed analysisof the matrix equations in [13]. The simplest solution forextending the modulation index range in the linear modulationregion with CBPWM is the addition of the zero-sequenceinjection, according to the minmax principle (CBPWM1)

(1)where and stand for the minimum and maximumvalue, respectively, of the sinusoidal phase voltage references.This increases the maximum modulation index of the five-phasesystem in the linear PWM region to 1.0515, as with a two-levelVSI [25].

Minmax injection has a universal validity, since it does notdepend on either the number of phases or on the shape of themodulating signals [25]. It is a solution to the problem of cen-tring signals within dc-bus rails in each instant of time, as shownin Figs. 3(a) and (b). In Fig. 3, one switching period ofthe reference leg voltages for the five-phase three-level inverteris depicted. The illustration is given for the modulation index

, and angle of . Since signals are centredaround , displacement of (1) can be expressed in an alter-native manner, in terms of reference leg voltages, as


Fig. 3. Principle of centring of the signals showing (a) CBPWM0 sampled signals (not centred), (b) CBPWM1 centred signals between dc-bus rails, (c) signalsreferred to the common carrier band, (d) CBPWM2 centred signals within the common carrier band. One switching period is shown.

(2)

where and stand for the minimum and maximumvalue, respectively, of the reference leg voltages, Fig. 3(a). Notethat, in the notation used, capital letters in subscripts denote legwhile lowercase letters stand for phase voltages. With this in-jection (inj1 in Fig. 3) modulation index range is extended tothe maximum value for any number of phases, since referenceleg voltages are always centred in between 0 and , Fig. 3(b).Shifting to the common carrier band is shown in Fig. 3(c). Itis clear that the dwell times remain unchanged, and, as alreadymentioned, this method in conjunction with comparison withthe single carrier was used for practical implementation of allPD-CBPWM algorithms.

B. CBPWM2

This method was introduced in [26] for three-phase systems,with the aim of harmonic distortion reduction. The same con-struction of the injection has been used later in [23], for compar-ison of the carrier-based and space vector modulation strategiesfor three-phase three-level inverters. Also, the same principlewas applied in [24], where the aim was to generate the injectionthat produces the same output as the optimized space vector al-gorithm of [9]. In this paper the same principle is applied to thefive-phase, three-level topology and the strategy is denoted asCBPWM2.

The importance of this strategy is highlighted in [24] where itis shown that simple carrier-based method with proper injectioncan give the same performance as an optimized SVPWM algo-rithm. In general, the algorithm of [9] is widely accepted as thereference three-phase multilevel SVPWM. In [24] an optimiza-tion of the space vector sequence, based on minimum numberof transitions, is given at first as a supplement to the algorithmof [9]. Further optimization is based on the flux trajectory con-cept. It is shown that for the three-phase case the optimal spacevector algorithm, which leads to the minimum flux distortion,is the one in which the total time of application of redundantswitching states is equally shared between two states.

Sharing of the redundant switching states is a good startingpoint for construction of the injection and for the comparisonof SVPWM with CBPWM strategies. If in the space vectoralgorithm during one switching period all legs change theirlevel only for one step (to minimize losses), it can be saidthat during one switching period inverter operates in two-levelmode around certain working point. Hence, the times of ap-plication of two-level mode determine the times of applicationfor corresponding multilevel switching states. The reflectionof this in the PD-CBPWM approach is the already mentionedshifting to the common carrier band (two-level zone) withthe single carrier. The reference signals must already containminmax injection, inj1 (as in CBPWM1) in order to increasethe modulation index range.

Moving of all reference signals (with one minmax injec-tion) to common carrier band is shown in Fig. 3(c). The firstand the last switching state with fractional part of normalizedleg voltages, and , Fig. 3(c), are redundant.A leg voltage can be obtained by adding saved integer part ofthe reference to the corresponding fractional part. For optimiza-tion of the flux trajectory their times of application should bethe same, so signals from Fig. 3(c) should be again centred in-side one carrier band. Once more this graphical centring is ob-tained mathematically with min-max injection for signals fromFig. 3(c), now around (i.e., 0.5 in the normalized form).This injection is denoted with inj2 in Fig. 3. Leg reference sig-nals after double centring are shown in Fig. 3(d). Finally, con-struction of CBPWM2 involves two injections (inj1 and inj2)of the type used in CBPWM1, where the second injection isapplied after all reference signals (that already include the firstzero-sequence injection) are shifted to the common carrier band.The second centring does not change modulation index range,so that the maximum modulation index for CBPWM2 techniqueis the same as for the CBPWM1. Described CBPWM2 strategyis here directly applied to the five-phase topology without anymodification.

C. SVPWM1The method is the one of [19] and it is based on decompo-

sition of the space vectors into two 2-D planes. For sinusoidaloutput, reference voltage is in the first plane, while the reference


Fig. 4. First sector subsectors for both space vector PWM techniques.

in the second plane is zero. Hence the algorithm has to zero theaverage voltage in the second plane in each switching period.The technique at first eliminates some of the switching states.It is shown that leg voltages follow the same order as the ref-erence phase voltages. As a consequence, eliminated switchingstates are those that do not follow the ordering of the referencephase voltages in the time domain. The number of switchingstates is reduced in this manner from 243 to 113. The next stepis development of switching sequences that are characterizedwith single-level transitions in each inverter leg. For three-levelfive-phase case there are 32 possible switching sequences. Someof the sequences correspond to the groups of the same spacevectors, i.e., they yield the same pattern. There are therefore 16different patterns. Some of these cannot achieve zero averagevoltage in the second plane, so that they have to be eliminated.The final result is 10 patterns per sector, which are able to gen-erate pure sinusoidal output voltages. The next step is determi-nation of subsector borders, i.e., regions of application of certainpatterns. Each group of space vectors in a pattern, to which morethan one switching sequence can correspond, has the same ap-plication time for a space vector under consideration. With thesimple rule, that the time of application must be in the range 0to , partition of the sectors into subsectors can be done. Sub-sectors A-K, inside the first sector, are shown in Fig. 4. The finalchoice of the sequences for each pattern is done in such a mannerto minimize the number of transitions and to improve balancingof the capacitor voltages. For better capacitor voltage balancing,switching sequences with more states that are governed by themiddle point of the dc capacitor bank are preferable. Switchingsequences A-K are given in Table II. Finally, a simple methodfor determination of the reference voltage position and thus sub-sector identification is presented in [19].

D. SVPWM2This represents a modification of the SVPWM1 algorithm.

The basic idea of the modification was to reduce variations of thecommon mode voltage (CMV). The symmetry around the eigh-teen degree line in the first sector is utilized to introduce an addi-tional subdivision of each sector into two halves and reorganizethe switching patterns accordingly. Namely, in the first sector,which occupies the first 36 of the reference signal period in thefive-phase system, the fifth phase reference voltage has a zerocrossing, and is positive in the first 18 and negative between18 and 36 . The proposed switching sequence, taking as theexample small values of the modulation index

TABLE IISWITCHING SEQUENCES FOR SUBSECTORS OF FIG. 4

when the reference is in the subsector A (see Fig. 4), contains atthe fifth positions only ones and twos (shown in bold in Table II).That means that the fifth leg voltage is boosted, i.e., that CMV isalways greater than one (i.e., ) in the first sector. Further,in the second sector the third phase changes sign from the neg-ative to the positive. The algorithm gives only zeros and ones inthe appropriate sequence for the third leg, so CMV is less thanone (i.e., ). The same happens for higher values of themodulation index. On average, during the whole fundamentalperiod, value of CMV is 1 (i.e., ). With the proposed sub-division of the sectors into two equal parts, it is possible to ob-tain average value of the CMV equal to one (i.e., ) duringthe time interval which corresponds to each sector. The max-imum value of the CMV voltage alternating part is reduced inthis way. After modification, original subsectors A, B, E, andH (see Fig. 4) are additionally divided into lower and upperparts. This produces four additional subsectors, so that the totalnumber of subsectors per sector in the modified algorithm is 14.Switching sequences for the upper subsectors are different thanin the original algorithm, while they remain the same for thelower parts of the four subsectors that have undergone furthersubdivision. The first to the fifth switching states of the lowersubsector sequence become the second to the sixth switchingstates of the upper sequence, while the first is the redundantswitching state that corresponds to the same space vector as thesixth. Also, the same rule must be applied to the original se-quence of the subsector D. Sequences for subsectors J and K re-main the same. In this way all switching sequences in the upperhalf of the sector will have the same starting switching stateand thus minimize the number of additional transitions (losses).Switching sequences for corresponding 14 subsectors are givenin Table II. The increase of the number of subsectors from 10 to14 within the original 36 sectors slightly increases complexityand memory consumption for the implementation.

III. EXPERIMENTAL RESULTSIn what follows, experimental results are presented. Param-

eters of the machine are:mH, mH, mH. Used dc-bus voltage is

V and switching frequency of the inverter is chosento be kHz. Inverter dead time is s. At rated


Fig. 5. Experimental setup.

motor frequency of 50 Hz, the voltage is 300 V (peak value) andthe machine is controlled using . Modu-lation index is defined as ( is the peak fundamental of thereference phase voltage)

(3)

Experimental setup is shown in Fig. 5. For the real-time im-plementation of the code, dSpace ds1006 hardware has beenused. Three-level five-phase NPC inverter is custom-made. Ex-ternal dc source Sorensen SGI 600/25 has been employed asdc-bus supply.

Waveforms produced by investigated modulation strategiesare very similar and become even more similar with the in-crease of the modulation index value. In order to highlightthe differences, a small modulation index has beenchosen. The differences in waveforms are marginal, as can beseen from Fig. 6 where leg voltage, phase voltage, and motorcurrent are shown for all five considered PWM techniques. Thedifference between strategies is more evident in the harmonicspectra, which are shown in Fig. 7 for all considered strategiesfor the phase voltage [see Fig. 7(a)(e)]. One can see thatthere are a lot of similarities between compared modulationstrategies. All strategies achieve required fundamental outputvoltage with hardly any low-order harmonics in the phasevoltage. The observable differences that appear in the spectraare predominantly related to the side-bands around multiplesof the switching frequency. One interesting conclusion is thattwo of the methods, namely CBPWM2 and SVPWM2, showidentical performance [see Fig. 7(c) and (e)]. This conclusionis valid for the whole investigated linear modulation indexrange from 0 to 1.0515. This will be proven further by THD

comparison. The cleanest spectra result with the CBPWM0 andCBPWM1 methods.

Under ideal conditions no lower order harmonics should bepresent in the phase voltage spectrum. However, in the shownexperimental results in Fig. 7 it is evident that there are somesmall values of the third harmonic (at 60 Hz), caused by the in-verter dead time [27] as well as a nonnegligible 15th harmonicat 300 Hz ( Hz). This is a zero-sequence har-monic in a perfectly symmetrical machine and it is believed thatits existence is due to the rotor slotting and nonideal construc-tion of the machine.

Study of the type shown in Fig. 7 has been conducted, usingboth experiments and simulations, for the whole linear PWM re-gion. Simulation model is based on PLECS Simulink block-setand all the parameters are the same as in the experimental setup(including the inverter dead time). For the CBPWM0 methodthe linear region is up to , while it is up to 1.0515 for allother modulation strategies. Simulations are done for the modu-lation index values from 0.05 up to 1.05 (i.e., 1 for CBPWM0),with the step of 0.025, while experiments are done with the dou-bled step, 0.05.

On the basis of the FFT results, THD has been calculated upto 21 kHz, according to

(4)

where stands for phase voltage or current, represents the-th component in the spectrum and determines harmonic

order closest to 21 kHz. Since switching frequency iskHz, harmonics that belong to the first 10 side-bands are takenfor THD calculation in this way. Comparison of simulation andexperimental THD results, for all five analyzed strategies, forthe phase voltage and current THDs is given in Figs. 8 and9, respectively. From Fig. 8 it can be seen that for the givenmodulation index range all modulation strategies produce es-sentially the same phase voltage THD value. Also, very goodagreement between simulation and experimental results is vis-ible. The small difference between simulation and experimentalresults for low modulation indices is believed to originate frominaccurate knowledge of the dead time, which impacts on theresults more in the low modulation index region.

Current THD analysis, illustrated in Fig. 9, confirms againthat the CBPWM2 and SVPWM2 yield identical performance.Experimental results show, in general, somewhat higher currentTHD than simulations. This is caused by the assumption thatleakage inductances are constant and equal at all frequencies inthe simulations, which is in reality not satisfied [28]. However,regardless of the differences in the numerical values (which are,it should be stressed, rather small), the trend of all curves andtheir mutual position is the same in both simulations and ex-periments. The noticeable difference between strategies existsfor medium to high modulation index values; clearly, CBPWM2and SVPWM2 can be characterized as being the best. These twostrategies equally share redundant vector application time, andin three-phase case they were proven as optimal according to theflux harmonic distortion [24], [26]. The findings reported here


Fig. 6. Oscilloscope recording of the leg and phase voltage, and motor currentat , for all considered PWM strategies: (a) CBPWM0, (b) CBPWM1,(c) CBPWM2, (d) SVPWM1, and (e) SVPWM2 modulation strategy (M-legvoltage, 260 V/div; Ch3-phase voltage, 250 V/div; Ch4-phase current, 2 A/div; ms/div).

prove that these PWM strategies offer the lowest current THDin the five-phase case as well.

Fig. 7. Experimental results for modulation index showing phasevoltage spectrum for the: (a) CBPWM0, (b) CBPWM1, (c) CBPWM2, (d)SVPWM1, and (e) SVPWM2 modulation strategy.

Consider the operation with the modulation index offrom Fig. 7. A five-phase system is characterised with two

planes and the voltage/current harmonics map into one of thetwo planes, according to the certain rules [28]. The mapping ofthe harmonics is very important since the equivalent impedanceis not the same in the two planes [28]. Equivalent inductances inthe first (torque/flux producing) and the second (nonflux/torque


Fig. 8. Phase voltage THD comparison for all five modulation strategies (sim-ulations and experiments), for full linear range of the modulation index [ to 1.05 (i.e., 1 for CBPWM0)].

Fig. 9. Motor current THD comparison for all five modulation strategies (sim-ulations and experiments), for full linear range of the modulation index [ to 1.05 (i.e., 1 for CBPWM0)].

producing) plane are governed by and , respec-tively [28], where the symbols stand for the stator and rotorleakage inductances. CBPWM1 strategy is taken as an examplefor further analysis. Phase voltage spectrum of Fig. 7 and cur-rent spectrum, obtained experimentally, are shown in Fig. 10(note the -axis scaling). Mapping of the significant harmonicsis defined with numbers 1 and 2. Number 1 stands forharmonics that map into the first plane, while 2 denotes har-monics that map into the second plane [see Fig. 10(a) and (b)].For all five compared modulation strategies, the most signifi-cant harmonics of the phase voltage in the second side-band aregreater than the most significant harmonics in the first side-band(see Fig. 7). However, according to the mapping of the har-monics and Fig. 10, one can see that the most significant har-monics in the first side-band map into the second plane (that haslower impedance), while those highest in the second side-bandmap into the first plane (that has higher impedance). This meansthat, in the current spectrum, the highest harmonics from thesecond side-band will have much smaller influence than thosefrom the first side-band [see Fig. 10(a) and (b)]. In Figs. 7(a)(e)the smallest harmonics in the first side-band are present for theCBPWM2 and SVPWM2 modulation strategies [see Fig. 7(c)and (e)], while those in the second side-band are all similar. It

Fig. 10. Zoomed extracts from phase voltage and current spectra: experimentalresults for CBPWM1, . (a) Phase voltage spectrum. (b) Motor currentspectrum.

is therefore obvious that these two modulation strategies havesmaller current THD value than the other strategies, as con-firmed by the THD in Fig. 9 for the considered modulation indexof .

One can see in Fig. 10(b) that small amounts of harmonicsare present at low frequencies (3rd, 7th, etc.) in the phase cur-rent spectrum. This is a consequence of the dead-time effect[27], which is in the current hardware around 6 s, and which isnot compensated. The drive is controlled in open-loop manner,without closed current control loops, leading to appearance ofthese small current harmonics.

As noted already, at higher modulation indices, waveformsof voltages and currents are practically the same for all PWMmethods. As an example, Fig. 11 illustrates oscilloscope record-ings of the phase voltage and motor current at for theSVPWM2.

Variation of the CMV has been at first analysed by exam-ining the amount of the fifth harmonic in it as a function of themodulation index, for all PWM techniques. This is illustratedin Fig. 12. As expected, CBPWM0 has practically zero valueof the fifth harmonic throughout the linear modulation region.For CBPWM1 the 5th harmonic magnitude increases with mod-ulation index practically linearly. Other modulation strate-gies have different dependences, as is evident in Fig. 12. Onecan see that the SVPWM2 modulation strategy is characterizedwith a smaller 5th harmonic, when compared to SVPWM1, inthe whole modulation index range (as noted, this was the basicidea for developing SVPWM2, [22]).

Harmonic distortion (HD) of the CMV is analyzed as well.HD is calculated using

(5)

where represents the -th harmonic of the CMV, andis the magnitude of the fundamental leg voltage. Param-


Fig. 11. Experimentally recorded phase voltage (a) and current (b) forSVPWM2 at . Scales: 150 V/div and 0.5 A/div.

Fig. 12. Experimental results: variation of the fifth harmonic in the CMVagainst modulation index for considered five PWM strategies.

eter again limits HD calculation to the first 10 side-bands (upto 21 kHz). All modulation strategies have very similar CMVHD values, as can be seen in Fig. 13. It is interesting to notethat SVPWM2 modulation strategy, which was originally de-veloped to reduce CMV variations and which has the lower fifthharmonic value than SVPWM1, has actually higher HD in thewhole modulation index range.

Complexity of the algorithms has been analyzed by com-paring the estimated number of different operations perswitching cycle and through the measurement of the executiontime on dSpace using dSpace Profiler tool. Comparison ofthe arithmetic operation number is shown in Table III (logicaloperations are not included) up to the stage at which referenceleg voltages are created. The data in Table III correspond tohow the algorithms have been implemented and should not betaken as benchmark values, since different ways of realizationmay result in a different number of operations. Nevertheless, itis obvious from the given data that the algorithm complexityincreases in the order in which the PWM techniques are listed.

The same conclusion is arrived at by measuring the algo-rithm execution time on the real-time hardware dSpace ds1006

Fig. 13. Experimental results: variation of HD for CMV against the modulationindex for considered five PWM strategies.

TABLE IIIAN APPROXIMATE ALGORITHM COMPLEXITY COMPARISON BY THE NUMBER

OF OPERATIONS

with Profiler tool. The execution time of all carrier-based strate-gies is very similar and is around 0.7 s in each switching pe-riod. Execution time for the two SVPWM strategies is also sim-ilar, around 1.65 s. Thus the analysed SVPWM strategies askfor around 2.3 times higher execution time than CBPWM, onaverage. Another important issue is the memory consumption.Carrier-based strategies do not require any memory storage. Onthe other hand, SVPWM1 and SVPWM2 strategies require 600integer and 500 real variables, and 840 integer and 700 real vari-ables, respectively, to be stored in the memory. In the actualrealization of the SVPWM algorithms, memory consumption isdeliberately sacrificed to achieve a reduction in the computationtime of the algorithm.

Finally, Table IV provides a comparison of the major char-acteristics of all the considered modulation strategies. As ex-pected, carrier-based techniques are more favorable for the real-world implementation. Also, an extension to higher numbers oflevels and phases is straightforward, which is in huge contrastto SVPWM strategies where each pair of the number of levelsand number of phases has to be considered separately.

IV. CONCLUSIONA comprehensive analysis of the five modulation strategies

for a five-phase three-level variable-speed drive system is givenin the paper. Three carrier-based and two space vector mod-ulation strategies are compared. The reason for choosing thelevel-shifted carriers with carriers in phase (PD-CBPWM), for


TABLE IVMAIN CHARACTERISTICS OF THE COMPARED MODULATION STRATEGIES

comparison with space vector strategies, is explained. Simula-tion and experimental results are shown to be in excellent agree-ment. Identical output characteristics are obtained for one car-rier-based strategy (CBPWM2) and one space vector modula-tion strategy (SVPWM2). However, the execution time of thespace vector strategy, even after minimization of the number ofcalculations by storing as many as possible data in the memory,is still more than two times higher than for the carrier-basedmethod. All analyzed strategies are characterized with the samephase voltage THD in the whole linear modulation index range.Comparison of the current THD shows that the two already men-tioned modulation strategies, CBPWM2 and SVPWM2 (thatequally share the time of application of the redundant spacevector), have the smallest current THD. Hence, taking all rel-evant aspects into consideration, CBPWM2 is the best for real-world applications.

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Obrad Dordevic (S11) received the Dipl. Ing.degree from the University of Belgrade, Belgrade,Serbia, in 2008.

From 2008 to 2009, he was with the Digital DriveControl Laboratory of the University of Belgrade.Since 2009, he has been with the Liverpool JohnMoores University, Liverpool, U.K., as a Ph.D.student. His main research interests are in the areasof power electronics, electrostatic precipitators, andadvanced variable speed drives.

Martin Jones received the B.Eng. (First ClassHonors) and Ph.D. degrees from the Liverpool JohnMoores University, Liverpool, U.K., in 2001 and2005, respectively.

He was a Research Student at the Liverpool JohnMoores University from September 2001 to 2005. Heis currently a Reader at the same university.

Dr. Jones was a recipient of the IEE Robinson Re-search Scholarship for his Ph.D. studies.

Emil Levi (S89M92SM99F09) received theM.Sc. and Ph.D. degrees from the University of Bel-grade, Belgrade, Serbia, in 1986 and 1990, respec-tively.

From 1982 until 1992, he was with the Departmentof Electric Engineering, University of Novi Sad. Hejoined Liverpool John Moores University, Liverpool,U.K., in May 1992, and has been a Professor of Elec-tric Machines and Drives since September, 2000.

Dr. Levi serves as Coeditor-in-Chief of the IEEETRANSACTIONS ON INDUSTRIAL ELECTRONICS, as an

Editor of the IEEE TRANSACTIONS ON ENERGY CONVERSION, and as Editor-in-Chief of the IET Electric Power Applications. He is the recipient of the CyrilVeinott Award of the IEEE Power and Energy Society for 2009.

2013 a comparison of carrier-based and space vector pwm techniques for three-level five-phase...

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