IEEE Catalog Number: ISBN:

CFP12773-PRT 978-1-4673-1261-5

2012 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012)

Seville, Spain 9 – 12 December 2012

Pages 1-499

1/2

ICECS 2012 Table of Contents

A1L-A Analog Circuits and Techniques I Time: Monday, December 10, 09:30 - 11:10 Place: Seville Chair: Maurits Ortmanns, University of Ulm, Germany

A1L-A01 A Low Power Variable GBW Opamp from 60MHz to 2GHz for Multi-Standard Receivers ....................................................................................................................... 1 Aytac Atac, Christian Harder, Ralf Wunderlich, Stefan Heinen RWTH Aachen University, Germany

A1L-A02 Low-Voltage CMOS Current Feedback Amplifier ....................................................... 5 Victoria Pisani, Ivan Grech, Owen Casha, Edward Gatt University of Malta, Malta

A1L-A03 Optimization Based on Surrogate Modeling for Analog Integrated Circuits........... 9 Firas Yengui, Lioua Labrak, Patrice Russo, Felipe Frantz, Nacer Abouchi Lyon Institute of Nanotechnology, France

A1L-A04 Web-Based Analog Design Using Tradeoff Charts.................................................. 13 Ahmed Hamza1, Andrew Philip1, Mohamed Ali1, Mohamed Dessouky2, Mohamed Kassem3 1Ain Shams University, Egypt; 2Ain Shams University & Mentor Graphics Corp., Egypt; 3Stone Soup Labs, United States

A1L-A05 Ultra-Low Voltage Drain-Bulk Connected MOS Transistors in Weak and Moderate Inversion ..................................................................................................... 17 Athanasios Dimakos2, Matthias Bucher2, Rupendra Kumar Sharma2, Ilias Chlis1 1Columbia University, United States; 2Technical University of Crete, Greece

A1L-B Bioengineering Circuits and Systems I Time: Monday, December 10, 09:30 - 11:10 Place: Andalucía 8 Chair: Mohamad Sawan, École Polytechnique, University of Montreal, Canada

A1L-B01 Evaluating the Influence of the Bit Error Rate on the Information of Neural Spike Signals............................................................................................................... 21 Christoph Bulach, Ulrich Bihr, Maurits Ortmanns Universität Ulm, Germany

A1L-B02 Towards an Optimized Wearable Neuromodulation Device for Urinary Incontinence ................................................................................................................ 25 Arsam N. Shiraz, Andreas Demosthenous, Anne Vanhoestenberghe University College London, United Kingdom

A1L-B03 Towards a Closed-Loop Transmitter System with Integrated Class-D Amplifier for Coupling-Insensitive Powering of Implants ....................................... 29 Virgilio Valente, Clemens Eder, Andreas Demosthenous, Nick Donaldson University College London, United Kingdom

A1L-B04 Multi-Application Electrical Stimulator Architecture Dedicated to Waveform Control by Electrode-Tissue Impedance Spectra Monitoring................................. 33 Florent Dupont, Cyril Condemine, Jean-François Beche, Marc Belleville CEA-Leti, France

A1L-B05 Selection of Wavelet-Bands for Neural Network Discrimination of Parkinsonian Tremor from Essential Tremor ........................................................... 37 Abdulnasir Hossen Sultan Qaboos University, Oman

A1L-C Digital Signal Processing Time: Monday, December 10, 09:30 - 11:10 Place: Andalucía 7 Chair: Javier Castro, IMSE-CNM (CSIC/University of Seville), Spain

A1L-C01 Hardware-Efficient Matrix Inversion Algorithm for Complex Adaptive Systems ....................................................................................................................... 41 Alfredo Rosado1, Taras Iakymchuk1, Manuel Bataller1, Marek Wegrzyn2 1Universitat de València, Spain; 2University of Zielona Góra, Poland

A1L-C02 Implementation of a New Adaptive Algorithm Using Fuzzy Cost Function and Robust to Impulsive Noise.................................................................................. 45 Taras Iakymchuk, Alfredo Rosado, Emilio Soria-Olivas, Manuel Bataller Universitat de València, Spain

A1L-C03 Rads Converter: an Approach to Analog to Information Conversion.................... 49 Javier Haboba2, Riccardo Rovatti2, Gianluca Setti1 1Università degli Studi di Ferrara, Italy; 2Università di Bologna, Italy

A1L-C04 High-Speed Compressed Sensing Reconstruction on FPGA Using OMP and AMP .............................................................................................................................. 53 Lin Bai, Patrick Maechler, Michael Muehlberghuber, Hubert Kaeslin ETH Zürich, Switzerland

A1L-D RF Building Blocks Time: Monday, December 10, 09:30 - 11:10 Place: Andalucía 6 Chair: Jorge Fernandes, Instituto Superior Técnico / INESC-ID, Portugal

A1L-D01 A Linearity Enhancement Technique and its Application to CMOS Wideband Low-Noise Amplifiers.................................................................................................. 57 Amir Hossein Masnadi Shirazi, Hooman Rashtian, Shahriar Mirabbasi University of British Columbia, Canada

A1L-D02 A 7GHz Wideband Self-Correcting Quadrature VCO ............................................... 61 Tomoyuki Arai2, Ali Hajimiri1 1California Institute of Technology, United States; 2Fujitsu Laboratories, United States

A1L-D03 Design Methodology and Integration of a 1.8GHz Outphasing Power Amplifier for Mobile Terminals................................................................................... 65 Omid Talebi Amiri, Adil Koukab École Polytechnique Fédérale de Lausanne, Switzerland

A1L-D04 4.0-5.5 GHz Tunable Power Splitter RFIC Using Active Inductors ......................... 69 You Zheng, Carlos Saavedra Queen's University, Canada

A1L-D05 Design of ADPLL System for WiMAX Applications in 40-nm CMOS...................... 73 Wenlong Jiang3, Armin Tavakol2, Popong Effendrik2, Marcel van de Gevel1, Frank Verwaal1, Robert Bogdan Staszewski2 1Catena Microelectronics BV., Netherlands; 2Delft University of Technology, Netherlands; 3University of California, Los Angeles, United States

A1L-E SPECIAL SESSION: Computationally Intensive Applications on FPGAs Time: Monday, December 10, 09:30 - 11:10 Place: Andalucía 5 Chair: Dionysios Reisis, National and Kapodistrian University of Athens, Greece

A1L-E01 A Soft IP Core Generating SoCs for the Efficient Stochastic Simulation of Large Biomolecular Networks Using FPGAs............................................................ 77 Orsalia Georgia Hazapis, Evangelos Logaras, Elias Manolakos University of Athens, Greece

A1L-E02 Signal Processing for Deep-Sea Observatories with Reconfigurable Hardware...................................................................................................................... 81 Konstantinos Manolopoulos1, Anastasios Belias2, Georgios Georgis1, Dionysios Reisis1, Efstratios Anasontzis1 1National and Kapodistrian University of Athens, Greece; 2National Centre for Scientific Research-Demokritos, Greece

A1L-E03 FPGA-Based Path-Planning of High Mobility Rover for Future Planetary Missions....................................................................................................................... 85 George Lentaris2, Dionisis Diamantopoulos2, John Stamoulias2, Kostas Siozios2, Dimitrios Soudris2, Marcos Avilés Rodrigálvarez1 1GMV, Spain; 2National Technical University of Athens, Greece

A1L-E04 Hardware Design and Verification Techniques for Giga-bit Forward-Error Correction Systems on FPGAs.................................................................................. 89 Ahmed Mahdi, Panagiotis Sakellariou, Nikos Kanistras, Ioannis Tsatsaragkos, Vassilis Paliouras University of Patras, Greece

A1L-E05 FPGA Based Cellular Automata for Environmental Modeling ................................ 93 Ioannis Vourkas, Georgios Ch. Sirakoulis Democritus University of Thrace, Greece

A2L-A Analog Circuits and Techniques II Time: Monday, December 10, 11:30 - 13:10 Place: Seville Chair: Maurits Ortmanns, University of Ulm, Germany

A2L-A01 A 6.66-kHz, 940-nW, 56PPM/°C, Fully on-Chip PVT Variation Tolerant CMOS Relaxation Oscillator................................................................................................... 97 Keishi Tsubaki, Tetsuya Hirose, Yuji Osaki, Seiichiro Shiga, Nobutaka Kuroki, Masahiro Numa Kobe University, Japan

A2L-A02 Compact Class-AB Follower for Wideband Closed Loop Line Drivers................ 101 David Gascon, Andreu Sanuy, Javier Sieiro Universitat de Barcelona, Spain

A2L-A03 A Low-Distortion Switched-Source-Follower Track-and-Hold Circuit ................. 105 Akinori Moriyama, Satoshi Taniyama, Takao Waho Sophia University, Japan

A2L-A04 A 2.5-GS/s 62dB THD SiGe Track-and-Hold Amplifier with Feedthrough Cancellation Technique............................................................................................ 109 Damiano Cascella, Francesco Cannone, Gianfranco Avitabile, Giuseppe Coviello Politecnico di Bari, Italy

A2L-A05 A CMOS Track-and-Hold Circuit with Beyond 30 GHz Input Bandwidth ............. 113 Behnam Sedighi, Anh Huynh, Efstratios Skafidas University of Melbourne, Australia

A2L-B Sensing and Sensor Networks Time: Monday, December 10, 11:30 - 13:10 Place: Andalucía 8 Chair: Philippe Benabes, Supelec, France

A2L-B01 All-Digital A/D Converter TAD for Sensor Interface over Wide Temperature Ranges ....................................................................................................................... 117 Takamoto Watanabe, Hirofumi Isomura, Tomohito Terasawa DENSO Corporation, Japan

A2L-B02 A Readout Circuit Implementation to Reduce the Flicker Noise in MEMS Electrothermal Sensors............................................................................................ 121 Ali Mohammadi2, Mehmet Yuce1, Reza Moheimani2 1Monash University, Australia; 2University of Newcastle, Australia

A2L-B03 In Pixel Implementation of Autoadaptative Integration Time................................ 125 Hassan Abbass2, Hawraa Amhaz2, Gilles Sicard2, David Alleysson1 1LPNC Laboratory, France; 2TIMA Laboratory, France

A2L-B04 Design and Implementation of a Neurocomputing ASIP for Environmental Monitoring in WSN .................................................................................................... 129 Jochen Rust, Steffen Paul Universität Bremen, Germany

A2L-B05 A System-Proof-of-Concept for Remote Measurement Applications .................. 133 Marko Mailand2, Stefan Getzlaff2, Andrew Dehennis1 1Senseonics, Incorporated, United States; 2Zentrum Mikroelektronik Dresden AG, Germany

A2L-C DSP Algorithm and Implementation Time: Monday, December 10, 11:30 - 13:10 Place: Andalucía 7 Chairs: Antonio Acosta, IMSE-CNM (CSIC/University of Seville), Spain Javier Castro, IMSE-CNM (CSIC/University of Seville), Spain

A2L-C01 FPGA Implementation of Simple Digital Signal Processor ................................... 137 Marko Butorac, Mladen Vucic University of Zagreb, Croatia

A2L-C02 Improving Palmprint Identification by Combining Multiple Classifiers and Using Gabor Filter ..................................................................................................... 141 Abdallah Meraoumia2, Salim Chitroub3, Ahmed Bouridane1 1Northumbria University & King Saudi University, Saudi Arabia; 2Université Kasdi Merbah Ouargla, Algeria; 3University of Sciences and Technology HOUARI BOUMEDIENE, Algeria

A2L-C03 Protein Alignment HW/SW Optimizations............................................................... 145 Gianvito Urgese, Mariagrazia Graziano, Marco Vacca, Muhammad Awais, Stefano Frache, Maurizio Zamboni Politecnico di Torino, Italy

A2L-C04 Parallel Scaling-Free and Area-Time Efficient CORDIC Algorithm....................... 149 Matteo Causo, Ting An, Lirida Alves de Barros Naviner Institut Mines-Telecom, Télécom ParisTech, France

A2L-C05 A VLSI Architecture for Multiple Antenna Eigenvalue-Based Spectrum Sensing ...................................................................................................................... 153 Seyede Mahya Safavi, Mahdi Shabany Sharif University of Technology, Iran

A2L-D RF and mmWave Circuits Time: Monday, December 10, 11:30 - 13:10 Place: Andalucía 6 Chair: Jorge Fernandes, Instituto Superior Técnico / INESC-ID, Portugal

A2L-D01 A 1-mW Current Reuse Quadrature RF Front-End for GPS L1 Band in 0.18µm CMOS ......................................................................................................................... 157 Hossein Jalili1, Ali Fotowat-Ahmady2, Mahta Jenabi3 1Sharif University of Technology, Iran; 2Sharif Unoversity of Technology, Iran; 3Unistar Micro Technology Inc., Canada

A2L-D02 A Power-Scalable RF CMOS Receiver for 2.4 GHz Wireless Sensor Network Applications............................................................................................................... 161 Kaushik Ghosal, Tejasvi Anand, Vikram Chaturvedi, Bharadwaj Amrutur Indian Institute of Science, India

A2L-D03 A 20 Mb/s 0.084 nJ/bit ISM-Band Transmitter Dedicated to Medical Sensor Networks .................................................................................................................... 165 Arash Moradi, Mohamad Sawan École Polytechnique de Montréal, Canada

A2L-D04 Analysis and Characterization of Mismatches in Outphasing Transmitter ......... 169 Shailesh Kulkarni, Dixian Zhao, Patrick Reynaert Katholieke Universiteit Leuven, Belgium

A2L-D05 A 60GHz Class F-E Power VCO with Vector-Modulator Feedback in 65nm CMOS Technology .................................................................................................... 173 Sophie Dréan2, Nicolas Martin1, Nathalie Deltimple1, Eric Kerhervé1, Baudouin Martineau2, Didier Belot2 1IMS Laboratory, France; 2STMicroelectronics, France

A3L-A Analog Circuits and Techniques III Time: Monday, December 10, 14:40 - 16:20 Place: Seville Chair: Maurits Ortmanns, University of Ulm, Germany

A3L-A01 A Low-Power CMOS RF Power Detector................................................................. 177 Siraporn Sakphrom, Apinunt Thanachayanont King Mongkut's Institute of Technology Ladkrabang, Thailand

A3L-A02 Millimeter-Wave High-Q Active Inductor in 65nm CMOS ...................................... 181 Domenico Pepe1, Domenico Zito2 1Tyndall National Institute, Ireland; 2Tyndall National Institute & University College Cork, Ireland

A3L-A03 Windowed Phase Comparator for an 80Gbit/s CDR .............................................. 185 Quentin Béraud-Sudreau2, Olivier Mazouffre2, Michel Pignol1, Louis Baguena3, Claude Neveu3, Jean-Baptiste Begueret2, Thierry Taris2 1CNES, France; 2L'Université de Bordeaux, France; 3Thales Alenia Space, France

A3L-A04 A Novel Multi-Step C-2C DAC Architecture ............................................................ 189 Mazyar Abedinkhan2, Amir Masoud Sodagar2, Reza Mohammadi2, Payman Adl1 1Brunel University, United Kingdom; 2K. N. Toosi University of Technology, Iran

A3L-A05 A CMOS 0.13µm Low Power Front-End for GEM Detectors .................................. 193 Andrea Costantini2, Alessandro Pezzotta2, Andrea Baschirotto2, Marcello De Matteis2, Stefano D'Amico3, Fabrizio Murtas1, Giuseppe Gorini2 1INFN-Frascati, Italy; 2Università degli Studi di Milano-Bicocca, Italy; 3Università del Salento, Italy

A3L-B Sensors and Photonics Time: Monday, December 10, 14:40 - 16:20 Place: Andalucía 8 Chair: Henry Radamson, KTH Royal Institute of Technology, Sweden

A3L-B01 All-Digital A/D Converter TAD for High-Resolution and Low-Power Sensor/RF Interface .................................................................................................. 197 Takamoto Watanabe, Tomohito Terasawa DENSO Corporation, Japan

A3L-B02 Temperature Considerations on Hall Effect Sensors Current-Related Sensitivity Behaviour................................................................................................ 201 Maria-Alexandra Paun, Jean-Michel Sallese, Maher Kayal Ecole Polytechnique Federale de Lausanne, Switzerland

A3L-B03 A Tri-Mode Event-Based Vision Sensor with an Embedded Wireless Transmitter ................................................................................................................ 205 Juan Antonio Leñero-Bardallo3, Wei Tang4, Dongsoo Kim1, Joon Hyuk Park4, Eugenio Culurciello2 1Aptina Imaging, United States; 2Purdue University, United States; 3Universitetet i Oslo, Norway; 4Yale University, United States

A3L-B04 Improved High Precision Optical Angle Measurement System with No Interference of Light Gradients and Mismatch....................................................... 209 Jürgen Oehm, Christian Koch, Ivan Stoychev, Andreas Gornik Ruhr Universitaet, Germany

A3L-B05 A 10Gb/s Inductorless Push Pull Current Mirror Transimpedance Amplifier ..... 213 Mohammed Hassan, Horst Zimmermann Technische Universität Wien, Austria

A3L-C Digital Circuits on FPGAs Time: Monday, December 10, 14:40 - 16:20 Place: Andalucía 7 Chair: Antonio Acosta, IMSE-CNM (CSIC/University of Seville), Spain

A3L-C01 Performance Evaluation for FPGA-Based Processing of Tree-Like Structures.. 217 Valery Sklyarov2, Iouliia Skliarova2, Dmitri Mihhailov1, Alexander Sudnitson1 1Tallinn University of Technology, Estonia; 2Universidade de Aveiro, Portugal

A3L-C02 FPGA Implementation of Very High Radix Square Root with Prescaling ............ 221 Alexandru Amaricai, Oana Boncalo University Politehnica of Timisoara, Romania

A3L-C03 Performance Evaluation of RAM-Based Implementation of Finite State Machines in FPGAs................................................................................................... 225 Raouf Senhadji-Navarro, Ignacio García-Vargas, Jose Luis Guisado Universidad de Sevilla, Spain

A3L-C04 FPGA-Based Autonomous Parking of a Car-Like Robot Using Fuzzy Logic Control ....................................................................................................................... 229 Neil Scicluna, Edward Gatt, Owen Casha, Ivan Grech, Joseph Micallef University of Malta, Malta

A3L-C05 A Generic FPGA Emulation Framework.................................................................. 233 Fernando Moraes, Matheus Moreira, Carlo Lucas, Dairan Corrêa, Douglas Cardoso, Maurício Magnaguagno, Guilherme Castilhos, Ney Calazans Pontifícia Universidade do Rio Grande do Sul, Brazil

A3L-D Wireless and Wireline Communications Time: Monday, December 10, 14:40 - 16:20 Place: Andalucía 6 Chair: Jorge Fernandes, Instituto Superior Técnico / INESC-ID, Portugal

A3L-D01 Design of a 80 Gbit/s SiGe BiCMOS Fully Differential Input Buffer for Serial Electrical Communication ........................................................................................ 237 Timothy De Keulenaer, Yu Ban, Zhisheng Li, Johan Bauwelinck Ghent University, Belgium

A3L-D02 A Power Efficient 3-Gbits/s 1.8V PMOS-Based LVDS Output Driver.................... 240 Hazem Marar1, Khaldoon Abugharbieh1, Abdel-Karim Al-Tamimi2 1Princess Sumaya University for Technology, Jordan; 2Yarmouk University, Jordan

A3L-D03 Accessible Approach to Wideband Matching ........................................................ 244 Anu Lehtovuori, Risto Valkonen, Martti Valtonen Aalto University, Finland

A3L-D04 A Generalized Graphical Model to Specify A/D Resolution from Receiver Front-End ................................................................................................................... 248 Shenjie Wang, Catherine Dehollain École Polytechnique Fédérale de Lausanne, Switzerland

A4L-A Analog Filters Time: Monday, December 10, 17:10 - 18:50 Place: Seville Chair: Maurits Ortmanns, University of Ulm, Germany

A4L-A01 Lumped-Element-Based Single/Dual-Passband Analog Filters Using Signal-Interference Principles.............................................................................................. 252 Raul Loeches-Sánchez1, Roberto Gómez-García1, Bernard Jarry2, Julien Lintignat2, Bruno Barelaud2 1Universidad de Alcalá, Spain; 2Université de Limoges, France

A4L-A02 Self-Biased Input Common-Mode Generation for Improving Dynamic Range and Yield in Inverter-Based Filters .......................................................................... 256 Antonio Jose Ginés, Alberto Villegas, Eduardo Peralías, Adoracion Rueda Universidad de Sevilla / Instituto de Microelectrónica de Sevilla, Spain

A4L-A03 A 1.25mW 3rd-Order Active-Gm-RC 250MHz-Bandwidth Analog Filter Based on Power-Stability Optimization .............................................................................. 260 Marcello De Matteis1, Stefano D'Amico2, Andrea Costantini1, Andrea Baschirotto1 1Università degli Studi di Milano-Bicocca, Italy; 2Università del Salento, Italy

A4L-A04 Dynamic Range Improvement of New Leap-Frog Filter Using Numerical Optimization............................................................................................................... 264 Drazen Jurisic2, Neven Mijat2, George S. Moschytz1 1Bar-Ilan University, Israel; 2University of Zagreb, Croatia

A4L-A05 A Fourth Order CMOS Band Pass Filter for PIR Sensors...................................... 268 G. Doménech-Asensi2, F. Martínez-Viviente2, J. Illade-Quinteiro2, J. Zapata-Pérez2, R. Ruiz-Merino2, J. López-Alcantud2, J. Martínez-Alajarín2, F. Fernández-Luque2, J. Carrillo1, M. Domínguez1 1Universidad de Extermadura, Spain; 2Universidad Politécnica de Cartagena, Spain

A4L-B Mixed-signal Test and Verification Time: Monday, December 10, 17:10 - 18:50 Place: Andalucía 8 Chairs: Diego Vázquez, IMSE-CNM (CSIC/University of Seville), Spain Salvador Mir, TIMA, France

A4L-B01 Accurate Estimation of Analog Test Metrics with Extreme Circuits .................... 272 Kamel Beznia2, Ahcene Bounceur2, Louay Abdallah1, Ke Huang1, Salvador Mir1, Reinhardt Euler2 1TIMA Laboratory, France; 2Université de Bretagne Occidentale, France

A4L-B02 Single Pass Temperature Calibration of the ASIC on a General Purpose ATE... 276 Janez Trontelj Jr., Blaž Šmid, Janez Trontelj University of Ljubljana, Slovenia

A4L-B03 A Template for the Construction of Efficient Checkers with Full Verification Guarantees ................................................................................................................ 280 Leandro S. Freitas, Gabriel A. G. Andrade, Luiz C. V. Dos Santos Universidade Federal de Santa Catarina, Brazil

A4L-B04 A Formal Framework for Testing with Assertion Checkers in Mixed-Signal Simulation.................................................................................................................. 284 Laurence Pierre TIMA Laboratory, France

A4L-C VLSI Digital Implementations Time: Monday, December 10, 17:10 - 18:50 Place: Andalucía 7 Chair: Antonio Acosta,

A4L-C01 Design and Characterization of a QLUT in a Standard CMOS Process ............... 288 Diogo Brito, Jorge Fernandes, Paulo Flores, José Monteiro INESC-ID / IST / Universidade Técnica de Lisboa, Portugal

A4L-C02 Dual-Edge Triggered Sense Amplifier Flip-Flop Utilizing an Improved Scheme to Reduce Area, Power, and Complexity.................................................. 292 Seyed Ebrahim Esmaeili1, Riadul Islam2, Asim Al-Khalili1, Glenn Cowan1 1Concordia University, Canada; 2École Polytechnique de Montréal, Canada

A4L-C03 Maximum Delay Variation Temperature-Aware Standard Cell Design................. 296 Marc Pons, Jean-Luc Nagel, Christian Piguet CSEM S.A, Switzerland

A4L-C04 A Low Complexity Architecture for the Cell Search Applied to the LTE Systems ..................................................................................................................... 300 Ameneh Golnari1, Golnoosh Sharifan2, Yalda Amini2, Mahdi Shabany3 1Princeton University, United States; 2Sharif university of technology, Iran; 3University of Toronto, Canada

A4L-C05 Digitizing the Yuan Tseh Lee Array for Microwave Background Anisotropy by 5Gsps ADC Boards.............................................................................................. 304 Homin Jiang, Howard Liu, Kim Guzzino, Derek Kubo, Chao-Te Li, Ray Chang Institute of Astronomy and Astrophysics, Academia Sinica, Taiwan

A4L-D Algorithms for Communications Time: Monday, December 10, 17:10 - 18:50 Place: Andalucía 6 Chair: Thanos Stouraitis, University of Patras, Greece

A4L-D01 PMEPR Reduction for OFCDM Using SLM and PTS .............................................. 308 M. Zafi S. Shah Syed, Abdul Waheed Umrani, Aftab Ahmed Memon, M. Z. Abbas Shah Syed Mehran University of Engineering & Technology, Pakistan

A4L-D02 Adaptive Slope and Threshold Companding Technique for PAPR Reduction in OFDM Systems...................................................................................................... 312 Vivek Yenamandra3, Feiran Lei3, Saleh Al-Araji1, Nazar Ali1, Mohammed Ismail2 1Khalifa University, U.A.E.; 2Khalifa University of Science Technology & Research, U.A.E.; 3Ohio State University, United States

A4L-D03 Selective Channelization on an SDR Platform for LTE-A Carrier Aggregation ... 316 Isael Diaz2, Rodolfo Torrea-Duran1, Sofie Pollin1, Liesbet Van der Perre1, Viktor Öwall2 1IMEC, Belgium; 2Lund University, Sweden

A4L-D04 A Novel Implementation of Sequential Output Based Parallel Processing - Orthogonal Wavelet Division Multiplexing for Das on SDR Platform .................. 320 Chinmaya Mahapatra1, Ashwin Ramakrishnan1, Thanos Stouraitis2, Victor C. M. Leung1 1University of British Columbia, Canada; 2University of Patras, Greece

A4L-E SPECIAL SESSION: Advances in Embedded Vision Hardware Time: Monday, December 10, 17:10 - 18:50 Place: Andalucía 5 Chair: Jorge Fernández-Berni, IMSE-CNM (CSIC/University of Seville), Spain

A4L-E01 Mixed Signal SIMD Cellular Processor Array Vision Chip Operating at 30,000 fps............................................................................................................................... 324 Stephen Carey, David Barr, Bin Wang, Alexey Lopich, Piotr Dudek University of Manchester, United Kingdom

A4L-E02 Bottom-Up Visual Attention Model Based on FPGA.............................................. 328 Francisco Barranco, Javier Diaz, Begoña Pino, Eduardo Ros Universidad de Granada, Spain

A4L-E03 CMOS SPADs Selection, Modeling and Characterization Towards Image Sensors Implementation........................................................................................... 332 Manuel Moreno García, Oscar Guerra Vinuesa, Rocio del Río Fernández, Belen Pérez Verdú, Ángel Rodríguez Vázquez Universidad de Sevilla / Instituto de Microelectrónica de Sevilla, Spain

A4L-E04 Embedded Low-Power Low-Cost Camera Sensor Based on FPGA and its Applications in Mobile Robots................................................................................. 336 Jordi Albo-Canals, Santiago Ortega, Sergi Perdices, Alexey Badalov, Xavier Vilasis-Cardona Universitat Ramon Llull, Spain

A4L-E05 High Dynamic Range Image Sensor with Self Adapting Integration Time in 3D Technology........................................................................................................... 340 Fadoua Guezzi-Messaoud1, Antoine Dupret1, Arnaud Peizerat1, Yves Blanchard2 1CEA LETI DACLE L3I, France; 2ESIEE PARIS, France

B1L-A Data Converters Time: Tuesday, December 11, 09:30 - 11:10 Place: Seville Chair: Saul Rodríguez, Royal Institute of Technology (KTH), Sweden

B1L-A01 A/D Conversion of the Battery Voltage in Advanced CMOS Technologies......... 344 Marco Zamprogno, Alberto Minuti, Freancesca Girardi, Germano Nicollini ST-Ericsson, Italy

B1L-A02 On the Design of a 2-2-0 MASH Delta-Sigma-Pipeline Modulator ........................ 348 Reza Mohammadi, Hossein Shamsi, Mazyar Abedinkhan K. N. Toosi University of Technology, Iran

B1L-A03 Analysis of VCO Based Noise Shaping ADCs Linearized by PWM Modulation.. 352 Luis Hernandez1, Enrique Prefasi1, Susana Paton1, Pieter Rombouts2 1Universidad Carlos III de Madrid, Spain; 2Universiteit Gent, Belgium

B1L-A04 Design of an Undersampled BP Sigma-Delta Modulator Using LC and Time-Interleaved Resonators............................................................................................. 356 Nicolas Beilleau2, Vincent Bourguet2, Fernando Rangel de Sousa1 1Universidade Federal de Santa Catarina, Brazil; 2Universidade Federal do Rio Grande do Norte, Brazil

B1L-A05 Incremental-Sigma-Delta-ADCs with Dynamic Conversion Length Adaption..... 360 Johannes Uhlig, René Schüffny Technische Universität Dresden, Germany

B1L-B Bioengineering Circuits and Systems II Time: Tuesday, December 11, 09:30 - 11:10 Place: Andalucía 8 Chair: Manuel Delgado-Restituto, IMSE-CSIC

B1L-B01 Interpolation Filter Design for Hearing-Aid Audio Class-D Output Stage Application................................................................................................................. 364 Peter Pracný, Pere Llimós Muntal, Erik Bruun Danmarks Tekniske Universitet, Denmark

B1L-B02 Dual Data Pulse Width Modulator for Wireless Simultaneous Measurement of Redox Potential and Temperature Using a Single RFID Chip .......................... 368 Boram Kim, Kazuo Nakazato Nagoya University, Japan

B1L-B03 The Wireless System for Egg Signal Acquisition .................................................. 372 Dariusz Komorowski, Stanislaw Pietraszek, Damian Grzechca Silesian University of Technology, Poland

B1L-B04 A High Dynamic Range Wideband CMOS Phase Angle Detector for Bioimpedance Spectroscopy................................................................................... 376 Jose Luis Ausín1, Javier Ramos1, Francisco Duque-Carrillo1, Guido Torelli2 1Universidad de Extremadura, Spain; 2Università degli studi di Pavia, Italy

B1L-C SPECIAL SESSION: Digital Circuits for Embedded Control and Security Time: Tuesday, December 11, 09:30 - 11:10 Place: Andalucía 7 Chair: Marco Storace, Unversity of Genova, Italy

B1L-C01 Hardware-in-the-Loop Simulations of Circuit Architectures for the Computation of Exact and Approximate Explicit MPC Control Functions .......... 380 Alberto Oliveri, Marco Storace DITEN, University of Genoa, Italy

B1L-C02 VLSI Implementation of Digital Frequency Sensors as Hardware Countermeasure........................................................................................................ 384 Raúl Jiménez, Guillermo Feria, Juan Antonio Gómez Galán, Fernando Gómez-Bravo, Manuel Sánchez Universidad de Huelva, Spain

B1L-C03 ASIC-in-the-Loop Methodology for Verification of Piecewise Affine Controllers ................................................................................................................. 388 Macarena Cristina Martínez-Rodríguez, Piedad Brox, Javier Castro, Erica Tena, Antonio J. Acosta, Iluminada Baturone Universidad de Sevilla / Instituto de Microelectrónica de Sevilla, Spain

B1L-C04 Reducing Bit Flipping Problems in SRAM Physical Unclonable Functions for Chip Identification..................................................................................................... 392 Susana Eiroa, Javier Castro, Macarena Cristina Martínez-Rodríguez, Erica Tena, Piedad Brox, Iluminada Baturone Universidad de Sevilla / Instituto de Microelectrónica de Sevilla, Spain

B1L-D Digital Circuits for Channel Coding Time: Tuesday, December 11, 09:30 - 11:10 Place: Andalucía 6 Chair: Piedad Brox, IMSE-CNM (CSIC/University of Seville), Spain

B1L-D01 Low Energy High Speed Reed-Solomon Decoder Using Two Parallel Modified Evaluator Inversionless Berlekamp-Massey........................................... 396 Hazem Ahmed2, Hamed Salah2, Tallal Elshabrawy2, Hossam A. H. Fahmy1 1Cairo University, Egypt; 2German University in Cairo, Egypt

B1L-D02 High Speed Low Complexity Radix-16 Max-Log-MAP SISO Decoder .................. 400 Oscar Sánchez1, Christophe Jégo2, Michel Jézéquel1, Yannick Saouter1 1Institut Mines-Télécom/Télécom-Bretagne, France; 2Université de Bordeaux, France

B1L-D03 High-Throughput FPGA-Based Emulator for Structured LDPC Codes................ 404 Fabian Angarita, Vicente Torres, Asuncion Pérez-Pascual, Javier Valls Universidad Politecnica de Valencia, Spain

B1L-D04 Fully-Parallel LUT-Based (2048,1723) LDPC Code Decoder for FPGA................. 408 Vicente Torres, Asuncion Perez-Pascual, Trini Sansaloni, Javier Valls Universidad Politecnica de Valencia, Spain

B1L-D05 Decoder for an Enhanced Serial Generalized Bit Flipping Algorithm.................. 412 Francisco García-Herrero, Maria Jose Canet, Javier Valls Universidad Politecnica de Valencia, Spain

B2L-A Oversampling Data Converters Time: Tuesday, December 11, 11:30 - 13:10 Place: Seville Chair: Saul Rodríguez, Royal Institute of Technology (KTH), Sweden

B2L-A01 Dynamic Range Improvement in 2nd-Order Low-Pass Multibit Sigma-Delta Modulators................................................................................................................. 416 Andrea Barbieri, Sergio Pernici, Germano Nicollini ST-Ericsson, Italy

B2L-A02 Performance Tuning of Multi-Bit Continuous Time Sigma-Delta Modulators Using a Switched System Model ............................................................................. 420 Christoph Zorn1, Timon Brückner2, Maurits Ortmanns2, Wolfgang Mathis1 1Leibniz Universität Hannover, Germany; 2Universität Ulm, Germany

B2L-A03 Analysis of Exponentially Decaying Pulse Shape DACs in Continuous-Time Sigma-Delta Modulators ........................................................................................... 424 Sha Tao, Julian Garcia, Saul Rodriguez, Ana Rusu KTH Royal Institute of Technology, Sweden

B2L-A04 Joint Estimation of Filter Nonidealities in Continuous-Time Sigma-Delta Modulators by Using an Unscented Kalman Filter ................................................ 428 Matthias Lorenz2, Michael Maurer1, Yiannos Manoli1, Maurits Ortmanns2 1German Albert-Ludwigs-Universität Freiburg / IMTEK, Germany; 2Universität Ulm, Germany

B2L-A05 Discrete-Time Simulation of Arbitrary Digital/Analog Converter Waveforms in Continuous-Time Sigma-Delta Modulators ........................................................ 432 Timon Brückner2, Martin Kiebler2, Christoph Zorn1, Wolfgang Mathis1, Maurits Ortmanns2 1Leibniz Universität Hannover, Germany; 2Universität Ulm, Germany

B2L-B Analysis and Design Techniques for Low-Power Circuits Time: Tuesday, December 11, 11:30 - 13:10 Place: Andalucía 8 Chair: Vojin G. Oklobdzija, University of California. ACSEL Laboratory, USA

B2L-B01 CBSC-Based Pipelined Analog-to-Digital Converters: Power Dissipation Bound Analysis ......................................................................................................... 436 Majid Zamani, Clemens Eder, Andreas Demosthenous University College London, United Kingdom

B2L-B02 Peak Power Estimation Using Activity Measured on Emulator ............................ 440 Christian Berthet, Philippe Georgelin, Janvier Ntyame, Mathieu Raffin STMicroelectronics, France

B2L-B03 A Dual Threshold Voltage Technique for Glitch Minimization.............................. 444 Mariem Slimani2, Philippe Matherat1, Yves Mathieu2 1Institut Mines-Telecom, Télécom ParisTech, France; 2Institut TELECOM, TELECOM-ParisTech, LTCI-CNRS, France

B2L-B04 A 100-fJ/Cycle Sub-VT Decimation Filter Chain in 65 nm CMOS.......................... 448 Syed Muhammad Yasser Sherazi, Peter Nilsson, Henrik Sjöland, Joachim Neves Rodrigues Lund University, Sweden

B2L-B05 Low-Power Two's-Complement Multiplication Based on Selective Activation... 452 Panagiotis Sakellariou, Vassilis Paliouras University of Patras, Greece

B2L-C Circuit Level CAD Time: Tuesday, December 11, 11:30 - 13:10 Place: Andalucía 7 Chair: Ricardo Reis, Universidade Federal do Rio Grande do Sul, Brazil

B2L-C01 Efficient Optimization Methodology for CT Functions Based on a Modified Bayesian Kriging Approach ..................................................................................... 456 Catalin-Adrian Tugui, Romain Benassi, Stefan Apostol, Philippe Benabes Supelec, France

B2L-C02 An Efficient Solution Space for Floorplan of 3D-LSI ............................................. 460 Hiroshi Tezuka, Kunihiro Fujiyoshi Tokyo University of Agriculture and Technology, Japan

B2L-C03 Fast Floorplanning for Fixed-Outline and Non-Rectangular Regions.................. 464 Mohammad Ahmed, Shantesh Pinge, Malgorzata Chrzanowska-Jeske Portland State University, United States

B2L-C04 Lagrangian Relaxation-Based Discrete Gate Sizing for Leakage Power Minimization............................................................................................................... 468 Vinicius Dos S. Livramento1, Chrystian Guth1, José Luís Güntzel1, Marcelo O. Johann2 1Universidade Federal de Santa Catarina, Brazil; 2Universidade Federal do Rio Grande do Sul, Brazil

B2L-C05 Finding the Hamiltonian Circuits in an Undirected Graph Using the Mesh-Links Incidence ......................................................................................................... 472 Cristian Onete2, Maria Cristina Onete1 1CASED & Technische Universität Darmstadt, Germany; 2NXP Semiconductors, Netherlands

B2L-D Nonlinear Circuits and Systems I Time: Tuesday, December 11, 11:30 - 13:10 Place: Andalucía 6 Chair: Sergio Callegari, Università di Bologna, Italy

B2L-D01 Improved Linearization of a High Power Amplifier to Reduce Spectral Distortions near the Saturation Area....................................................................... 476 Mathilde Brandon3, Myriam Ariaudo2, Sylvain Traverso1, Jessica Bouvier1, Jean-Luc Gautier2, Inbar Fijalkow2 1THALES Communications and Security, France; 2Université de Cergy-Pontoise, France; 3Université de Cergy-Pontoise / THALES Communications and Security, France

B2L-D02 Bifurcation Diagrams in MOS-NDR Frequency Divider Circuits........................... 480 Juan Núñez, María J. Avedillo, José M. Quintana Universidad de Sevilla / Instituto de Microelectrónica de Sevilla, Spain

B2L-D03 Nonlinear Harmonic Analysis of Multistage Amplifiers......................................... 484 Antonio Buonomo, Alessandro Lo Schiavo Seconda Università degli Studi di Napoli, Italy

B2L-D04 A "Divide-by-Odd Number" Direct Injection CMOS LC Injection-Locked Frequency Divider ..................................................................................................... 488 Masfandyar Asfandyar Awan1, Malik Summair Asghar1, Michael Peter Kennedy2 1Linkoping University, Sweden; 2University College Cork, Ireland

B2L-D05 Design for Linearizability of GaN Based Multi-Carrier Doherty Power Amplifier Through Bias Optimization...................................................................... 492 Oualid Hammi1, Sung-Chan Jung2, Fadhel Ghannouchi2 1King Fahd University of Petroleum and Minerals, Saudi Arabia; 2University of Calgary, Canada

B3L-A Nyquist Rate Data Converters Time: Tuesday, December 11, 14:40 - 16:20 Place: Seville Chair: Eduard Alarcón, Technical University of Catalunya (UPC), Spain

B3L-A01 A 4-bit 1.5GSps 4.2mW Comparator-Based Binary Search ADC in 90nm ........... 496 Taimur Rabuske1, Fabio Rabuske3, Jorge Fernandes2, Cesar Rodrigues3 1INESC-ID / Instituto Superior Técnico, Portugal; 2INESC-ID / IST / Universidade Técnica de Lisboa, Portugal; 3Universidade Federal de Santa Maria, Brazil

B3L-A02 A 749nW 1MSps 8-bit SAR ADC at 0.5V Employing Boosted Switches............... 500 Taimur Rabuske1, Jorge Fernandes2, Saeid Nooshabadi3, Cesar Rodrigues4, Fabio Rabuske4 1INESC-ID / Instituto Superior Técnico, Portugal; 2INESC-ID / IST / Universidade Técnica de Lisboa, Portugal; 3Michigan Technological University, United States; 4Universidade Federal de Santa Maria, Brazil

B3L-A03 A Low-Power Fully Differential Cyclic 9-bit ADC ................................................... 504 Niko Bako, Adrijan Baric University of Zagreb, Croatia

B3L-A04 Design of Hybrid Resistive-Capacitive DAC for SAR A/D Converters ................. 508 Behnam Sedighi2, Anh Huynh2, Efstratios Skafidas2, Daniel Micusik1 1IHP Microelectronics, Germany; 2University of Melbourne, Australia

B3L-A05 A 11B 5.1µW Multi-Slope ADC with a TDC Using Multi-Phase Clock Signals ..... 512 Kisu Kim, Masayuki Ikebe, Junichi Motohisa, Eiichi Sano Hokkaido University, Japan

B3L-B Circuit Techniques for Energy Harvesting Applications Time: Tuesday, December 11, 14:40 - 16:20 Place: Andalucía 8 Chair: Shahriar Mirabbasi, University of British Columbia, Canada

B3L-B01 An Ultra-Low Power Li-Ion Battery Charger for Micro-Power Solar Energy Harvesting Applications ........................................................................................... 516 Naser Khosro Pour, Stefano Facchin, François Krummenacher, Maher Kayal Ecole Polytechnique Fédérale de Lausanne, Switzerland

B3L-B02 A Passive CMOS Rectifier with Leakage Current Control for Medical Implants ..................................................................................................................... 520 Mehrdad A. Ghanad, Catherine Dehollain École Polytechnique Fédérale de Lausanne, Switzerland

B3L-B03 Design Comparison of Low-Power Rectifiers Dedicated to RF Energy Harvesting.................................................................................................................. 524 Dean Karolak1, Thierry Taris1, Yann Deval1, Jean-Baptiste Béguéret1, André Mariano2 1L'Université de Bordeaux, France; 2Universidade Federal do Paraná, Brazil

B3L-B04 A Process-Compatible Passive RFID Tag's Digital Design for Subthreshold Operation ................................................................................................................... 528 Weiwei Shi2, Chiu-Sing Choy1 1Chinese University of Hong Kong, Hong Kong; 2Shenzhen University, China

B3L-B05 Design and Analysis of Multi-Core Homogeneous Systems for Energy Harvesting Applications ........................................................................................... 532 Meeta Srivastav, Leyla Nazhandali Virginia Polytechnic Institute and State University, United States

B3L-C Methodologies for Systems-on-Chip Time: Tuesday, December 11, 14:40 - 16:20 Place: Andalucía 7 Chair: Kaijian Shi, Cadence Design Systems, USA

B3L-C01 On AOP Techniques for C++-Based HW/SW Component Implementation.......... 536 Tiago Rogério Mück, Antônio Augusto Fröhlich Universidade Federal de Santa Catarina, Brazil

B3L-C02 An RTL Method for Hiding Clock Domain Crossing Latency................................ 540 Ghaith Tarawneh, Alex Yakovlev Newcastle University, United Kingdom

B3L-C03 Enhancing Performance of MPSoCs Through Distributed Resource Management .............................................................................................................. 544 Marcelo Mandelli, Guilherme Castilhos, Fernando Moraes Pontifícia Universidade do Rio Grande do Sul, Brazil

B3L-C04 Evaluation of Adaptive Management Techniques in NoC-Based MPSoCs ......... 548 Fernando Moraes1, Everton Carara2, Marcelo Ruaro1, Guilherme Madalozzo1 1Pontifícia Universidade do Rio Grande do Sul, Brazil; 2Universidade Federal de Santa Maria, Brazil

B3L-C05 A Redundant Wire Addition Method for Patchable Accelerator ........................... 552 Masayuki Wakizaka3, Hiroaki Yoshida1, Yuko Hara-Azumi2, Shigeru Yamashita3 1Fujitsu Laboratories of America, Inc, Japan; 2Nara Institute of Science and Technology, Japan; 3Ritsumeikan University, Japan

B3L-D Multimedia Systems and Signal Processing I Time: Tuesday, December 11, 14:40 - 16:20 Place: Andalucía 6 Chair: Sergio Bampi, UFRGS, Brazil

B3L-D01 Hybrid Multiple Constant Multiplication for FPGAs............................................... 556 Martin Kumm, Peter Zipf Universität Kassel, Germany

B3L-D02 Scene-Based Noise Reduction on a Smart Camera............................................... 560 Faouzi Hamdi, Tomasz Toczek, Barthélémy Heyrman, Dominique Ginhac Université de Bourgogne, France

B3L-D03 Dynamic Tree-Depth Adjustment for Low Power HEVC Encoders ...................... 564 Guilherme Correa4, Pedro Assuncao1, Luis A. da Silva Cruz2, Luciano Agostini3 1Polytechnic Institute of Leiria, Portugal; 2Universidade de Coimbra / Instituto de Telecomunicações, Portugal; 3Universidade Federal de Pelotas, Brazil; 4University of Coimbra / Instituto de Telecomunicacoes, Portugal

B3L-D04 Fast HEVC Intra Mode Decision Based on Dominant Edge Evaluation and Tree Structure Dependencies .................................................................................. 568 Thaísa Leal da Silva3, Luis A. da Silva Cruz1, Luciano Agostini2 1Universidade de Coimbra / Instituto de Telecomunicações, Portugal; 2Universidade Federal de Pelotas, Brazil; 3University of Coimbra, Portugal

B3L-D05 A High Quality Hardware Friendly Motion Estimation Algorithm Focusing in HD Videos .................................................................................................................. 572 Pargles Dall'Oglio, Cássio Cristani, Marcelo Porto, Luciano Agostini Universidade Federal de Pelotas, Brazil

B4L-A PhD Competition Time: Tuesday, December 11, 17:10 - 19:10 Place: Seville Chair: Fernando Medeiro, Anafocus, Spain

B4L-A01 A Telemetry Operated Vestibular Prosthesis ......................................................... 576 Dominik Cirmirakis, Dai Jiang, Andreas Demosthenous, Nick Donaldson, Timothy Perkins University College London, United Kingdom

B4L-A02 Model-Based Design for Selecting Fingerprint Recognition Algorithms for Embedded Systems .................................................................................................. 579 Rosario Arjona, Iluminada Baturone Universidad de Sevilla / Instituto de Microelectrónica de Sevilla, Spain

B4L-A03 Electrical Characterization of a C-Element with LiChEn ....................................... 583 Matheus Moreira, Ney Calazans Pontifícia Universidade do Rio Grande do Sul, Brazil

B4L-A04 Control and Acquisition System for a High Dynamic Range CMOS Image Sensor ........................................................................................................................ 586 Sonia Vargas-Sierra, Gustavo Liñán-Cembrano, Ángel Rodríguez Vázquez Universidad de Sevilla / Instituto de Microelectrónica de Sevilla, Spain

B4L-A05 Long-Term Pulse Stimulation and Recording in an Accelerated Neuromorphic System.............................................................................................. 590 Vasilis Thanasoulis, Johannes Partzsch, Bernhard Vogginger, Christian Mayr, René Schüffny Technische Universität Dresden, Germany

B4L-A06 Real-Time FPGA Connected Component Labeling System.................................. 593 Elisa Calvo-Gallego2, Alejandro Cabrera Aldaya1, Piedad Brox2, Santiago Sánchez-Solano2 1Instituto Superior Politécnico José Antonio Echevarría, Cuba; 2Universidad de Sevilla / Instituto de Microelectrónica de Sevilla, Spain

B4P-G Poster Session 1 Time: Tuesday, December 11, 17:10 - 19:00 Place: Poster Area Chair: José M. de la Rosa, IMSE-CNM (CSIC/University of Seville), Spain

B4P-G01 A 500 MHz to 6 GHz Frequency Synthesizer Architecture for Cognitive Radio Applications............................................................................................................... 597 Zakaria El Alaoui Ismaili, Frederic Nabki, Wessam Ajib, Mounir Boukadoum Université du Québec à Montréal, Canada

B4P-G02 Understanding Large Swing and Low Swing Operation in DyCML Gates........... 601 Tiago Borges2, Ernesto Martins2, Luís Nero Alves1 1Instituto de Telecomunicações & Universidade de Aveiro, Portugal; 2Universidade de Aveiro, Portugal

B4P-G03 A Fully Complementary and Fully Differential Self-Biased Asynchronous CMOS Comparator .................................................................................................... 605 Vladimir Milovanovic, Horst Zimmermann Technische Universität Wien, Austria

B4P-G04 Channel Mismatch Background Calibration for Pipelined Time Interleaved ADCs .......................................................................................................................... 609 Armia Mrassy1, Mohamed Dessouky2 1Ain Shams University, Egypt; 2Ain Shams University & Mentor Graphics Corp., Egypt

B4P-G05 A Low-Power Single-Slope Analog-to-Digital Converter with Digital PVT Calibration.................................................................................................................. 613 Yuji Osaki, Tetsuya Hirose, Keishi Tsubaki, Nobutaka Kuroki, Masahiro Numa Kobe University, Japan

B4P-G06 SkyFlash EC Project: Architecture for a 1Mbit S-Flash for Space Applications............................................................................................................... 617 Anna Arbat1, Cristiano Calligaro1, Vladislav Dayan2, Evgeny Pikhay2, Yakov Roizin2 1RedCat Devices, Italy; 2TowerJazz, Israel

B4P-G07 A Practical Method for Modeling Amplifier Nonlinearities .................................... 621 Shafqat Ali, Steve Tanner, Pierre Farine École Polytechnique Fédérale de Lausanne, Switzerland

B4P-G08 Performances and Trends in Millimeter-Wave CMOS Voltage Controlled Oscillators.................................................................................................................. 625 Marius Voicu2, Domenico Pepe1, Domenico Zito2 1Tyndall National Institute, Ireland; 2Tyndall National Institute & University College Cork, Ireland

B4P-G09 A Multi-Valued 350nm CMOS Voltage Reference................................................... 629 Nuno Lourenço2, Luís Nero Alves1, José Luis Cura1 1Instituto de Telecomunicações & Universidade de Aveiro, Portugal; 2Universidade de Aveiro, Portugal

B4P-G11 Layout Stress and Proximity Aware Analog Design Methodology ...................... 633 A. Zein1, Amr Tarek1, Mohamed Bahr1, Mohamed Dessouky2, Haitham Eissa3, Ahmed Ramadan3, Amr Tosson3 1Ain Shams University, Egypt; 2Ain Shams University & Mentor Graphics Corp., Egypt; 3Mentor Graphics, Egypt

B4P-G12 A 1.1 V 82.3dB Audio Delta-Sigma ADC Using Asynchronous SAR Type Quantizer.................................................................................................................... 637 Young-Min Park2, Tae-In Kwon2, Kang-Il Cho2, Yong-Sik Kwak2, Gil-Cho Ahn2, Chang-Seob Shin1, Myung-Jin Lee1, Seung-Bin You1, Ho-Jin Park1 1Samsung Electronics, Korea, South; 2Sogang University, Korea, South

B4P-G13 Design Tradeoffs for Rad-Hard Voltage Controlled Crystal Oscillators ..............N/A Jose Cardoso Universidade do Porto, Portugal

B4P-G14 Design of Three-Stage Nested-Miller Compensated Operational Amplifiers Based on Settling Time.............................................................................................N/A Hamed Aminzadeh Payame Noor University, Iran

B4P-H Poster Session 2 Time: Tuesday, December 11, 17:10 - 19:00 Place: Poster Area Chair: José M. de la Rosa, IMSE-CNM (CSIC/University of Seville), Spain

B4P-H01 A Mixed-Signal Front-End ASIC for EEG Acquisition System .............................. 649 Haiyan Zhou, Matthias Voelker, Johann Hauer Fraunhofer-Institut für Integrierte Schaltungen, Germany

B4P-H02 LC Tank Full Bridge Control for Large Coil Variations.......................................... 653 Jose Luis Merino Panades, Catherine Dehollain École Polytechnique Fédérale de Lausanne, Switzerland

B4P-H03 Efficient Area and Power Multiplication Part of FFT Based on Twiddle Factor Decomposition .......................................................................................................... 657 Sidinei Ghissoni3, Eduardo Costa2, José Monteiro1, Ricardo Reis4 1INESC-ID / IST / Universidade Técnica de Lisboa, Portugal; 2Universidade Católica de Pelotas, Brazil; 3Universidade Federal do Pampa, Brazil; 4Universidade Federal do Rio Grande do Sul, Brazil

B4P-H04 Offset Measurement Method for Accurate Characterization of BTI-Induced Degradation in Opamps............................................................................................ 661 Swaraj Mahato, Pieter De Wit, Elie Maricau, Georges Gielen Katholieke Universiteit Leuven, Belgium

B4P-H05 A Study on MOSFET Rectifiers with Transistors Operating in the Weak Inversion Region ....................................................................................................... 665 Hugo Gonçalves1, Miguel Martins1, Jorge Fernandes2 1INESC-ID, Portugal; 2INESC-ID / IST / Universidade Técnica de Lisboa, Portugal

B4P-H06 Return-to-One Dims Logic on 4-Phase M-of-N Asynchronous Circuits .............. 669 Matheus Moreira, Ricardo Guazzelli, Ney Calazans Pontifícia Universidade do Rio Grande do Sul, Brazil

B4P-H07 An Ultra-Low Power Current Reused CMOS Low Noise Amplifier for X-Band Space Application ..................................................................................................... 673 Saeid Yasami, Magdy Bayoumi university of louisiana at lafayette, United States

B4P-H08 Utilization of Multi-Bit Flip-Flops for Clock Power Reduction .............................. 677 Zhi-Wei Chen, Jin-Tai Yan Chung-Hua University, Taiwan

B4P-H09 Critical Path Minimized Raster Scan Hardware Architecture for Computation of the Generalized Hough Transform...................................................................... 681 Frank Schumacher, Markus Holzer, Thomas Greiner Pforzheim University, Germany

B4P-H10 Flip-Flop Design Using Novel Pulse Generation Technique................................. 685 Farshad Moradi1, Dag Wisland3, Jen Kargaard Madsen1, Hamid Mahmoodi2 1Aarhus University, Denmark; 2San Francisco State University, United States; 3Universitetet i Oslo, Norway

B4P-H11 Dedicated Hardware Implementation of a Linear Congruence Solver in FPGA.. 689 Jiri Bucek, Pavel Kubalík, Robert Lórencz, Tomas Zahradnický Czech Technical University in Prague, Czech Rep.

B4P-H12 Analog Fault Diagnosis and Testing by Inverse Problem Technique .................. 693 Rania Fouad Ahmed2, Ahmed Gomaa Radwan1, Ahmed Madian3, Ahmed M. Soliman1 1Cairo University, Egypt; 2Fayoum University, Egypt; 3German University in Cairo, Egypt

B4P-H13 A Non-Coherent BPSK Receiver with Dual Band Filtering for Implantable Biomedical Devices................................................................................................... 697 Benjamin Wilkerson, Jin-Ku Kang Inha University, Korea, South

B4P-H14 A New XOR-Based Content Addressable Memory Architecture .......................... 701 Luca Frontini, Seyedruhollah Shojaii, Alberto Stabile, Valentino Liberali Università degli Studi di Milano, Italy

B4P-H15 A Low-Complexity Soft-Decision Decoding Architecture for the Binary Extended Golay Code ............................................................................................... 705 Patrick Adde, Raphael Le Bidan Institut Mines-Télécom/Télécom-Bretagne, France

B4P-H16 Fullwave-Mode Analysis of Shielded Microstrip Discontinuities on Anisotropic Substrates............................................................................................. 709 Otmane Madani3, Mohamed Lamine Tounsi1, Mustapha C.E Yagoub2 1Université des Sciences et de la Technologie Houari Boumediène, Algeria; 2University of Ottawa, Canada; 3University Saad-Dahlab, Algeria

C1L-A RF Circuits and Techniques I Time: Wednesday, December 12, 09:30 - 11:10 Place: Seville Chair: Eduard Alarcon, TU Catalunya (UPC), Spain

C1L-A01 Multiband Integrated Synthetic Aperture Radar (SAR) Receiver.......................... 713 Faizah Abu Bakar1, Jan Holmberg3, Tero Nieminen1, Qaiser Nehal1, Pekka Ukkonen1, Ville Saari1, Kari Halonen1, Markku Aberg3, Iiro Sundberg2 1Aalto University, Finland; 2DA-Design Oy, Finland; 3VTT Technical Research Centre of Finland, Finland

C1L-A02 Low-Power Area-Efficient Delay Element with a Wide Delay Range.................... 717 Jidan Al-Eryani2, Alexander Stanitzki1, Karsten Konrad3, Nima Tavangaran3, Dieter Brückmann3, Rainer Kokozinski2 1Fraunhofer-Institut für Mikroelektronische Schaltungen und Systeme, Germany; 2Universität Duisburg-Essen, Germany; 3Universität Wuppertal, Germany

C1L-A03 Skin Effect Modeling in Time Domain for RF Network on Chip ............................ 721 Lounis Zerioul1, Emmanuelle Bourdel1, Myriam Ariaudo2 1ETIS Lab, France; 2Université de Cergy-Pontoise, France

C1L-A04 Stochastic Differential Equations Approach in the Analysis of MTLs with Randomly Varied Parameters .................................................................................. 725 Lubomir Brancík, Edita Kolárová Brno University of Technology, Czech Rep.

C1L-A05 A RF/DC Current-Mode Detector for BiST and Digital Calibration of Current-Driven Mixers............................................................................................................. 729 Feiran Lei2, Vivek Yenamandra2, Steven Bibyk2, Mohammed Ismail1 1Khalifa University of Science Technology & Research, U.A.E.; 2Ohio State University, United States

C1L-B Emerging Technologies I Time: Wednesday, December 12, 09:30 - 11:10 Place: Andalucía 8 Chair: Fernando Corinto, Politecnico di Torino, Italy

C1L-B01 A Dual-Axis Bulk Micromachined Accelerometer with Low Cross-Sensitivity ... 733 Ahmad Alfaifi1, Frederic Nabki2, Mourad El-Gamal1 1McGill University, Canada; 2Université du Québec à Montréal, Canada

C1L-B02 TSV Stress-Aware Performance and Reliability Analysis ..................................... 737 Muhammad Ali, Mohammad Ahmed, Malgorzata Chrzanowska-Jeske Portland State University, United States

C1L-B03 FFT Implementation Using QCA .............................................................................. 741 Muhammad Awais, Marco Vacca, Mariagrazia Graziano, Guido Masera Politecnico di Torino, Italy

C1L-B04 Analysis of Coupling Capacitance Between TSVs and Metal Interconnects in 3D-ICs......................................................................................................................... 745 Khaled Salah Mentor Graphics, Egypt

C1L-C Digital Test, Fault Tolerance and Reliability Time: Wednesday, December 12, 09:30 - 11:10 Place: Andalucía 7 Chairs: Salvador Mir, TIMA, France Diego Vázquez, IMSE-CNM (CSIC/University of Seville), Spain

C1L-C01 The Leafs Scan-Chain for Test Application Time and Scan Power Reduction ... 749 Maria Chalkia, Yiorgos Tsiatouhas University of Ioannina, Greece

C1L-C02 Automatic Selective Hardening Against Soft Errors: a Cost-Based and Regularity-Aware Approach..................................................................................... 753 Samuel Pagliarini, Arwa Ben Dhia, Lirida Alves de Barros Naviner, Jean-Francois Naviner Institut Mines-Telecom, Télécom ParisTech, France

C1L-C03 Transient Fault Analysis of CORDIC Processor..................................................... 757 Ting An, Matteo Causo, Lirida Alves de Barros Naviner, Philippe Matherat Institut Mines-Telecom, Télécom ParisTech, France

C1L-C04 A New Fault-Tolerant Architecture for CLBs in SRAM-Based FPGAs ................. 761 Arwa Ben Dhia, Lirida Alves de Barros Naviner, Philippe Matherat Institut Mines-Telecom, Télécom ParisTech, France

C1L-C05 A Monitoring Infrastructure for FPGA Self-Awareness and Dynamic Adaptation.................................................................................................................. 765 Carlos Gómez Osuna, Miguel Ángel Sánchez Marcos, Pablo Ituero, Marisa López-Vallejo Universidad Politécnica de Madrid, Spain

C1L-D Multimedia Systems and Signal Processing II Time: Wednesday, December 12, 09:30 - 11:10 Place: Andalucía 6 Chair: Sergio Bampi, UFRGS, Brazil

C1L-D01 Adaptive Disparity Map Computation for Stereoscopic Video Watermarking .... 769 Afef Chammem1, Mihai Mitrea1, Françoise Prêteux2 1Institut Mines - Telecom, France; 2Institut Mines-Telecom, Télécom ParisTech, France

C1L-D02 Bayesian Classification and Artificial Neural Network Methods for Lung Cancer Early Diagnosis ............................................................................................ 773 Fatma Taher, Naoufel Werghi, Hussain Al-Ahmad Khalifa University, U.A.E.

C1L-D03 Embedded Vision System for Early Smoke Detection...........................................N/A Safa Ouerghi, Fethi Tlili, Amel Benazza-Benyahia Sup'Com / Carthage University, Tunisia

C1L-D04 Sub-Images Based Image Hashing with Non-Negative Factorization.................. 781 Supakorn Prungsinchai, Fouad Khelifi, Ahmed Bouridane Northumbria University, United Kingdom

C1L-D05 A Study on the HEVC Performance over Lossy Networks.................................... 785 Basak Oztas, Mahsa T. Pourazad, Panos Nasiopoulos, Victor C. M. Leung University of British Columbia, Canada

C2L-A RF Circuits and Techniques II Time: Wednesday, December 12, 11:30 - 13:10 Place: Seville Chair: Eduard Alarcon, TU Catalunya (UPC), Spain

C2L-A01 0.4V Low-Power 60-GHz Oscillator in 65nm CMOS ............................................... 789 Domenico Pepe1, Domenico Zito2 1Tyndall National Institute, Ireland; 2Tyndall National Institute & University College Cork, Ireland

C2L-A02 Complements on Phase Noise Analysis and Design of CMOS Ring Oscillators.................................................................................................................. 793 Timothy Cronin2, Domenico Pepe1, Domenico Zito2 1Tyndall National Institute, Ireland; 2Tyndall National Institute & University College Cork, Ireland

C2L-A03 A Low-Power All-Digital PLL Architecture Based on Phase Prediction .............. 797 Jingcheng Zhuang2, Robert Bogdan Staszewski1 1Delft University of Technology, Netherlands; 2Qualcomm, United States

C2L-A04 A Dead-Zone Free and Linearized Digital PLL........................................................ 801 Amer Samarah, Anthony Chan Carusone University of Toronto, Canada

C2L-A05 Feasibility Study Including Detector Non-Idealities of a 95-GHz CMOS SoC Radiometer for Passive Imaging.............................................................................. 805 Lorenzo Mereni1, Domenico Pepe1, Domenico Zito2 1Tyndall National Institute, Ireland; 2Tyndall National Institute & University College Cork, Ireland

C2L-B Emerging Technologies II Time: Wednesday, December 12, 11:30 - 13:10 Place: Andalucía 8 Chair: Fernando Corinto, Politecnico di Torino, Italy

C2L-B01 Non-Volatile Memory Circuits for FIMS and TAS Writing Techniques on Magnetic Tunnelling Junctions................................................................................ 809 Victor Silva1, Mário Véstias2, Horácio C. Neto1, Jorge Fernandes1 1INESC-ID / IST / Universidade Técnica de Lisboa, Portugal; 2INESC-ID/ISEL/IPL, Portugal

C2L-B02 Validation and Analysis of Negative Differential Resistance of Single-Electron Transistor with Conductance Model ........................................................ 813 Xiaobao Chen, Zuocheng Xing, Bingcai Sui National University of Defense Technology, China

C2L-B03 Low-Noise Dual-Channel Current Amplifier for DNA Sensing with Solid-State Nanopores ................................................................................................................. 817 Marco Carminati2, Giorgio Ferrari2, Marco Sampietro2, Aleksandar Ivanov1, Tim Albrecht1 1Imperial College London, United Kingdom; 2Politecnico di Milano, Italy

C2L-B04 CMOS Active Column Sensor for Biodetection Applications Based on Surface Plasmon Resonance................................................................................... 821 Arnoldo Salazar2, Sergio Camacho-León2, Sergio Omar Martínez-Chapa2, Olivier Rossetto1 1Laboratoire de Physique Subatomique et de Cosmologie, France; 2Tecnológico de Monterrey, Mexico

C2L-B05 Modeling and Analysis of Through Silicon via: Electromagnetic and Device Simulation Approach ................................................................................................ 825 Khaled Salah3, Alaa Elrouby3, Hani Ragai1, Yehea Ismail2 1Ain-Shams University, Egypt; 2American University in Cairo, Egypt; 3Mentor Graphics, Egypt

C2L-C Variability-aware Design and Noise Mitigation Time: Wednesday, December 12, 11:30 - 13:10 Place: Andalucía 7 Chair: Magdy Bayoumi, University of Louisiana, USA

C2L-C01 CEMS-PG: a Parametrized Algorithm for Balanced Partitioning and Wakeup of Power Gated Circuits............................................................................................ 829 Salim Farah, Magdy Bayoumi University of Louisiana at Lafayette, United States

C2L-C02 Static Read Stability and Write Ability Metrics in FinFET Based SRAM Considering Read and Write-Assist Circuits.......................................................... 833 Hanwool Jeong, Younghwi Yang, Junha Lee, Jisu Kim, Seong-Ook Jung Yonsei University, Korea, South

C2L-C03 Statistical Leakage Analysis Using the Deterministic Modeling of Cell Leakage Current ........................................................................................................ 837 Jae Hoon Kim, Young Hwan Kim POSTECH, Korea, South

C2L-C04 Uncertainty in DLL Deskewing Schemes................................................................ 841 Monica Figueiredo1, Rui Aguiar2 1Polytechnic Institute of Leiria, Portugal; 2Universidade de Aveiro, Portugal

C2L-C05 High-Drive Capability Buffer for Highly Variable Resistive Loads ....................... 845 Erika Covi, Alessandro Cabrini, Guido Torelli Università degli Studi di Pavia, Italy

C2L-D Nonlinear Circuits and Systems II Time: Wednesday, December 12, 11:30 - 13:10 Place: Andalucía 6 Chair: Michael Peter Kennedy, University College, Cork, Ireland

C2L-D01 Should Delta Sigma Modulators Used in AC Motor Drives Be Adapted to the Mechanical Load of the Motor? ............................................................................... 849 Sergio Callegari2, Federico Bizzarri1 1Politecnico di Milano, Italy; 2Università di Bologna, Italy

C2L-D02 Design of a Low Complexity S-Box Based on a Piecewise Linear Chaotic Map ............................................................................................................................. 853 Daisaburo Yoshioka Sojo University, Japan

C2L-D03 On Current Control Method for Single-Phase AC Resistance Spot Welding ...... 857 Kang Zhou, Lilong Cai Hong Kong University of Science and Technology, China

C2L-D04 A Brief Analysis of the Main SPICE Models of the Memristor .............................. 861 Jordi Albo-Canals2, Giovanni Pazienza1 1Pazmany University, Hungary; 2Universitat Ramon Llull, Spain

C3L-A Power Management Circuits Time: Wednesday, December 12, 14:40 - 16:20 Place: Seville Chair: Eduard Alarcón, Technical University of Catalunya (UPC), Spain

C3L-A01 Field Programmable Switched Capacitor Voltage Converter ............................... 865 Chao Li, Jordi Cosp, Herminio Martinez-García Universitat Politecnica de Catalunya, Spain

C3L-A02 A Reconfigurable Buck-Boost Switched Capacitor Converter with Adaptive Gain and Discrete Frequency Scaling Control ....................................................... 869 Libin George, Torsten Lehmann, Tara Hamilton University of New South Wales, Australia

C3L-A03 Design of a Capacitorless Low-Dropout Voltage Regulator with Fast Load Regulation in 130nm CMOS ..................................................................................... 873 Antonio David Souza1, Sergio Bampi2 1CEITEC-SA Semiconductors / Federal University of Rio Grande do Sul, Brazil; 2Universidade Federal do Rio Grande do Sul, Brazil

C3L-B Neural Networks and Nonlinear Circuits Time: Wednesday, December 12, 14:40 - 16:20 Place: Andalucía 8 Chair: Ricardo Carmona, IMSE-CNM (CSIC/University of Seville), Spain

C3L-B01 Dedicated FPGA Communication Architecture and Design for a Large-Scale Neuromorphic System.............................................................................................. 877 Vasilis Thanasoulis, Johannes Partzsch, Stephan Hartmann, Christian Mayr, René Schüffny Technische Universität Dresden, Germany

C3L-B02 Towards AER VITE: Building Spike Gate Signal .................................................... 881 Fernando Perez-Peña1, Arturo Morgado-Estevez1, Carlos Rioja-Del-Rio1, Alejandro Linares-Barranco2, Angel Jimenez-Fernandez2, Juan Lopez-Coronado3, Jose Luis Muñoz-Lozano3 1Universidad de Cádiz, Spain; 2Universidad de Sevilla, Spain; 3Universidad Politécnica de Cartagena, Spain

C3L-B03 Picosecond Pulse Generation with Nonlinear Transmission Lines in 90-nm CMOS for mm-Wave Imaging Applications ............................................................ 885 Paramartha Indirayanti, Wouter Volkaerts, Patrick Reynaert, Wim Dehaene Katholieke Universiteit Leuven, Belgium

C3L-C Energy Efficient High-level Design and Modeling techniques Time: Wednesday, December 12, 14:40 - 16:20 Place: Andalucía 7 Chairs: Malgorzata Chrzanowska-Jeske, Portland State University, USA Antonio Acosta, IMSE-CNM (CSIC/University of Seville), Spain

C3L-C01 High Level Modeling of Signal Integrity in Field Bus Communication with SystemC-AMS............................................................................................................ 889 Ruomin Wang, Julien Denoulet, Sylvain Feruglio, Farouk Vallette, Patrick Garda Universite Pierre et Marie Curie, France

C3L-C02 IMOSIM: Exploration Tool for Instruction Memory Organisations Based on Accurate Cycle-Level Energy Modelling................................................................. 893 Antonio Artes1, Jose L. Ayala1, Francky Catthoor2 1Complutense University of Madrid, Spain; 2IMEC, Belgium

C3L-C03 Power Efficiency of Digit Level Polynomial Basis Finite Field Multipliers in GF(2^283)................................................................................................................... 897 Shoaleh Hashemi Namin, Huapeng Wu, Majid Ahmadi University of Windsor, Canada

C3L-C04 A High-Throughput ECC Architecture..................................................................... 901 Esmaeil Amini, Zahra Jeddi, Magdy Bayoumi University of Louisiana at Lafayette, United States

C3L-C05 Energy-Efficient Multi-Task Computing on MPSoCs: a Case Study from a Memory Perspective ................................................................................................. 905 Rafael Westphal, José Luís Güntzel, Luiz Cláudio Santos Universidade Federal de Santa Catarina, Brazil

C3L-D Communication Algorithms and Building Blocks Time: Wednesday, December 12, 14:40 - 16:20 Place: Andalucía 6 Chair: Piedad Brox, IMSE-CNM (CSIC/University of Seville), Spain

C3L-D01 Second-Order TDTL with Initialization Process ..................................................... 909 Mahmoud Al-Qutayri1, Saleh Al-Araji1, Jeedella Jeedella1, Omar Al-Ali2, Nader Anani2 1Khalifa University, U.A.E.; 2Manchester Metropolitan University, United Kingdom

C3L-D02 Encoding Sequence Design for a Reduced Complexity Time Synchronization Approach for OFDM Systems ..................................................... 913 Leïla Nasraoui, Leïla Najjar Atallah, Mohamed Siala Sup'Com, Tunisia

C3L-D03 Test Setup for Error Vector Magnitude Measurement on WLAN Transceivers... 917 Vitor Fialho, Fernando Fortes, Manuela Vieira Instituto Superior de Engenharia de Lisboa, Portugal

C3L-D04 A Hybrid Algorithm for Range Estimation in RFID Systems................................. 921 Krishnamohan Thangarajah, Rashid Rashizadeh, Shervin Erfani, Majid Ahmadi University of Windsor, Canada

C3L-D05 Discrete Cosine Transform Type-IV-Based Multicarrier Modulators in Frequency Offset Channels...................................................................................... 925 Pedro Amo-López1, Maria Elena Domínguez-Jiménez2, Gabriela Sansigre2, David Sanz de la Fuente1, Fernando Cruz-Roldán1 1Universidad de Alcalá, Spain; 2Universidad Politécnica de Madrid, Spain

C4L-A Sensors and Imagers Time: Wednesday, December 12, 16:40 - 18:20 Place: Seville Chair: Eduard Alarcón, Technical University of Catalunya (UPC), Spain

C4L-A01 A CMOS Pixel Sensor with 4-bit Column-Parallel Self-Triggered ADC for the ILC Vertex Detector ................................................................................................... 929 Liang Zhang, Frederic Morel, Christine Hu-Guo, Abdelkader Himmi, Andrei Dorokhov, Yann Hu Université de Strasbourg, France

C4L-A02 A Low Noise High Dynamic Range Analog Front-End ASIC for the AGIPD XFEL Detector............................................................................................................ 933 Xintian Shi2, Roberto Dinapoli2, Dominic Greiffenberg2, Beat Henrich2, Aldo Mozzanica2, Bernd Schmitt2, Hans Krüger3, Heinz Graafsma1, Alexander Klyuev1, Alessandro Marras1, Ulrich Trunk1 1Deutsches Elektronen Synchrotron, Germany; 2Paul Scherrer Institute, Switzerland; 3Universität Bonn, Germany

C4L-A03 Sense/Drive Architecture for CMOS-MEMS Accelerometers with Relaxation Oscillator and TDC.................................................................................................... 937 Piotr Michalik2, Jordi Madrenas2, Daniel Fernández1 1Baolab Microsystems, Spain; 2Universitat Politecnica de Catalunya, Spain

C4L-A04 Low Power Time-of-Flight 3D Imager System in Standard CMOS........................ 941 Priyanka Kumar, Edoardo Charbon, Robert Bogdan Staszewski, Andre Borowski Delft University of Technology, Switzerland

C4L-A05 A Double-Delta Compensating Technique for Pulse-Frequency Modulation CMOS Image Sensor................................................................................................. 945 Tsung-Hsun Tsai, Richard Hornsey York University, Canada

C4L-B SPECIAL SESSION: Advances in Nanoscale Devices and Circuits: Modeling, Design, Testing

Time: Wednesday, December 12, 16:40 - 18:20 Place: Andalucía 8 Chairs: Spiros Nikolaidis, Aristotle University of Thessaloniki, Greece Abdoul Rjoub, Jordan University of Science and Technology, Jordan

C4L-B01 Design of Adaptive Nano/CMOS Neural Architectures.......................................... 949 Teresa Serrano-Gotarredona, Bernabe Linares-Barranco Universidad de Sevilla / Instituto de Microelectrónica de Sevilla, Spain

C4L-B02 Compact Modeling for the Transcapacitances of Undoped or Lightly Doped Nanoscale Cylindrical Surrounding Gate MOSFETs ............................................. 953 Nikolaos Fasarakis1, Andreas Tsormpatzoglou1, D. H. Tassis1, Konstantinos Papathanasiou1, Charalabos Dimitriadis1, Gerard Ghibaudo2 1Aristotle University of Thessaloniki, Greece; 2IMEP, MINATEC, France

C4L-B03 Estimating the Starting Point of Conduction in Nanoscale CMOS Gates............ 957 Dimitrios Tzagkas1, Spyridon Nikolaidis1, Abdoul Rjoub2 1Aristotle University of Thessaloniki, Greece; 2Jordan University of Science and Technology, Jordan

C4L-B04 Testing Wireless Transceivers' RF Front-Ends Utilizing Defect-Oriented BIST Techniques ................................................................................................................ 961 Lambros Dermetzoglou1, John Liaperdos1, Angela Arapoyanni1, Yiorgos Tsiatouhas2 1University of Athens, Greece; 2University of Ioannina, Greece

C4L-B05 Fast and Accurate Estimation of Gain and Unity-Gain Bandwidth of an OpAmp ....................................................................................................................... 965 Rodrigo Picos, Joan Font-Rossello, Eugeni Garcia-Moreno, Antonio Teruel Universitat de les Illes Balears, Spain

C4L-C Algorithms and Processors Time: Wednesday, December 12, 16:40 - 18:20 Place: Andalucía 7 Chair: Javier Castro, IMSE-CNM (CSIC/University of Seville), Spain

C4L-C01 FIR Fractional Hilbert Transformers with Raised-Cosine Magnitude Response ................................................................................................................... 969 Goran Molnar, Mladen Vucic University of Zagreb, Croatia

C4L-C02 Conflict Free, Parallel Memory Access for Radix-2 FFT Processors ................... 973 Nikolaos Polychronakis, Dionysios Reisis, Emmanouil Tsilis, Ioannis Zokas National and Kapodistrian University of Athens, Greece

C4L-C03 An Efficient 2-D Jacobian Iteration Modeling for Image Interpolation ................. 977 Ayush Kumar2, Nimisha Agarwal2, Juhi Bhadviya2, Anil Kumar Tiwari1 1Indian Institute of Technology Rajasthan, India; 2LNM Institute of Information Technology, Jaipur, India

C4L-C04 A Switching Based Adaptive Image Interpolation Algorithm................................ 981 Nimisha Agarwal2, Ayush Kumar2, Juhi Bhadviya2, Anil Kumar Tiwari1 1Indian Institute of Technology Rajasthan, India; 2LNM Institute of Information Technology, Jaipur, India

C4L-C05 A Highly Parallelized Processor for Face Detection Based on Haar-Like Features ..................................................................................................................... 985 Huabiao Qin, Lianbing Tian, Zongwei Hu South China University of Technology, China