200mm gan-on-si cmos compatible platform confidential imec hq r&d campus leuven, belgium 200mm...

IMEC CONFIDENTIAL

200mm GaN-on-Si CMOS compatible platformDENIS MARCON, PH.D.

SEPT 2014

IMEC CONFIDENTIAL 2© IMEC 2013 2© IMEC 2014

Who is Imec?

• Founded in 1984

• Non-profit organization with a

revenue of >300MEuro (80% industry)

• 2100 Scientists from 77 countries

• Delivery industrial-relevant R&D

and technology solutions:

• Advance CMOS scaling

• Life-science

• Energy

• Communication

• ...

• Open innovational model

IMEC CONFIDENTIAL

IMEC HQ R&D CAMPUS

Leuven, Belgium

200mm

pilot line

24/7Silicon

solar cell

line

Organic

solar cell

line NERF

lab

300mm

pilot line

24/7Nano

biolabs

450mm

ready

IMEC CONFIDENTIAL

RESEARCH PROGRAMS FOR FULL ECO SYSTEM

Green Radio

Low power wireless

communication

ImagingImage sensors

& vision systemsBAN

Life Sciences

Human++

Organicelectronics

GO OPTICAL

Si PHOTONICS

Core CMOS

Lithography Devices Interconnects

CMORE

MEMS, Sensor

Photonics

EnergyPhotovoltaics,

GaN Power and LEDs device

Sensor systems for industrial applications


Power supply evolution enabled by GaN-

based tech.

Higher efficiency

Current

converters

Smaller size

Higher efficiency

Hig

h fre

quen

cy

Low RonQg

Future Converters

Highly efficient

Highly compact

Hig

h inte

gration

For illustration purpose


Power electronics market and wideband

gap material

IT & Consumer Automotive Industry

PFC/power suppliers for

home appliance, white

goods, pc, notebook etc....

DC/DC converter DC/AC

Inverter for Hybrid

Automotive, Electric

vehicle etc...

Inverter for PV, Motor

Control, Power

distribution, train etc....

200V 600V 1200V >2000V

SiCGaNCompetition


GaN-on-Si power semiconductor market

prediction


GaN Industrial Affiliation Program (IIAP)

GaN-on-Si

IIAP Program

Mission

To deliver advanced industrial (R&D)

200mm GaN-on-Si CMOS technology Technology & Ecosystem


Imec offers an integrated R&D Platform on a state

of the art infrastructure

Device Design TCAD and Model.

Qualification & Rel.MeasurementsDevice Processing1

• GaN epilayer growth

2• Si3N4 passivation layer

3• N isolation implant

4• Gate area patterning

5• Gate dielectric deposition

6• Gate electrode definition

7

• Ohmic area patterning

8

• Ohmic metal definition

9• Ohmic alloy

10• Metal interconnect levels

Epitaxy


2001

100mm GaN-on-Si

2009

150mm GaN-on-Si

CMOS compatible

2011

200mm GaN-on-Si

CMOS Compatible

More than 10 years on GaN-on-Si

2001

100 mm

GaN-on-Si

Std III-V

devices

2007

150 mm

GaN-on-Si wafers

2009

150 mm

GaN-on-Si

CMOS Comp.

devices

2013

200 mm GaN-on-Si

CMOS Compatible

platform (e-mode,

d-mode, diodes)

2010

200 mm

GaN-on-Si wafers

2011

200 mm

GaN-on-Si

CMOS Comp.

devices


IMEC 200mm GaN-on-Si Platform overview


200mm GaN-on-Si epitaxy challenges

• (Al)GaN and Si have different lattice constant and

thermal expansion coefficient

• If the epitaxy is not properly engineered, the mismatches

between the materials can result in:

Excessive wafer bow

Large defect density Surface pits


AlGaN

GaN

Cap

Si <111>

buffer

200mm GaN-on-Si epitaxy

8 runs

10 nm10 nm10 nm10 nm10 nm

Buffer

GaN

AlGaN

Smooth and pit-free

GaN-epi surface

Buffer has been optimized to obtain:

• Low defect density

• No pits

• Good uniformity

Defects stops in the buffer


200mm GaN-on-Si epitaxy:

Reproducibility of XRD data

Reproducibility of buffer quality

High quality (Al)GaN buffer are well reproducible wafer after wafer


200mm GaN-on-Si epitaxy:

Reproducibility of BOW data

Reproducibility of buffer quality

High quality (Al)GaN buffer are well reproducible wafer after wafer


200mm GaN-on-Si (Al)GaN buffer for

High breakdown voltage

(Uniform) buffer leakage at 1100V less than 1µA/mm


Control of Ga contamination

a)

b)0.01

0.1

1

10

100

1000

Etching Tool-1 Etching Tool-2 Etching Tool-3

W/O cleaning

WK-1 (W cleaning)

WK-2 (W cleaning)

WK-3 (W cleaning)

Limit

Ga

lliu

m (

101

0a

t/cm

2)

LOOP1 (with Cleaning)



Effective cleaning procedure of the backside

of the GaN-on-Si wafers

Befo

reA

fter

Ad-hoc effective cleaning procedure of the etching tools

• Ga is p-type dopant for Si and shall not be spread in a CMOS fab

• Imec has developed procedures to keep the Ga contamination under

control


Au free ohmic contacts

• Typical III-V process uses Au that is forbidden in CMOS fab

• At imec we have obtained Au free ohmics that are:

• As good as std Au containing ohmics (Rc< 0.5ohm mm)

• Uniform and reproducible

• Reliable

Within wafer distributionWafer-to-wafer reproducibility


• GaN-based HEMTs are normally-on (d-mode)

• Market/Industry wants normally-off (e-mode)• Recess MISHEMTs

• Junction-HEMTs

E-mode GaN-on-Si technology

P-layer

Barrier

GaN

J-HEMTRecess MIS-HEMT


Recess GaN MISHEMT

GaN

AlGaN

2DEG

Normally-on

(d-mode)

MISHEMT

GaN

AlGaN

2DEG

GaN

AlGaN

GaN

AlGaN

Gate

Normally off

(e-mode)

MISHEMT

Gate

c. Gate metala. Barrier Recess b. Gate dielectric


Recess GaN MISHEMT

GaN

AlGaN

2DEG

Normally-on

(d-mode)

MISHEMT

GaN

AlGaN

2DEG

GaN

AlGaN

GaN

AlGaN

Gate

Normally off

(e-mode)

MISHEMT

Gate

c. Gate metala. Barrier Recess b. Gate dielectric

Gate

Gate dielectric

Barrier recess


(Main) Challenges on Recess GaN

MISHEMT technology

• Recess technology:• Tight control of recess depth

• Low induced damages

• Gate (dielectric) technology:• Low interfaces traps density (cleanings etc...)

• Low bulk traps density (dielectric quality etc...)

• Pre/post treatments

Recess and gate technology have a strong impact on device

uniformity (Vth etc...) and performance (Ids, Ron etc...)


Results on GaN recess MISHEMT

10-12

10

-10

10-8

10-6

10-4

10-2

I g[A

/mm

]

151050

Vgs[V]

1nA/mm

Imec GaN e-mode MISHEMTs:

• Tight Vth distribution

• Vth >1V

• Ids < nA/mm at Vg=0V

Forward gate leakage

• Breakdown > 15V

• Below 1nA/mm at 10V

• 1% failure 20years lifetime at

150ºC for Vgmax = 8V


Breakdown characteristic of GaN recess

MISHEMT

10-13

10

-11

10-9

10-7

10-5

10-3

I (A

/mm

)

6004002000

Ig Id

W=18mmVg=0V

1µA/mm

Breakdown characteristic measured on a 18mm power bar at Vg =0V


Impact of the gate dielectric technology

Dielectric technology with

high Dit

Dielectric technology with

low Dit

On recess MISHEMT technology the interfaces and border traps at the

dielectric/(Al)GaN interface play a key role on the device performance

More

than

5x


200mm GaN-on-Si Schottky diodes

GaN

AlGaN

2DEG

Anode

GET = Gate Edge Termination

10-11

10-9

10-7

10-5

10-3

10-1

-200 -150 -100 -50 0

25 C150 C

Cu

rren

t D

ensity (

A/m

m)

VAC

(V)

AlGaN/GaN GET-SBDL

AC 5.0 µm

Substrate grounded

0

0.1

0.2

0.3

0.4

0.5

0 0.5 1 1.5 2 2.5 3

25 C

150 CC

urr

en

t D

ensity (

A/m

m)

VAC

(V)

AlGaN/GaN GET-SBDL

AC 5.0 µm

Substrate grounded

Optimized GET Optimized GET

200mm GaN-on-Si Imec Schottky diodes combine

• Low turn-on voltage

• Low reverse leakage current


Conclusion

• Imec has been working on GaN-on-Si for more than 10

years providing industrial relevant R&D

• Imec’s 200mm GaN-on-Si platform is available for

current and future partners

IMEC CONFIDENTIAL


NO2 sensors

10-100 ppb NO2

in air 50% RH

T=250ºC

10ppb

20

30

40

50

6070

8090 100

10

20 ppb

NO2

200mm gan-on-si cmos compatible platform confidential imec hq r&d campus leuven, belgium 200mm...

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