2000 altera corporation 1 quartus simulator. 2000 altera corporation dow load from: 2 in this...

© 2000 Altera Corporation1

Quartus Simulator

© 2000 Altera CorporationDow load from:www.fpga.com.cn2

In This Section

Simulator – Features– Supported simulation methods– 3rd party simulators

Simulator settings– Simulation Modes– End Time– Options– Simulation Focus– Saving Simulator Settings


In This Section Continued

Creating a Vector Waveform File (.VWF)– Customizing filter– Inserting nodes– Simulation length– Time bars– Creating signal patterns, clocks– Bidirectional pins

Simulation– Simulator Report– Comparing waveforms


Simulator


Simulator supports 9 different signal values– 1 Forcing ‘1’– 0 Forcing ‘0’– X Forcing unknown– U Uninitialized– Z High impedance– H Weak ‘1’– L Weak ‘0’– W Weak unknown– DC Don’t Care

Features


Features Continued

Bidirectional pins can be represented as a single signal Easy to use Node Finder

– Can customize filter Multiple time bars

– Master, relative, and absolute Simulator automatically

– Adds output pins to output waveform file– Checks outputs at the end of simulation– Invokes compiler from simulator


Supported Simulation Methods

Waveform entry– .vwf (vector waveform file) - primary waveform file for Quartus– .vec (vector file) - MAX+PLUS II .vec file supported for backward

compatibility– .tbl (table file) - used to import existing MAX+PLUS II .scf files into

Quartus Testbench support

– Tcl/TK scripting– Verilog/VHDL

3rd Party Simulators


Simulator Settings


Simulation Focus

Points to compiler setting on which to focus

Specify the design heirarchical entityon which to focus


Saving Simulator Settings

Simulator settings determine the type of simulation that is performed

Quartus allows simulator settings to be saved

Specify the simulator setting 2

Save simulatorsetting

1

Specify simulator settingon which to focus

3


Simulator End Time

Specifies the start time and end time of simulation

Enter end time

Enter start time

Runs simulation to theend of the stimulus file

Displays comparisonof simulation in simulatorreport


Simulation Stimulus

Specify stimulus file in Simulator Settings

Specify stimulusfile


Simulator Mode

Two modes– Functional

• Pre-synthesis– Timing

• Fully compiled netlist• Post place and route


Simulator OptionsReports ratio of simulatednodes to number of nodesin .vwf file

Reports setup and hold time violations in messagewindow

Monitors simulationfor glitches and reports themin message window

Specify time interval that defines Glitch


Running Simulation

Select Run Simulation from processing menu


Creating Vector Waveform File (.VWF)


Initializing Simulation

Reads in simulation netlist


Inserting Nodes

Select Insert Node or Bus from Insert Menu with the .VWF file open

Click on Node Finder to selectnodes


Customizing Filter in Node Finder

Filter is used to search for nodes

Creates newfilter 2

Select netlist3

Name offilter being customized

Select typeof node 4

Customize filter1


Selecting Nodes for Waveform File

In Node Finder box enter nodes into Selected Nodes field

Select node

Enter node intoSelected Nodesfield

Can select entire bus or single bit


Specify Length of Simulation

Specify maximum length of simulation time with end time


Inserting Time Bars

Set any one time bar to be the master

Time bars inserted relative to master or as absolute

Specify time bar

Set master time bar

Time Bar


Drawing Stimulus Waveform

Highlight portion of waveform to change Overwrite value with desired value

Overwrite value2

Value shortcut2

Highlight waveform1


Creating a Clock

Highlight waveform and enter period

Clock shortcut2

Highlight waveform1

or specify clockperiod

3

Select a clock defined in TimingSettings 3

Select Clock2


Creating Counting Pattern

Highlight waveform and enter pattern

Highlightwaveform

1

Pattern shortcut

2

Specify countingfrequency 4

Specify countingpattern 3 Specify Radix

3

Select Count Value

2


Assigning Arbitrary Value

Highlight waveform and enter constant value for group Highlight waveform

1

Enter value3

Arbitrary valueshortcut 2

Select Arbitrary Value 2


Bidirectional Pins

Quartus requires only one pin in the .vwf file Highlight portions of waveform and edit

Bidirectional pin


Simulation


Simulator Report

Displays Simulation Waveform (result waveform)

Select to view simulation waveform

Opens simulatorreport

Result waveform


Comparing Waveforms

With Simulation Waveform open, select Compare to Waveforms under the View menu

Select file to be compared against result file

Select file


11Double Double

clicking on clicking on messagemessage

22Highlights Highlights signal with signal with unexpected unexpected

valuevalue

33Creates time bar at Creates time bar at

occurrence of unexpected occurrence of unexpected valuevalue

Debugging with the Message Window


Compared Waveforms (Simulator Report)

ORIGINAL (CTRL+1)

ACTUAL (CTRL+2)

COMPARED (CTRL+3) (above 2 waveforms are overlapped)

RESULTS


Simulating with 3rd Party Simulators

Model Technology (ModelSim) Cadence (VERILOG-XL) Viewlogic (VCS) Synopsys (VSS)


Specify Simulator

Select EDA Tools Settings menu from the project menu

Select Simulationtool


3rd Party Simulators

VHDL Simulators– Use Quartus generated .VHO and .SDO files– Use APEX20K_ATOMs.VHD and

APEX20K_COMPONENTS.VHD libraries located in the sim_lib directory

Verilog Simulators– Use Quartus generated .VO and .SDO files– Use APEX20K_ATOMS.VO library located in the sim_lib


Summary

Functional and Timing simulation support Testbench support

– Tcl/TKs– Verilog/VHDL

Simulation results stored in Simulation report

2000 altera corporation 1 quartus simulator. 2000 altera corporation dow load from: 2 in this...

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