15.sparc
TRANSCRIPT
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Copyright1995D.Hanson,K.Li&J.P.Singh
ComputerScience217:SPARCArchitecture
Page137
October12,1997
SPARCArchitecture
8-bitcell(byte)issmallestaddressableunit
32-bitaddresses,i.e.,3
2-bitvirtualaddressspace
Largersizes:ataddres
s
A
SPARCisa
big-endian
(
bigend,ormost-significantend,first)
machine
Copyright
1995D.Hanson,K.Li&J.P.Singh
ComputerScience217:SPARCRegisters
Page138
SPARCRegisters
32,32-bitwidegeneral-purposeregisters
%r0
%r31
%g0
%g7
%r0
%r7
global
%o0
%o7
%r8
%r15
output
%l0
%l7
%r16
%r23
local
%i0
%i7
%r24
%r31
input
Thegroupsrelatetopr
ocedurecallingconventions
Someregistershave
de
dicateduses
%sp
(
%r14
)
stackpointer
%fp
(
%r30
)
framepointer
%r15
temporary
%r31
returnaddress
Register
%g0
alwaysha
sthevalue0whenread;writingithasnoeffect
Otherspecialregisters
(manipulatedbyspecialinstructions)
:
floatingpointregisters(
%f0
%f31
)
programcounter(
pc
)
nextprogramcounter(
npc
)
PSR
,
TBR
,
WIM
,
Y
Copyright
1995D.Hans
on,K.Li&J.P.Singh
ComputerScience217:SPARCRegisterMap
Page139
October12,1997
SPARCRegisterMap
seepage193intheSPARCArchitectureM
anual,2.2inPaul
%i
7
%r
31
re
turnaddress
-
8
%i
6,
%f
p
%r
30
framepointer
in
%i
5
%r2
9
incomingparameter6
%i
0
%r24
incomingpara
meter1/returnvalue
to
caller
%l
7
%r2
3
local7
local
%l
0
%r1
6
local0
%o7
%r1
5
temporaryvalu
e/addressof
call
instruction
%o6,
%sp
%r14
stackpointer
out
%o5
%r1
3
out
goingparameter6
%o0
%r
8
outgoingparam
eter1/returnvalue
from
caller
%g7
%r
7
global7
global
%g1
%r1
t
emporaryvalue
%g0
%r
0
0
Copyright
1995D.Hans
on,K.Li&J.P.Singh
ComputerScience217:SPARCRegisterMap,contd
Page140
SPARCRegisterMap
,contd
Otherregisters
Regist
ersaveconventions:whathappensa
crosscalls?
%g2
%g7
saved?
%g1
destroyed
%o0
%o5,
%o7
destroyed
%o6
saved
%l0
%l7
saved
%i0
%i7
saved
%f0
%f31
saved
%y
Yregister
state
%psr
integ
erconditioncodes
%f
sr
floating
pointconditioncodes
%csr
coprocessorconditioncodes
%f
31
flo
atingpointvalue
float-
ing
point
%f
0
flo
atingpointvalue
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Copyright
1995D.Hanson,K.Li&J.P.Singh
ComputerScience217:SPARCInstructionSet
Page141
October12,1997
SPARCInstructionSet
Instructiongroups
load/storeinstructions
integerarithmeticandbitwiselogicalinstructions
controlinstructions(branch
es,calls)
specialinstructions(operatingsystem)
floatingpointarithmeticandconversion
Instructionformats(seepage44,Ch.8inPaul)
format1(
op
=1):
call
format2(
op
=0):
sethi
a
ndbranches(
bi
cc
,
fb
fcc,cbccc)
format3(op=2or3):remaininginstructions
op
disp30
31
29
op
rd
op2
imm22
op
a
cond
op2
disp22
31
29
28
24
21
op
rd
op3
rs1
i=0
asi
rs2
op
rd
op3
rs1
i=1
simm13
op
rd
op3
rs1
opf
rs2
31
29
24
18
13
12
4
Copyright1995D.Hanson,K.Li&J.P.Singh
ComputerScience217:Assemblyvs.MachineLanguage
Page142
Assemblyvs.MachineLanguage
Machinelanguageistheb
itpatternsthatrepresentinstructions
Assemblylanguageisasymbolicrepresentationofmachinelanguage
Assemblerstranslatefromassemblylanguagetomachinelan
guage
add
%i1,360,%o2
isaformat3instruction:022401460550
Assemblers:mappinga
nassemblyinstructiontoamachine
instruction
(1-to-1)
Compilers:mappingastatementto1ormanyassemblyinstructions
Disassemblerstranslatefrommachinelanguagetoanassemblylanguage
2
10
0
25
1
360
31
29
24
18
13
12
2
12
0
31
1
550octal
Copyright1995D.Hanson,K.Li&J.P.Singh
ComputerScience217:LoadInstructions
Page143
October12,1997
LoadInstructions
Load:movedatafrommemorytoaregister
Fetche
dbyteorhalfwordappearsright-justifiedinthe32-bitregister
Leftmo
stbitsarezero-filledorsign-extended
Adoublewordisloadedintoaregisterpaira
nd
mustbeeven
themost-significantwordlandsin
theleast-significantwordin
Addressesmustbealigned:foraddressA
halfwo
rd
word
doubleword
Copyright1995D.Hanson,K.Li&J.P.Singh
ComputerScience217:StoreInstructions
Page144
StoreInstructio
ns
Movedatafromaregistertomemory
Storingbytesandhalfwords
therig
htmostbitsarestored
theleftmostbitsareignored
Storingdoublewords
m
ustbeeven
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Copyright1995D.Hanson,K.Li&J.P.Singh
ComputerScience217:AddressingModes
Page145
October12,1997
AddressingModes
SPARChastwoaddress
ingmodestoyieldaneffectiveaddress
1.addthecontentsoftworegisters
2.addthecontentsofaregisterandasigned,13-bitnumber
Commonnames
1.registerindirectordeferred
ld
[%o1],%o2
1.registerindexed(aboveisaspecialcasethatuses%g0)
st
%o1,[%o2+%o3]
2.registerdisplacementor
based
ld
[%o1+10],%o2
Assembly-languagesyntax:N
isa13-bitintegerconstant
address
synon
ym
reg
reg+
%
g0
reg+
reg
reg+
N
N+
reg
reg
+
N
N
%g0
+
N