Borosilicate glass (BSG) as gate dielectric for 4H-SiC MOSFETs

Yongju Zheng, T. Isaacs-Smith, A. C. Ahyi and S. Dhar

Auburn University, Auburn, AL, USA

12th Annual SiC MOS workshop at UMD

Outline

• Interface traps in SiC MOS structure

• BSG as the gate dielectric for 4H-SiC MOSFETs

• Sb surface doping + BSG on 4H-SiC MOSFETs

• Summary and current work

2

P-type SiC

n+ n+

SiO2

gateS D

Interface traps in 4H-SiC MOSFETs

Channel length

Electron trapping

• Low free carrier density• Low channel mobility• Device stability

current

4H-SiC% 1

bulk

ch

Nit ~1013 cm-2 (as-oxidized)

(single digit)

3

Summary of 4H-SiC MOS Interface Treatments

• Nitrogen (Various processes): μfe~ 35 cm2 V-1s-1 , low Dit, most reliable oxide.Established passivation method in SiC MOS system, 2000-2014

• Phosphorus (Phosphoslicate glass): μfe ~ 100 cm2 V-1s-1, low Dit, poor long term stability. Okamoto et al., IEEE EDL, (2010).

• Antimony (surface doping) + Nitrogen: μfe ~ 110 cm2 V-1s-1, good stability,

technologically promising.Modic et al., IEEE EDL, (2014)

• Boron (Borosilicate Glass): μfe ~ 100 cm2 V-1s-1 , low Dit.D. Okamoto et al., IEEE EDL, (2014).

4

BSG as gate dielectric for 4H-SiC MOSFETs

Boron nitride (BN) source

D. Okamoto et al., IEEE Electron Device Lett.

35, 12 (2014).

D. Okamoto et al., Appl. Phys. A (2017)

SiC

SiO2

5

SiC

BSG

B2O3

Proposed Mechanism of B Passivation EffectSi

O

C

B B occupies Si site instead of C site due to lower electron negativity of Si.

Required oxygen bond is reduced → relax oxide stress.

Xiao Shen, 11th annual SiC MOS workshop meeting,

UMD College Park, August 15, 2016.

D. Okamoto et al., IEEE Electron Device Lett. 35, 12 (2014).

6

Formation of BSG

Ar + O2

B2O3 Planar Diffusion Source

Si waferSiO2/SiCStep 1: Deposition: 950 oC, 90% Ar + 10% O2, 30minsStep 2: Drive-in : 950 oC, 100 % Ar, 2hrs

7

0

40

80

120

160

0 1 2 3

Fiel

d-e

ffec

t m

ob

ility

(c

m2

V-1

s-1)

Oxide field (MV/cm)

BSG

NO

1.0E-10

1.0E-09

1.0E-08

1.0E-07

1.0E-06

1.0E-05

-5 0 5 10 15 20

I D(A

)

VG(V)

NO

BSG

Sample P-well doping(cm-3)

Oxide thickness

(nm)

Vth (V) Peak µFE

(cm2/V∙s)

NO 1x1016 54 0.9 35BSG 1x1016 64 2.5 140

• Larger Vth

• Better subthreshold slope• High field-effect mobility

I-V characterization at room temperature

1E+10

1E+11

1E+12

1E+13

0.2 0.3 0.4 0.5 0.6Inte

rfac

e tr

ap d

ensi

ty (

cm-2

eV-1

)

EC -E (eV)

NO hilo

BSG hilo

8

Conventional high-low frequency CV

Interface trap characterization: C-ψs analysis

• C-ψs analysis:

• High-low frequency C-V:𝐷𝑖𝑡 = (𝐶𝑆 𝐿𝐹 − 𝐶𝑆 𝐻𝐹 )/𝑞2𝐴

Hironori Yoshioka, et. al., J. Appl. Phys. Jul. 2012.

9

• High temperature nitridation creates fast traps on NO devices.

• BSG has less fast traps.

1E+10

1E+11

1E+12

1E+13

0.2 0.3 0.4 0.5 0.6

Inte

rfac

e tr

ap d

ensi

ty (

cm-2

eV-1

)

EC -E (eV)

NO hilo

NO cpsi

BSG hilo

BSG cpsiIdeal Cit=0

HF

LF

Cap

acit

ance

(p

F)

Gate voltage (V)

NO

1E+10

1E+11

1E+12

1E+13

1E+14

0 0.2 0.4 0.6

Inte

rfac

e tr

ap d

ensi

ty (

cm-2

eV-1

)

EC-E (eV)

NO SS

BSG SS

NO cpsi

BSG cpsi

NO MOSCAP

BSG MOSFET

BSG MOSCAP

0

0.5

1

1.5

2

2.5

0 50 100 150 200 250 300

Sub

-th

resh

old

slo

pe

(V/d

ecad

e)

Temperature (K)

BSG

10-9A < ID < 10-8A

NO

• For BSG, the two methods are in good agreement.

• For NO devices, there is a fair discrepancy close to 0.2 eV.

• Both NO and BSG have high Dit

near Ec.

Interface trap characterization: Sub-threshold slope

10

𝑆𝑆 =𝑑𝑉𝐺

𝑑 𝑙𝑜𝑔10𝐼𝐷=𝑘𝑇

𝑞𝑙𝑛10 1 +

𝐶𝐷 2𝜓𝐵 + 𝑞2𝐷𝑖𝑡 𝑆𝑆

𝐶𝑜𝑥

𝐶𝐷 2𝜓𝐵 =𝜀𝑆𝑖𝐶𝑞𝑁𝐴2 ∙ (2𝜓𝐵)

, 2𝜓𝐵 = 2𝑘𝑇

𝑞ln(

𝑁𝐴𝑛𝑖)

NO MOSFET

Effect of B concentration on electrical results

11

1E+17

1E+18

1E+19

1E+20

1E+21

1E+22

1E+23

0 20 40 60 80 100 120

B c

on

cen

trat

ion

(at

om

s/cm

3)

Depth (nm)

SiC

--B% 1--B% 2--B% 3

SIMS

BSG

sample B% at BULK (SIMS)

B% at interface (SIMS)

Nit (cm-2) Peak mobility (cm2 V-1s-1)

B% 1 10.4% 4% 1.68x1011 140

B% 2 0.34% 0.09% 3.84x1011 65

B% 3 3.16% 0.01% 7.53x1011 12

1E+10

1E+11

1E+12

1E+13

0.2 0.3 0.4 0.5 0.6

Inte

rfac

e tr

ap d

ensi

ty (

cm-2

eV-1

)

EC -E (eV)

𝐶−𝜓S Dit --B% 1--B% 2--B% 3

0

20

40

60

80

100

120

140

160

0 1 2 3

Fiel

d-e

ffec

t m

ob

ility

(cm

2/V

s)

Oxide field (MV/cm)

--B% 1--B% 2--B% 3

Stability of BSG

12

0.0E+00

5.0E-07

1.0E-06

1.5E-06

2.0E-06

-5 0 5 10 15 20

PBTI on MOSFETs BSG pre-stress

BSG after bias

NO pre-stress

NO after bias

Vg (V)

I d(A

mps)

1.5 MV/cm150°C5mins

M. Cabello, et.al., Appl. Phys. Lett., 111, 042104 (2017)

0.E+00

2.E-11

4.E-11

6.E-11

8.E-11

1.E-10

-10 -5 0 5 10

Cap

acit

ance

(F)

Voltage (V)

BTS on MOSCAPs

Cap

acit

ance

(F)

Cap

acit

ance

(F)

1.5 MV/cm150°C5mins

--pre-stress

--after +1.5MV/cm stress

--after - 1.5MV/cm stress

Sb surface doping for channel transport

0.0 0.5 1.0 1.5 2.00

20

40

60

80

100

120

Fie

ld-E

ffe

ct

mo

bili

ty (

cm

2V

-1s

1)

Oxide Field (MV/cm)

T= 300 K

Sb+NO

Sb

NO

• Lower Vth and better subthreshold slope (SS)• Higher channel mobility

• Sb acts as a dopant but does not passivate traps

P-type SiC

n+ n+

SiO2

gateS D

A. Modic, et al.,

IEEE Electron Device

Lett., 2014.

• Vth stability is as good as NO

Sb

13

1E-02

1E-01

1E+00

1E+01

1E+02

1E+16

1E+17

1E+18

1E+19

0 50 100 150 200

Si,C

,O IN

TE

NS

ITY

(a

rbitra

ry

un

its)

Sb C

ON

CE

NT

RA

TIO

N

(ato

ms/c

c)

DEPTH (nm)

Si-> C->O->

123Sb121Sb

Total Sb Depth Dose

(nm) (at/cm2)

123Sb 34-173 1.60E12

121Sb 35-173 2.02E12

Combination of Sb doping and BSG gate dielectric(i) Achieve high channel mobility at both low and high field.(ii) Tune Vth to adequate value using Sb counter-doping.

14

I-V characterization at room temperature

Sample P-well doping(cm-3)

Oxidethickness

(nm)

Vth (V) Peak µFE

(cm2/V∙s)

NO 1x1016 54 0.9 35

Sb+NO 1x1016 60 -0.9 110

BSG 1x1016 64 2.5 140

Sb+BSG 1x1016 68 0.9 180

• Significant mobility improvement at low field with ‘Sb+BSG’.

• ‘Sb+BSG’ tunes Vth along with good sub-threshold slope.

1E-10

1E-09

1E-08

1E-07

1E-06

1E-05

-3 -1 1 3 5

Dra

in c

urr

ent

(A)

VG(V)

NOSb+NOBSGSb+BSG

293 K0

40

80

120

160

200

0 0.5 1 1.5 2 2.5

Fiel

d-e

ffec

t m

ob

ility

(cm

2/V

s)

Oxide field (MV/cm)

NOSb+NOBSGSb+BSG

293 K

15

0

40

80

120

160

200

0 100 200 300 400 500

Fiel

d-e

ffec

t m

ob

ility

(cm

2/V

s)

Temperature (K)

Peak field-effect mobility

Sb+NO

BSG

Sb+BSG0

40

80

120

160

200

0 100 200 300 400 500

Fiel

d-e

ffec

t m

ob

ility

(cm

2/V

s)

Temperature (K)

Field-effect mobility at 2 MV/cm

Sb+NO

BSG

Sb+BSG

Temperature dependence of I-V characteristics

• BSG: Weak temperature dependence (low Dit)• Sb+NO: Field-effect mobility increases with temperature (high Dit)• Sb+BSG: Coulomb scattering and phonon scattering

16

Summary1. BSG improves field-effect mobility and SS.

2. Weak dependence of field-effect mobility on T due to lower Dit with BSG.

3. Dit decreases with B% and field-effect mobility increases with B%.

4. ‘Sb+BSG’ can be used to control Vth and obtain high field-effect mobility.

Current workHall effect characterization on Hall MOSFETs and correlate it with field-effect mobility.

17

Acknowledgments

18

This work is supported by II–VI Foundation U.S. Army Research Laboratory U.S. National Science Foundation US DOE Power America center

Thank you!

19

Backup

20

• Weak dependence of peak mobility on T• Vth shifts to right with decreasing T

I-V characterization at low temperature

0

20

40

60

80

100

120

140

160

0 1 2 3

Fiel

d-e

ffec

t m

ob

ility

(cm

2V

-1s-1

)

Oxide field (MV/cm)

BSG

50K

RT

0

5

10

15

20

25

30

35

40

0 1 2 3

Fiel

d-e

ffec

t m

ob

ility

(cm

2V

-1s-1

)

Oxide field (MV/cm)

NO

RT

70 K

21

Interface trap characterization IISubthreshold slope (SS)

𝑆𝑆 =𝑑𝑉𝐺

𝑑 𝑙𝑜𝑔10𝐼𝐷=𝑘𝑇

𝑞𝑙𝑛10 1 +

𝐶𝐷 2𝜓𝐵 + 𝑞2𝐷𝑖𝑡 𝑆𝑆

𝐶𝑜𝑥, 𝐶𝐷 2𝜓𝐵 =

𝜀𝑆𝑖𝐶𝑞𝑁𝐴2 ∙ (2𝜓𝐵)

, 2𝜓𝐵 = 2𝑘𝑇

𝑞ln(

𝑁𝐴𝑛𝑖)

J. Senzaki, et. al., IEEE Electron Device Lett., 23, 13 (2002).

22

Interface trap characterization I

ideal

HF

QS

idealQSHF

Cap

acit

ance

(p

F)C

apac

itan

ce (

pF)

Gate voltage (V)

Gate voltage (V)

NO

BSG

1E+10

1E+11

1E+12

1E+13

0.2 0.3 0.4 0.5 0.6

Inte

rfac

e tr

ap d

ensi

ty (

cm-2

eV-1

)

EC -E (eV)

NO hilo

NO cpsi

BSG hilo

BSG cpsi

• High temperature nitridation creates fast traps.

23