1 virtual memory (i). 2 outline physical and virtual addressing address spaces vm as a tool for...
DESCRIPTION
3 Physical Addressing Attributes of the main memory –Organized as an array of M contiguous byte-sized cells –Each byte has a unique physical address (PA) started from 0 physical addressing –A CPU use physical addresses to access memory Examples –Early PCs, DSP, embedded microcontrollers, and Cray supercomputersTRANSCRIPT
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Virtual Memory (I)
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Outline
• Physical and Virtual Addressing• Address Spaces• VM as a Tool for Caching• VM as a Tool for Memory Management• VM as a Tool for Memory Protection• Suggested reading: 9.1~9.5
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Physical Addressing
• Attributes of the main memory– Organized as an array of M contiguous byte-
sized cells– Each byte has a unique physical address (PA)
started from 0• physical addressing
– A CPU use physical addresses to access memory
• Examples– Early PCs, DSP, embedded microcontrollers,
and Cray supercomputers
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A System Using Physical Addressing
• Used in “simple” systems like embedded microcontrollers in devices like cars, elevators, and digital picture frames
0:1:
M-1:
Main memory
CPU
2:3:4:5:6:7:
Physical address(PA)
Data word
8: ...
4
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Virtual Addressing
• Virtual addressing– the CPU accesses main memory by a virtual
address (VA)• The virtual address is converted to the appropriate
physical address
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Virtual Addressing
• Address translation – Converting a virtual address to a physical
address– Requires close cooperation between the CPU
hardware and the operating system• HW: the memory management unit (MMU)
– Dedicated hardware on the CPU chip to translate virtual addresses on the fly
• SW: A look-up table– Stored in main memory – Contents are managed by the operating system
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A System Using Virtual Addressing
• Used in all modern servers, desktops, and laptops• One of the great ideas in computer science
0:1:
M-1:
Main memory
MMU
2:3:4:5:6:7:
Physical address(PA)
Data word
8: ...
CPU
Virtual address(VA)
CPU Chip
44100
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Address Space
• Address Space– An ordered set of nonnegative integer addresses
• Linear Space– The integers in the address space are consecutive
• Linear address space: Ordered set of contiguous non-negative integer addresses:
{0, 1, 2, 3 … }
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Address Space
• N-bit Address Space– Virtual address space:
Set of N = 2n virtual addresses {0, 1, 2, 3, …, N-1}– Physical address space:
Set of M = 2m physical addresses {0, 1, 2, 3, …, M-1}• Clean distinction between
– data (bytes) and their attributes (addresses)• Each object can now have multiple addresses
– one physical address, one (or more) virtual addresses
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Address Space
• K=210(Kilo), M=220(Mega), G=230(Giga), T=240(Tera), P=250(Peta), E=260(Exa)
#virtual address bits (n)
#virtual address (N)
Largest possible virtual address
864K
32256T
64
256 25516 64K-1
4G 4G-148
16E 16E-1256T-1
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Why Virtual Memory (VM)?
• Uses main memory efficiently– Use DRAM as a cache for the parts of a virtual
address space
• Simplifies memory management– Each process gets the same uniform linear address
space
• Isolates address spaces– One process can’t interfere with another’s memory
– User program cannot access privileged kernel information
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Using Main Memory as a Cache
DRAMSRAM Disk
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Using Main Memory as a Cache
• DRAM vs. disk is more extreme than SRAM vs. DRAM– Access latencies:
• DRAM ~10X slower than SRAM• Disk ~100,000X slower than DRAM
– Bottom line:• Design decisions made for DRAM caches driven by
enormous cost of misses
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Design Considerations
• Line size? (Large vs. Small)– Large, since disk better at transferring large
blocks• Associativity? (Full vs. Direct)
– Full, to minimize miss rate• Write through or write back? (WB vs. WT)
– Write back, since can’t afford to perform small writes to disk
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Page
• Virtual memory – Organized as an array of contiguous byte-sized
cells stored on disk conceptually.– Each byte has a unique virtual address that
serves as an index into the array– The contents of the array on disk are cached in
main memory
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Page
• The data on disk is partitioned into blocks– Serve as the transfer units between the disk
and the main memory– virtual pages (VPs) – physical pages (PPs)
• or page frames PP 2m-p-1
Physical memory
Empty
Empty
Uncached
VP 0VP 1
VP 2n-p-1
Virtual memory
UnallocatedCachedUncachedUnallocatedCachedUncached
PP 0PP 1
EmptyCached
0
N-1M-1
0
Virtual pages (VPs) stored on disk
Physical pages (PPs) cached in DRAM
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Page Attributes
• Unallocated: – Pages that have not yet been allocated (or
created) by the VM system– Do not have any data associated with them– Do not occupy any space on disk.
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Page Attributes
• Cached: – Allocated pages that are currently cached in
physical memory.
• Uncached: – Allocated pages that are not cached in physical
memory.
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Page Table
• Each allocate page of virtual memory has entry in page table
• Mapping from virtual pages to physical pages– From uncached form to cached form
• Page table entry even if page not in memory– Specifies disk address
• OS retrieves information
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Page Table
Data
243
17
105
•••
0:
1:
N-1:
X
Object Name
Location
•••
D:
J:
X: 1
0
On Disk
“ Cache”Page Table
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Page Table
NULL
Memory residentpage table
(physical page or disk address) Physical Memory
Disk Storage(swap file orregular file system file)
Valid
11
011
1
10
0
0
Virtual PageNumber
PTE0
PTE9
PP0
PP5
VP4
VP1
VP2
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Page HitsMemory
Address Translation: Hardware converts virtual addresses to physical addresses via an OS-managed lookup table (page table)
CPU
0:1:
N-1:
0:1:
P-1:
Page Table
Disk
VirtualAddresses Physical
Addresses
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Page Faults
• Page table entry indicates virtual address not in memory
• OS exception handler invoked to move data from disk into memory– current process suspends, others can resume– OS has full control over placement, etc.
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Page Faults
• Swapping or paging• Swapped out or paged out• Demand paging
CPU
Memory
Page Table
Disk
VirtualAddresses Physical
Addresses
CPU
Memory
Page Table
Disk
VirtualAddresses Physical
Addresses
Before faultBefore fault After faultAfter fault
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Servicing a Page Fault
• Processor Signals Controller– Read block of length
P starting at disk address X and store starting at memory address Y
diskDiskdiskDisk
Memory-I/O bus
Processor
Cache
MemoryI/O
controller
Reg
(1) Initiate Block Read
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Servicing a Page Fault
• Read Occurs– Direct Memory
Access (DMA)– Under control
of I/O controller
diskDiskdiskDisk
Memory-I/O bus
Processor
Cache
MemoryI/O
controller
Reg
(2) DMA Transfer
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Servicing a Page Fault
• I / O Controller Signals Completion– Interrupt processor– OS resumes
suspended process
diskDiskdiskDisk
Memory-I/O bus
Processor
Cache
MemoryI/O
controller
Reg (3) Read Done
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Locality to the Rescue Again!
• Virtual memory works because of locality• At any point in time, programs tend to
access a set of active virtual pages called the working set– Programs with better temporal locality will
have smaller working sets
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Locality to the Rescue Again!
• If (working set size < main memory size) – Good performance for one process after
compulsory misses
• If ( SUM(working set sizes) > main memory size ) – Thrashing: Performance meltdown where
pages are swapped (copied) in and out continuously
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Why Virtual Memory (VM)?
• Uses main memory efficiently– Use DRAM as a cache for the parts of a virtual
address space
• Simplifies memory management– Each process gets the same uniform linear address
space
• Isolates address spaces– One process can’t interfere with another’s memory
– User program cannot access privileged kernel information
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VM as a Tool for Memory Management
• Key idea: each process has its own virtual address space– It can view memory as a simple linear array
Virtual Address Space for Process 1:
Physical Address Space (DRAM)
0
N-1(e.g., read-only library code)
Virtual Address Space for Process 2:
VP 1VP 2
...
0
N-1
VP 1VP 2
...
PP 2
PP 6
PP 8
...
0
M-1
Address translation
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VM as a Tool for Memory Management
• Memory allocation– Each virtual page can be mapped to any physical
page– A virtual page can be stored in different physical
pages at different timesVirtual Address Space for Process 1:
Physical Address Space (DRAM)
0
N-1(e.g., read-only library code)
Virtual Address Space for Process 2:
VP 1VP 2
...
0
N-1
VP 1VP 2
...
PP 2
PP 6
PP 8
...
0
M-1
Address translation
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VM as a Tool for Memory Management
• Sharing code and data among processes– Map virtual pages to the same physical page
(e.g. PP 6)
Virtual Address Space for Process 1:
Physical Address Space (DRAM)
0
N-1(e.g., read-only library code)
Virtual Address Space for Process 2:
VP 1VP 2
...
0
N-1
VP 1VP 2
...
PP 2
PP 6
PP 8
...
0
M-1
Address translation
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Simplifying Linking and Loading
•Linking – Each program has
similar virtual address space
– Code, stack, and shared libraries always start at the same address
Kernel virtual memory
Memory-mapped region forshared libraries
Run-time heap(created by malloc)
User stack(created at runtime)
Unused0
%esp (stack pointer)
Memoryinvisible touser code
brk
0xc0000000
0x08048000
0x40000000
Read/write segment(.data, .bss)
Read-only segment(.init, .text, .rodata)
Loaded from the executable file
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Simplifying Linking and Loading
•Loading –execve() allocates
virtual pages for .text and .data sections = creates PTEs marked as invalid
– The .text and .data sections are copied, page by page, on demand by the virtual memory system
Kernel virtual memory
Memory-mapped region forshared libraries
Run-time heap(created by malloc)
User stack(created at runtime)
Unused0
%esp (stack pointer)
Memoryinvisible touser code
brk
0xc0000000
0x08048000
0x40000000
Read/write segment(.data, .bss)
Read-only segment(.init, .text, .rodata)
Loaded from the executable file
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Why Virtual Memory (VM)?
• Uses main memory efficiently– Use DRAM as a cache for the parts of a virtual
address space
• Simplifies memory management– Each process gets the same uniform linear address
space
• Isolates address spaces– One process can’t interfere with another’s memory
– User program cannot access privileged kernel information
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VM as a Tool for Memory Protection
• Extend PTEs with permission bits– The same physical page has different
permission for different process
Process i: AddressREAD WRITEPP 6Yes NoPP 4Yes YesPP 2Yes
VP 0:VP 1:VP 2:
•••
Process j:
Yes
SUPNoNoYes
AddressREAD WRITEPP 9Yes NoPP 6Yes Yes
PP 11Yes Yes
SUPNoYesNo
VP 0:VP 1:VP 2:
Physical Address Space
PP 2
PP 4
PP 6
PP 8PP 9
PP 11
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VM as a Tool for Memory Protection
• Page fault handler checks these before remapping– If violated, send process SIGSEGV (segmentation fault)
Process i: AddressREAD WRITEPP 6Yes NoPP 4Yes YesPP 2Yes
VP 0:VP 1:VP 2:
•••
Process j:
Yes
SUPNoNoYes
AddressREAD WRITEPP 9Yes NoPP 6Yes Yes
PP 11Yes Yes
SUPNoYesNo
VP 0:VP 1:VP 2:
Physical Address Space
PP 2
PP 4
PP 6
PP 8PP 9
PP 11