1

Scalable E-mode N-polar GaN MISFET devices and process with self-aligned source/drain regrowth

Uttam Singisetti*, Man Hoi Wong, Sansaptak Dasgupta, Nidhi, Brian Swenson, Brian Thibeault, Jim Speck, and Umesh Mishra

ECE and Materials DepartmentsUniversity of California, Santa Barbara, CA

2010 Device Research ConferenceUniversity of Notre Dame, South Bend, IN

*uttam@ece.ucsb.edu

2

Outline

• Motivation – Why E-mode, N-polar

• Device design and Process– Self-aligned device process– E-mode device design

• Results– Optical gate devices DC and RF data

• Conclusion and Future work

3

Why E-mode GaN devices

GaN devices high speed and high breakdown high Johnston figure of merit D-mode HEMTs with ft ~ 200 GHz, fmax ~ 300 GHz

Motivation for E-mode−Single voltage supply circuit−Simplified circuits−E-mode/D-mode logic circuits

Figure source: . T. Palacios group, MIT

4

Ga-face

GaN buffer

Al(Ga)N2DEG

N-faceBarrier

GaN

Al(Ga)N

2DEG

GaN buffer+++++++++++ Si doping

− Back barrier for electron confinement higher gm

− No higher bandgap AlGaN layer on top low resistance contacts

Scaling advantages of N-polar GaN

Why E-mode, why N-polar GaNN-face

AlGaNGaN

EF

EC

VP

5

Ga-polar E-mode devices with alloyed contacts

Source/drain contacts to highband gap AlGaN layers parasitic source contact resistance high Ron, gm degradation, scaling issues

Higashiwaki, IEEE TED 2006

K.Chen, IEEE TED 2006

Thinning down barrier under the gate

Thicker barrier in the access regions

F- on incorporation under the gate

Thicker barrier in the access regions

6

Self-aligned scaled E-mode devices

− Self-aligned InGaN grade/InN source/drain to reduce access resistance*

− Sub 100 nm gate-lengths velocity overshoot

− Vertical scaling of channel to keep high aspect ratio

Ultra scaled GaN devices: ft, fmax > 200 GHz Figure source: . T. Palacios group, MIT

* S.Dasgupta, APL 2010. Nidhi, IEDM 2009

7

Device structure and design

Under sidewall

20 40 60 80 100

-4

-3

-2

-1

0

1

2

3

4

GaNchannel

SiN sidewall

EF

n(x)n

(x

101

9 cm

-3)

Depth (nm)

En

erg

y (

eV

)

0.00.20.40.60.81.01.21.41.61.82.0

∫ n(x)dx= 4.5×1012 cm-2

AlN removed under sidewall

Under gate

0 10 20 30 40 50 60-5-4-3-2-1012345

GaN:SiGaN channel

AlNAlN

SiN

Depth (nm)

En

erg

y (e

V)

EF

20 nm channelTop AlN depletes 2-DEG under gate

0 20 40 60 80 100

-4

-3

-2

-1

0

1

2

3

4

InN

n+ Graded InGaN(In: 0% to 65%)

GaN:SiAlN

GaN channel

EF

En

erg

y (e

V)

Depth (nm)

Under S/D contacts*

* S.Dasgupta, APL 2010. Nidhi, IEDM 2009

9

Device fabrication process

*

* U.Singisetti, pss(c) 2009, EDL 2009.

10

After etch

After etchAs_grown

Al 2p

Ga 3s

Ga 3s

x 104

5

10

15

20

CPS

300 200 100 0Binding Energy (eV)

0 5 10 15 20 25 30 35 40

-4

-3

-2

-1

0

1

2

3

4

n (x

1019

cm

-3)

n(x)

EF

Ene

rgy

(eV

)

Depth (nm)

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

Selective AlN etch on GaN channel

− Digital etch 5 m UV ozone oxidation, BHF etch

− 2 nm AlN etched in 4 cycles of etching

− XPS on process monitor shows removal of AlN

− Hall measurement gives ns = 3x1012 cm-2, agrees well to simulation

Band diagram after AlN etching

∫ n(x) dx = 3×1012 cm-2

No Al signal after etching

XPS of process monitor sample

11

0 1 2 3 40.0

0.1

0.2

0.3

0.4

0.5

0.6

Vds

(V)

I ds(

A/m

m)

Lg= 1 m

Vgs

= 0 to 5 VV

gs,step= 1 V

0 1 2 3 40.00

0.05

0.10

0.15

0.20L

g= 10 m

Vgs

= 0 to 5 VV

gs,step= 1 V

I ds(

A/m

m)

Vds

(V)

DC characteristics of E-mode devices

Imax = 0.2 A/mm for Lg = 10 m device

Imax = 0.6 A/mm for Lg = 1 m device

12

DC characteristics of E-mode devices

0 1 2 3 40.0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

Lg = 0.55 m, W

g= 100 m

Vgs

= 0 to 5 VV

gs,step= 1 V

I ds(

A/m

m)

Vds

(V)

0 2 4 60.0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

Lg = 0.55 m

Vds

= 4 V

I ds

(A/m

m)

Vgs

(V)

0

50

100

150

200

250

gm (m

S/m

m)

0 2 4 60.00

0.05

0.10

0.15

0.20

0.25L

g = 0.55 m

Vds

= 0.5 V

gm (m

S/m

m)

Vgs

(V)

I ds

(A/m

m)

0

20

40

60

80

100

120

140

Imax = 0.7 A/mm

−Vth = 0.8 V at Vds = 4.0V

− Imax = 0.7 A/mm, gm = 250 mS/mm at Vds = 4.0 V

−Imax = 0.22 A/mm, peak gm = 125 mS/mm at Vds = 0.5 V

Vth

13

Low gate leakage

-1 0 1 2 3 4 5

1

2

3

4

5

6

7

8

Vds

= 0.5 V

Vds

= 4.0 V

Lg = 0.55 m

I g (m

A/m

m)

Vgs

(V)

Maximum gate leakage current of 7 mA/mm at Vgs=5 V, and Vds =4.0 V

14

0 1 2 3 40.0

0.2

0.4

0.6

0.8

1.0L

g = 0.23 m

Vgs

= -1 to 5 VV

gs,step = 1 V

I ds

(A/m

m)

Vds

(V)

-1 0 1 2 3 4 5

0.2

0.4

0.6

0.8

1.0

Vds

(V)

I ds

(A/m

m)

60

80

100

120

140

160

180

200

220Lg = 0.23 m

Vds

= 4 V

gm (m

S/m

m)

0.23 m gate length device

Device no longer E-mode at Lg = 0.23 mm

Imax = 0.9 A/mm, peak gm = 210 mS/mm at Vds = 4.0 V

15

Short channel effect

-1 0 1 2 3 4 50.0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

Vds

= 4.0 V

Vds

= 3.0 V

Vds

= 0.5 V

Vds

= 0.1 V

Lg = 0.55 m

I ds (

A/m

m)

Vgs

(V)

Threshold voltage decreases with drain bias (Vds)

16

Short channel effect

0 1 2 3 4 5

0.0

0.2

0.4

0.6

0.8

1.0

0.1 1 10

-1.0

-0.5

0.0

0.5

1.0

1.5

2.0

Vth

Gate length (m)0.1 1 10

-1.0

-0.5

0.0

0.5

1.0

1.5

2.0

Vth

Gate length (m)

Vds

= 4 V

0.23 m 0.55 m 1 m 10 m

I ds

(A/m

m)

Vgs

(V)

• Vth roll off with gate length

• Device becomes D-mode at Lg= 0.23 m because of low aspect ratio (Lg/t = 230 nm/ 27 nm = 8.5)

• Short channel effect is because of low aspect ratio and self-aligned access regionsNeed more vertical scaling for sub-100 nm E-mode devices

17

Device access resistance

• Source access resistance of 1 -mm, regrowth Rsh = 1000 /□, Rc = 0.2 -mm, high compared to D-mode devices*• Reasons:

• Unintentional grading to In0.3Ga0.7N instead of In0.6Ga0.4N Higher sheet resistance• No InN coverage due to uncalibrated growth temperature Higher Rc

• Rs can be easily reduced

Gate

n+ regrowth

Gate

n+ regrowth

No InN

0 2 4 6 8 100

2

4

6

8

10

12

14

Gate lenght, Lg (m)

Ro

n (-

mm

)

Rs + Rd = 2 mm

* S.Dasgupta, APL 2010. Nidhi, IEDM 2009

18

Small-signal characteristics

0.1 1 10-5

0

5

10

15

20

25

Lg = 0.55 m, W

g = 100 m

Vgs

= 3.5 V, Vds

= 3Vft = 18 GHz

h21

(d

B)

frequency (GHz)

19

Conclusions and future work

– Scalable self-aligned N-polar E-mode devices– Vth = 0.8 V for Lg = 0.55 m device

– High current drive > 0.7 A/mm– Peak gm = 250 mS/mm

– Short channel effects observed

–Vertical scaling and gate length scaling– Optimized regrowth

Future work