Jan 28, 2005EE171

LECTU

RE 7

•B

JT Small Signal A

nalysis •

BJT am

plifiers–

Com

mon Em

itter–

Com

mon C

ollector (Emitter Follow

er)–

Com

mon G

ate•

BJT as a digital logic sw

itch

Jan 28, 2005EE171

Illustration of the Q-point base current IBQ , signal current i b (t), and total current iB (t).

Small Signal A

nalysis:•

After proper biasing, sm

all signal is injected.

Jan 28, 2005EE171

Small-signal equivalent circuits for the B

JT.

Small Signal Equivalent C

ircuit•

It is convenient to represent a BJT w

ith its small

signal equivalent.

T Cm

C

T

V Ir

gI V

r=

==

ππ

ββ

,

Jan 28, 2005EE171

.

Jan 28, 2005EE171

Com

mon-em

itter amplifier.

Com

mon Em

itter Am

plifier•

C1 couples the signal source to the base of the transistor.

•C

2 couples the amplified signal at the collector to the load.

•C

E (Bypass) provides low

impedance for the A

C current.

Jan 28, 2005EE171

Com

mon-em

itter amplifier.

•W

e can analyze our amplifier looking at its sm

all signal equivalent circuit.

•W

e can find the voltage gain (Av), input im

pedance (Zin) and output im

pedance (Zout) writing dow

n the node equations from

small signal equivalent circuit.

Jan 28, 2005EE171

Jan 28, 2005EE171

Com

mon-em

itter amplifier.

•To find the output im

pedance, the input source is replaced by a short circuit (w

hy?) and a test source is applied at the output port.

Jan 28, 2005EE171

Com

mon-em

itter amplifier of Exam

ple 4.9.

•Exam

ple: To find the gain, input and output im

pedance of the circuit given below for β=100.

Jan 28, 2005EE171

Emitter follow

er.

Emitter Follow

er•

In this case output port is at the emitter. (C

omm

on C

ollector).

Jan 28, 2005EE171

Emitter follow

er.

•A

gain the most im

portant is a correct small signal

equivalent circuit. Then it is easily to figure out gain, input and output im

pedance of the amplifier.

Jan 28, 2005EE171

Jan 28, 2005EE171

•W

e follow the sam

e strategy to figure out the output im

pedance. Short the input source and apply a test source at the output port.

Jan 28, 2005EE171

Figure 4.37a Emitter follow

er of Example 4.10.

Jan 28, 2005EE171

Figure 4.37b & c Em

itter follower of Exam

ple 4.10.

Jan 28, 2005EE171

Jan 28, 2005EE171

Com

mon-base am

plifier.

Com

mon B

ase Am

plifier•

This time the input is fed from

the emitter and the

output port is the collector. Base is com

mon node.

Jan 28, 2005EE171

Jan 28, 2005EE171

BJT as a digital logic sw

itch

•In early tim

es of digital world B

JT was used

as logic switch in a logic fam

ily known as

resistor-transistor logic (RTL).

Jan 28, 2005EE171

RTL inverter.

RTL inverter

•If input is zero, the B

JT operates in cutoff. No

current passes through Rc

and Vo equal to supply

voltage (input low-output high).

Jan 28, 2005EE171

Load-line analysis of RTL inverter under no-load conditions.

Load-Line analysis of the inverter

Jan 28, 2005EE171

Transfer characteristic for RTL inverter under no-load conditions.

Transfer characteristic of our inverter:

Jan 28, 2005EE171

Three-input RTL N

OR

gate.

Another exam

ple: Three input Nor gate

•If anyone of the inputs is high, then the corresponding B

JT will conduct pulling the output

node down.