The technology underneath GaNHow GaAs enables green GaN performance

www.CEDmagazine.commarch/april2013 29

E-mail: catv@tqs.com

By Chris Day, technical director at TriQuint Semiconductor

A new device technology is creat-ing significant disruption in RF infrastructure markets. By pro-

viding up to 3dB higher RF output level compared to devices made of other ma-terials, notably gallium arsenide (GaAs), gallium nitride (GaN)-based components are quickly emerging as the technology of choice in cable networks.

GaN devices provide a boost in the all-important breakdown voltage, a criti-cal measure of a device’s ability to carry RF voltage swings. But while GaN device characteristics make it ideal for handling high RF voltage swings in the top stage, an ultra-linear, high-transconductance bottom stage is a critical, but often over-looked, element in the use of GaN de-vices for the cable market.

GaN devices may be combined with market-tested GaAs MESFET technologies to provide noteworthy increases in perfor-mance. By careful design of the combined cascode circuit, the breakdown advantages of GaN and the price/performance ad-vantages of high-transconductance GaAs pHEMT can be optimized for superior output power, efficiency and cost.

Doubler basicsIt’s difficult to browse through an RF

trade magazine without coming across something espousing the benefits of GaN technology. Components utilizing GaN devices bring meaningful improvements in performance that reduce overall costs.

In the cable arena, GaN-based output stages known as doublers provide the much-sought-after increase in RF output power that reduces capital and operating

expenses in the distribution network.While the increased operating voltage

attributes of GaN technology are well de-scribed in industry publications, its applica-tion to the unique design challenges posed in doublers is a little vague. In actuality, technologies that operate at high voltages have been around for quite some time and continue to serve other markets well.

Future cable systems will evolve to support higher upper frequencies beyond 1000 MHz in anticipation of DOCSIS 3.1. Future doublers will need to support these higher bandwidths and the extra gain to overcome the additional cable losses.

Today, most GaAs doublers cover 870

or 1000 MHz of bandwidth with about 25 dB of gain. What separates GaN from other technologies in the cable market is its ability to operate at higher bias volt-ages without sacrificing other parameters such as restricted bandwidths.

For any type of device technology, there is an unfortunate tradeoff between the voltage it can handle and how fast it can respond. More voltage capability begets a slower de-vice and reduced bandwidth. In GaN tech-nology, this tradeoff still occurs, but with a significant boost in design margin.

Clearly, slower legacy devices don’t match the trend to increased gain at higher frequencies. But more importantly, slower devices also suffer from lower output pow-er at these higher frequencies because too much of the desired RF signal goes into charging and discharging internal device capacitances rather than into the output load. GaN technology provides relief by allowing much faster devices without com-promising the voltage-handling capability necessitated by 24-volt operation.

To see how GaN benefits the designer, first consider a classical 24v GaAs (or sili-con) doubler design (see Figure 1a). The doubler consists of two differential stages – a simple pre-amp stage followed by an out-put cascode stage. For best output power, it’s preferable to bias the output transistors (Q3a and Q3b) with as much of the 24v supply as the device can withstand, often about one-half of the available 24v. The remaining 12v is then allocated to the bot-tom devices in the cascode stage (Q2a and Q2b), and bias current is then reclaimed for use in the input stage.

Enter the GaN doubler design (see

Figure 1b: 24v GaN design.

Figure 1a: 24v common doubler design.

GaN

Figure 2: Desirable and typical transconductance profiles of bottom stages.

30 CEDmarch/april2013

Figure 1b). It consists of a pair of GaN FETs serving as output devices and a pair of lower-voltage but faster bottom FETs. It capitalizes on GaN’s higher voltage ca-pability to utilize a larger percentage of the available supply voltage in the devices.

GaN devices consume about 20v of the available 24v, leaving a scant 4v for the bot-tom device – and nothing left over for an input stage. For maximum efficiency, we want our output devices to operate with as much of the total bias available and into favorable output impedance. This abil-ity to comfortably use the majority of the bias voltage is how GaN generates higher efficiencies and output power.

The power versus gain dilemmaBecause there is little bias wasted in cir-

cuitry that cannot be used to drive the out-put, our GaN amplifier can be extremely efficient. In the cascode topology (see Figure 1b), only the bottom FET does not contrib-ute to output RF voltage swing. In practice, a GaN amplifier designed for a 24v supply voltage can output 3dB more power than older-generation GaAs designs. The draw-back to this scenario is there is no bias for an input stage, which renders the gain of the GaN amplifier deficient compared to GaAs doubler designs having a pre-amp stage.

Ideally, one would replace a legacy 25dB gain doubler with an amplifier whose in-crease in output capability came with a cor-responding increase in gain. Instead, with GaN, we get the opposite – the increase in output level brings with it an undesirable de-crease in gain – precisely because the higher-output RF swing came from the elimination of the input gain stage and the allocation of its bias voltage onto the GaN device. This skewing of output capability versus gain complicates application of GaN technology in cable infrastructure equipment.

This GaN gain penalty is particularly problematic in the design of segmentable nodes. To support the legacy deployment case, where one forward path optical re-ceiver services up to four node outputs, a four-way splitter is often used before the final doubler stage.

If each node output is to be individu-

ally tilted, a plug-in equalizer is needed on the input of each doubler. A driver stage must overcome the loss of the splitter and power each of four equalizers under a more difficult flat channel loading. Because the doubler gain is reduced, the driver has to provide much higher performance than before, driving up cost and power usage.

The situation would be improved with a higher-gain GaN amplifier. In other equip-ment designs, realizing the benefits of GaN would be simplified by maximizing the gain of the amplifier.

The bottom deviceIn practice, the gain of the GaN-based

amplifier is dominated by the bottom device in the cascode that runs at a much lower voltage, and not by the top GaN FET itself. That’s because the bottom devices, which comprise the transconduc-tance stage, provide the critical voltage-to-current function that dictates voltage gain in the cascode structure.

The top devices simply pass transcon-ductance stage gain through to the output and handle the resulting large RF voltage without burdening the bottom stage with high-voltage swings. While GaN FETs perform this transfer function without the bandwidth limitations that plagued older technologies, they do not provide current gain in the cascode topology.

The importance of the bottom device in the cascode is further accentuated when distortion is taken into account. The volt-age-to-current conversion they provide is often the dominant source of distortions that cause artifacts plaguing equipment designers and system architects.

Ideally, a bottom device would provide a large transconductance gain without add-ing distortion. Figure 2 shows a desirable bottom stage differential stage – a very high transconductance that is extremely flat over a wide input voltage range. Devices with flatter transconductance character-istics have lower distortion because the gain deviation with input voltage swing is less. Devices with a wide flat region in their transconductance profile can also de-liver higher RF output powers before signal compression takes place.

Quite often, distortion leads to bit errors in QAM signals. These distortion mecha-nisms are becoming increasingly important as the industry considers higher levels of QAM modulation having less tolerance for signal distortion before errors accumulate. So the bottom device not only sets the gain of the GaN cascode, it also plays a key role in how much output power it can support in emerging applications.

PHEMT (pseudomorphic high electron mobility transistor) FETs are one of the high-est-transconductance technologies available for RF applications. And pHEMTs are wide-ly used as LNA stages in mobile device and base station applications. They provide two to four times the transconductance gain over MESFET predecessors.

Although now mature, pHEMT technol-ogy continues to evolve, with solid improve-ments in odd order linearity benefiting prod-ucts that critically need wide dynamic range. Fortunately, mobile device applications that drive economies of scale have similar operat-ing voltage and linearity requirements as in the bottom stage of the cascode. Consistently fabricating a device with these desirable at-

GaN

www.CEDmagazine.commarch/april2013 31

tributes is challenging.A more typical characteristic that oc-

curs is also shown in Figure 2, where the gain is lower and not as linear. Not all pHEMTs are equal in gain and linearity, and there are wide differences in trans-conductance characteristics between device fabricators and process variants.Transconductance gains between pHEMT types vary from 400mS per mm of FET gate length to as much as 900mS/mm. Feedback techniques such as source de-generation are available to flatten the gm profile – but at penalty of lower gain.

Linearization may provide notable improvement by systematically cancel-ling odd order terms, and if properly designed, will not adversely burden the net gain or bias current. Even with the benefits of linearization at their disposal, a designer is well served by starting with a high-gain linear bottom device.

Improvements in doubler output pow-er result from the combination of tech-nologies in the cascode topology – GaN on top and pHEMT on bottom.

There is nothing mysterious about GaN – it simply enables a larger percent-age of a 24v supply voltage to be utilized in the output RF voltage signal swing without the bandwidth penalty posed by older devices. However, without the linear high transconductance of pHEMT, the ben-efits of GaN would be difficult to capture due to gain shortcomings. And pHEMT technology allows the bias previously allo-

cated to the input stage to be redirected to the output stage, thereby improving overall ef-ficiency.

High gain pHEMT devices also impact designs running on non-24v supplies. Figure 3 shows a generic 12v two-stage amplifier cascade fabricated in lower-gain MESFET technol-ogy. The lower transconduc-tance of MESFET necessitates a pre-amp stage to bring the combined gain to 21dB.

However, using high-gain pHEMT devices, the same or

higher gain can be realized in a single stage (see the bottom half of Figure 3). Some of the bias current previously burned in the in-put stage can be redirected into an enlarged output device, simultaneously resulting in net lower or “green” power consumption, increased output level, and lower cost.

Optimum broadband power matching in the 12v scenario is best done with a balun that is much easier to assemble, has superior insertion loss characteristics and has more consistent impedance characteristics to the possible higher frequencies envisioned by DOCSIS 3.1. In this case, the technology used in the top stage is not overly important since it operates at a lower 8v bias and into lower broadband impedance. Many low-cost and reasonably fast technologies can service this requirement.

Continued progress aheadWhether a 24v or 12v system supply is

used, the point remains the same. What fa-cilitates improvements in overall network efficiency is the availability of high-gain linear pHEMT technologies operating in conjunction with suitable top devices.

For high-performance applications, GaN top devices combined with pHEMTs can set new marks for sheer RF output level.

For green applications, legacy MESFET top devices work with pHEMTs to provide new levels of GaAs output per-formance and efficiency at a lower cost.

In each case, pHEMT technology is a key determinant of overall performance. n

Figure 3: 21dB 12v output design featuring improved output efficiency from input stage bias reclamation.

Delivering your branded

video experience to

every device in

subscribers' homes.

SOFT BOX GATEWAY

it’s time to wow your subscribersagain.

www.schange.com