the nand gate as a universal gate logic function nand gate only aa a b a.ba.b a b a+b a b a b a b a...

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The NAND gate as a universal gate Logic function NAND gate only A A A B A . B A B A+B A B A+B A B A + B A + B A B A A A B A . B B A+B A A B A+B A B A + B A B A + B

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The NAND gate as a universal gate

Logic function NAND gate only

A A

AB A.B

AB

A+B

A

BA+B

AB

A + B

A + BAB

A A

AB A.B

B A+BA

A

BA+B

A

BA + B

A

B

A + B

Gates with more than two inputs

AB A.B.C=Y C

A

BYC

ABCD

YAB YCD

AB

A+B+C+D=YCD

AB

YCD

AB

YC

CBA

A+B+C=Y

Gates with more than two inputs (cont.).

=ABCD

Y

AB

YCD

=

=

NAND,NOR gates use to implement any Boolean operation

Gate conversion using inverter.

Boolean theorems

(16) (x + y) = x . y

(17) (x . y) = x + y

DeMORGAN’S THEOREMS

COMBINATORIAL LOGIC CIRCUITS

ALGEBRAIC SIMPLIFICATION Example 1

EXAMPLE

EXAMPLE

EXAMPLE

EXAMPLE

Topdown design1 Block diagram2 Truth table3 Boolean function4 Simplify5 Schematic6 Test I/O Seq

EXAMPLE Converting circuits to NAND.

Example Sum-of-products NAND-NAND circuit

Example products -of- Sum NOR-NOR circuit

KANAUGH MAP METHOD

KANAUGH MAP AND TRUTH TABLE

KANAUGH MAP

Example of looping pairs

Example of looping groups of four.

EXCLUSIVE-OR & EXCLUSIVE-NOR CIRCIUTS

EXCLUSIVE-OR & EXCLUSIVE-NOR CIRCIUTS

Design a logic circuit, using x1,x0,y1,y0 inputs, whose output will be HIGH only when the two binary numbers x1x0 and y1y0 are equal.

PARITY GENRATOR AND CHECKER

EX-OR gates used to implement parity generator and parity checker for even parity system.

INHIBIT CIRCUITS Four basic gates can either enable or inhibit

the passage of and input signal, A, under control of the logic level at control input B.