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© March 8, 2007 Dr. Lynn Fuller, Professor
Rochester Institute of TechnologyMicroelectronic Engineering
Testing of Digital Circuits
Page 1
ROCHESTER INSTITUTE OF TECHNOLOGYMICROELECTRONIC ENGINEERING
Testing of Digital Circuits at RIT Dr. Lynn Fuller, Professor, Kekuut Hoomkwap, Suebphong
Yenrudee, MS MicroE, Sushil Shayka, BS MicroE
Dr. Fuller’s Webpage: http://www.rit.edu/~lffeee Microelectronic Engineering
Rochester Institute of Technology 82 Lomb Memorial Drive Rochester, NY 14623-5604 Tel (585) 475-2035 Fax (585) 475-5041
Email: [email protected] MicroE Webpage: http://www.microe.rit.edu
3-8-2007 test_dig.ppt
© March 8, 2007 Dr. Lynn Fuller, Professor
Rochester Institute of TechnologyMicroelectronic Engineering
Testing of Digital Circuits
Page 2
OUTLINE
Problem StatementDigital CircuitsTester HardwareTester Software2 Input 1 Output..6 input 6 OutputSummaryReferences
© March 8, 2007 Dr. Lynn Fuller, Professor
Rochester Institute of TechnologyMicroelectronic Engineering
Testing of Digital Circuits
Page 3
PROBLEM STATEMENT
We design and build a variety of digital circuits which can not be tested using the HP-4145 Semiconductor Parameter Analyzer. These digital circuits often have a large number of inputs and outputs. For example a full adder has 3 inputs and 2 outputs. A 2-bit multiplexer has 6 inputs and 1 output. The chip technology could be PMOS, NMOS, CMOS, TTL or Analog each requiring different supply voltages. It is desirable to have a test system that can be easily understood with a simple graphical interface that can exercise these digital circuits. Test results in a format similar to the simulation results would be useful.
© March 8, 2007 Dr. Lynn Fuller, Professor
Rochester Institute of TechnologyMicroelectronic Engineering
Testing of Digital Circuits
Page 4
LIST OF DIGITAL CIRCUITS ON RIT TESTCHIPS
Inverters2 Input NORXOR2 Input NANDRS Flip FlopMultiplexerDemultiplexerEncoderDecoderAdderPLA
For these types of devices a truth table type test at low frequencies would be sufficient.
A B Out0 0 00 1 11 0 11 1 0 Out
BA
Similar to QUICKSIM output
© March 8, 2007 Dr. Lynn Fuller, Professor
Rochester Institute of TechnologyMicroelectronic Engineering
Testing of Digital Circuits
Page 5
NOR GATE AND NOR FLIP FLOP
PMOS 2 INPUT NOR PMOSNOR RS Flip Flop
© March 8, 2007 Dr. Lynn Fuller, Professor
Rochester Institute of TechnologyMicroelectronic Engineering
Testing of Digital Circuits
Page 6
PMOS TEST CHIP
© March 8, 2007 Dr. Lynn Fuller, Professor
Rochester Institute of TechnologyMicroelectronic Engineering
Testing of Digital Circuits
Page 7
OTHER DIGITAL CIRCUITS
CMOS Demultiplexer CMOS 2 INPUT NAND
© March 8, 2007 Dr. Lynn Fuller, Professor
Rochester Institute of TechnologyMicroelectronic Engineering
Testing of Digital Circuits
Page 8
FULL ADDER CIRCUIT REALIZATION OF SUM
SUM COUTBA
0 0 0 0 00 0 1 1 00 1 0 1 00 1 1 0 11 0 0 1 01 0 1 0 11 1 0 0 11 1 1 1 1
CIN
TRUTH TABLEFOR ADDITION
RULES
A
SUM
CinB
Sum = A’B’Cin + A’BCin’ +AB’Cin’ + ABCin
A
COUT
CinB
Carry Out = A’BCin + AB’Cin + ABCin’ + ABCin
© March 8, 2007 Dr. Lynn Fuller, Professor
Rochester Institute of TechnologyMicroelectronic Engineering
Testing of Digital Circuits
Page 9
1:4 DEMULTIPLEXER
A B Q0 Q1 Q2 Q30 0 I 0 0 00 1 0 I 0 01 0 0 0 I 01 1 0 0 0 I
Q0 = A’B’I so that when I=0 Q0 =0 or when I=1 Q0 = 1
similarly for Q1, Q2 and Q3 Q1 = A’BI
Demultiplexer
INPUTS OUTPUTS
A
B
I
Q0
Q1
Q2
Q3
© March 8, 2007 Dr. Lynn Fuller, Professor
Rochester Institute of TechnologyMicroelectronic Engineering
Testing of Digital Circuits
Page 10
FOUR INPUT MULTIPLEXER
Four Input Multiplexer
select outputA B Q0 0 I00 1 I11 0 I21 1 I3
Q = A’B’I0 + A’BI1 + AB’I2 + ABI3
3 input AND
4 input OR3 input AND
01010101
I0
I1
I2
I3
Q
A
B
A’
B’
A’B’I0
A’BI1
AB’I2
ABI3
© March 8, 2007 Dr. Lynn Fuller, Professor
Rochester Institute of TechnologyMicroelectronic Engineering
Testing of Digital Circuits
Page 11
DIGITAL CIRCUIT TESTING
© March 8, 2007 Dr. Lynn Fuller, Professor
Rochester Institute of TechnologyMicroelectronic Engineering
Testing of Digital Circuits
Page 12
LAB VIEW SOFTWARE
© March 8, 2007 Dr. Lynn Fuller, Professor
Rochester Institute of TechnologyMicroelectronic Engineering
Testing of Digital Circuits
Page 13
HARDWARE FOR OUTPUT
6 Analog OutputsRibbon CableTerminal Board
© March 8, 2007 Dr. Lynn Fuller, Professor
Rochester Institute of TechnologyMicroelectronic Engineering
Testing of Digital Circuits
Page 14
HARDWARE FOR INPUT
16 Analog InputsRibbon CableTerminal Board
© March 8, 2007 Dr. Lynn Fuller, Professor
Rochester Institute of TechnologyMicroelectronic Engineering
Testing of Digital Circuits
Page 15
FINAL SYSTEM
© March 8, 2007 Dr. Lynn Fuller, Professor
Rochester Institute of TechnologyMicroelectronic Engineering
Testing of Digital Circuits
Page 16
CUSTOM SOFTWARE INTERFACE
Click on digital testing icon to invoke the lab view software and this main menu.
Click to select the type of test you wish to run.
MAIN MENU
© March 8, 2007 Dr. Lynn Fuller, Professor
Rochester Institute of TechnologyMicroelectronic Engineering
Testing of Digital Circuits
Page 17
TESTING TWO INPUT ONE OUTPUT LOGIC GATES
© March 8, 2007 Dr. Lynn Fuller, Professor
Rochester Institute of TechnologyMicroelectronic Engineering
Testing of Digital Circuits
Page 18
FOUR CHOICES FOR SUPPLY VOLTAGES
CLICK TO SELECT ONE
CMOS/TTL Vcc = +5 Volts
© March 8, 2007 Dr. Lynn Fuller, Professor
Rochester Institute of TechnologyMicroelectronic Engineering
Testing of Digital Circuits
Page 19
PROBE CARD/WIRE CONNECTIONS
8
6
1012141618
24 2 420 22
© March 8, 2007 Dr. Lynn Fuller, Professor
Rochester Institute of TechnologyMicroelectronic Engineering
Testing of Digital Circuits
Page 20
SWITCH MATRIX (MANUAL)
SupplyVcc -V Gnd
Inputsa b c d e f
Outputsa b c d e f
Wire #17
Wire #8
© March 8, 2007 Dr. Lynn Fuller, Professor
Rochester Institute of TechnologyMicroelectronic Engineering
Testing of Digital Circuits
Page 21
CMOS XOR GATE TESTING
Click to Select When Output is High or Low
Click to Start TestStop Test
Test Results
© March 8, 2007 Dr. Lynn Fuller, Professor
Rochester Institute of TechnologyMicroelectronic Engineering
Testing of Digital Circuits
Page 22
TESTING THREE INPUT TWO OUTPUT LOGIC GATES
3 Input OR, AND, NOR, NANDFull Adder
CMOS Full Adder
© March 8, 2007 Dr. Lynn Fuller, Professor
Rochester Institute of TechnologyMicroelectronic Engineering
Testing of Digital Circuits
Page 23
THREE INPUT TWO OUTPUT
© March 8, 2007 Dr. Lynn Fuller, Professor
Rochester Institute of TechnologyMicroelectronic Engineering
Testing of Digital Circuits
Page 24
DEFINE INPUT SIGNALS / SELECT SUPPLY VOLTAGE
© March 8, 2007 Dr. Lynn Fuller, Professor
Rochester Institute of TechnologyMicroelectronic Engineering
Testing of Digital Circuits
Page 25
ADDER TEST RESULTS
SUM
CARRY OUT
CARRY IN
B
A
© March 8, 2007 Dr. Lynn Fuller, Professor
Rochester Institute of TechnologyMicroelectronic Engineering
Testing of Digital Circuits
Page 26
TESTING SIX INPUT SIX OUTPUT DEVICES
Multiplexer (6 inputs, 1 output)Demultiplexer (3 inputs, 4 outputs)EncoderDecoder
© March 8, 2007 Dr. Lynn Fuller, Professor
Rochester Institute of TechnologyMicroelectronic Engineering
Testing of Digital Circuits
Page 27
MULTIPLEXER TEST SIGNALS
Out
I0
I1I2I3
A
BInput Signal I0, I1, I2 or I3 is directed to the output depending on the A and B select line values
© March 8, 2007 Dr. Lynn Fuller, Professor
Rochester Institute of TechnologyMicroelectronic Engineering
Testing of Digital Circuits
Page 28
MUX LAYOUT AND GATE LEVEL SCHEMATIC
I0
I1
I2
I3
Q
A
B
A’
B’
A’B’I0
A’BI1
AB’I2
ABI3
25 Transistors
© March 8, 2007 Dr. Lynn Fuller, Professor
Rochester Institute of TechnologyMicroelectronic Engineering
Testing of Digital Circuits
Page 29
PMOS 4-INPUT MULTIPLEXER
© March 8, 2007 Dr. Lynn Fuller, Professor
Rochester Institute of TechnologyMicroelectronic Engineering
Testing of Digital Circuits
Page 30
MUX TEST RESULTS
ABI3I2I1I0
ABI3I2I1I0
In PMOS logic low is 0 volts, logic high is -Vcc
A
B
I3
I2
I1
I0
A
B
I3
I2
I1
I0
© March 8, 2007 Dr. Lynn Fuller, Professor
Rochester Institute of TechnologyMicroelectronic Engineering
Testing of Digital Circuits
Page 31
MUX TEST RESULTS
ABI3I2I1I0
ABI3I2I1I0
In PMOS logic low is 0 volts, logic high is -Vcc
A
B
I3
I2
I1
I0
A
B
I3
I2
I1
I0
© March 8, 2007 Dr. Lynn Fuller, Professor
Rochester Institute of TechnologyMicroelectronic Engineering
Testing of Digital Circuits
Page 32
SUMMARY
1. The system works great.2. Direct comparison between QUICKSIM output and tester output is possible.3. Easy to use graphical interface. (Freshman to Graduate Students have used the system successfully)