AGILENT TECHNOLOGIES, INC.

Test Methodology for

Performing the PCISIG PCI

Express Link and

Transaction Layer Testing

using the Agilent U4305A

Protocol Test Card Version 0.7

Agilent Technologies

6/4/2012

Table of Contents 1. Overview ............................................................................................................................................... 4

2. Hardware Requirements ....................................................................................................................... 4

2.1 Agilent U4305A Protocol Test Card for PCIe 3.0 ........................................................................... 4

2.2 Agilent N5316A Passive Backplane for PCI Express ...................................................................... 4

2.3 Controller PC ................................................................................................................................. 5

3. Software requirements ......................................................................................................................... 5

3.1 Agilent Exerciser for PCI Express software ................................................................................... 5

4. Setup Example ...................................................................................................................................... 6

5. Running the tests .................................................................................................................................. 7

5.1 Start the Exerciser/Protocol Test Card software .......................................................................... 7

5.2 Connect to the card ...................................................................................................................... 7

5.3 Basic Link Setup of the Protocol Test Card ................................................................................... 8

5.4 Equalization Settings ................................................................................................................... 10

5.5 Establishing the link .................................................................................................................... 12

5.6 Checking the Link Status ............................................................................................................. 13

6. Running the Tests ................................................................................................................................ 15

Figure 1 Agilent U4305A Protocol Test Card/Exerciser ................................................................................ 4

Figure 2: Agilent N5316A Passive Backplane for PCI Express ....................................................................... 5

Figure 3: Controller PC .................................................................................................................................. 6

Figure 4: Example setup ................................................................................................................................ 6

Figure 5: Start Session Dialog Box ................................................................................................................. 7

Figure 6: Exerciser General Set Up Window ................................................................................................. 9

Figure 7: General Setup Options ................................................................................................................... 9

Figure 8: Equalization Settings Tab ............................................................................................................. 11

Figure 9: Transceiver Settings ..................................................................................................................... 12

Figure 10: Linkup Button ............................................................................................................................. 12

Figure 11: Hardware Status Window .......................................................................................................... 13

Figure 12: Initiating Speed Change ............................................................................................................. 14

Figure 13: LTSSM Test Window................................................................................................................... 15

Figure 14: Main Compliance Test GUI Window .......................................................................................... 16

Figure 15: List of Compliance Tests for an 8GT/s Add In Card – All tests must be run. .............................. 16

Figure 16: HTML Report produced after running tests ............................................................................... 17

Revision History

Version Date Summary of Changes Contributors

0.1 September 21st

2011 Initial Draft Gordon Getty

0.3 October 25th

2011 updates

0.7 June 4th

2012 Updates Gordon Getty

1. Overview

This document describes a test procedure for running the tests defined in the PCISIG PCI Express®

Architecture Link Layer and Transaction Layer Test Specification Revision 3.0, V 0.7 RC1 using the Agilent

Technologies U4305A Protocol Test Card for PCI Express 3.0

2. Hardware Requirements

2.1 Agilent U4305A Protocol Test Card for PCIe 3.0

The Agilent U4305A Protocol Test Card will behave as the Root Complex for the testing of Add In

Cards (AIC). The U4305A card should have the PTC license enabled.

Figure 1 Agilent U4305A Protocol Test Card/Exerciser

2.2 Agilent N5316A Passive Backplane for PCI Express

The Agilent N5316A Passive backplane provides 2 PCI Express slots connected to each other in

addition to power and REF Clock for the DUT. This backplane is used to allow the Exerciser to

establish a link with the DUT

Figure 2: Agilent N5316A Passive Backplane for PCI Express

2.3 Controller PC

A Windows XP or Windows 7 controller PC with an available USB port is required to run the

Exerciser software, please note – Windows Vista is not supported

3. Software requirements

3.1 Agilent Exerciser for PCI Express software

Available for download from http://www.agilent.com

4. Setup Example

Figure 3: Controller PC

Figure 4: Example setup

Gen 3 PTC

Backplane

Device under Test

USB

Connect the USB Cable from the PTC to the controller laptop. Plug in the PTC into Link 3 on the

backplane in the slot closest to the edge of the backplane. Plug in the DUT to the adjacent slot.

5. Running the tests

5.1 Start the Exerciser/Protocol Test Card software

The U4305A card should have the PTC license enabled. The Protocol Test Card should be plugged

into the backplane.

Launch the software the start menu:

Start -> All Programs -> Agilent SPT -> PCIe Exerciser 8.6 release -> Exerciser GUI

Choose “Connect to new session” and press Start

Figure 5: Start Session Dialog Box

5.2 Connect to the card

You will be presented with the Port Selection dialog box, check the box next to the exerciser, it should

be 10001.

Select “Connect to New Session”

and press “Start”.

5.3 Basic Link Setup of the Protocol Test Card

It is necessary to ensure that a stable link can be established between the Protocol Test Card and the

DUT, if this is not possible, then it will not be possible to correctly run the tests. The tests should be run

at 2.5G, 5G and 8G on capable devices. Further information on establishing a stable link, including

setting the correct equalization parameters can be found in Appendix A.

Once the Protocol Test Card software has loaded, the Overview screen shown below will appear:

Check the box next to

the exerciser ‘10001”

then press “OK”

Select PCIe Gen3 PTC

from the drop down

box

Figure 6: Exerciser General Set Up Window

From this window, select the “General” button.

Figure 7: General Setup Options

In this setup window, parameters for the link training should be set up as follows:

Press the “General

Settings” Button

Protocol: PCIe

Supported Link Widths: x1

Link Number Advertised: 0

Data Rate Capability: 8.0GT/s

Autonomous speed change to 8.0GT/s: Unchecked

Scrambler: Enabled

Load Descrambler LFSR by SKIP OS: Disabled

Tag Mode: Normal

PCIe Spec Revision: 3.0

Session Type: To Downstream

Enable ARI Capability: Unchecked

5.4 Equalization Settings

The default equalization settings as shown below should work in most cases, if a stable link cannot be

established, then please refer to Appendix A for further details on how to set the correct parameters.

Firstly click on the Equalization Tab within the General Setup:

Figure 8: Equalization Settings Tab

The screen is separated into two sections; the section on the left contains the settings that the PTC will

request to the DUT and the section on the right contains the settings that the exerciser/PTC itself will

use. Under normal circumstances, this screen can be left as default.

It is important to know the FS value of the DUT, on the “Request to DUT” section, if incorrect values are

put in here, it will cause the coefficients to be rejected in Phase 3 and will cause the link to fail to

negotiate to 8G.

The settings for the transceivers of the PTC can be set in the “Transceiver Settings” tab of the General

Settings:

Figure 9: Transceiver Settings

The correct settings for a particular preset can be determined from the table on this tab. Under normal

circumstances, this can be left as default.

5.5 Establishing the link

Once the settings have been set correctly on the PTC, then press Apply to write to the hardware.

After pressing apply, it is necessary to initiate the Link Training. This is done by pressing the linkup

button:

Figure 10: Linkup Button

Press the Linkup

Button once

At this point, the power on the backplane should be turned on by pressing the power button (also make

sure the power switch on the power supply is on):

5.6 Checking the Link Status

The link will initially establish at 2.5GT/s and the status can be seen on the Hardware Status pane on the

main GUI window:

Figure 11: Hardware Status Window

Power Button on

backplane

Power LEDs – there are

4 green LEDs lit here

when the power is on.

When connected to a

8GT/s capable card, the

“Received Data Rate”

should show 2.5 GT/s, 5.0

GT/s, 8.0GT/s

The supported Data Rates of the Device under test will be shown on the Hardware Status window.

Check that the device advertises 8.0GT/s before moving on to the next section. If the device does not

support 8.0GT/s, it can still be tested at 2.5GT/s or 5.0GT/s but will only be listed as a device that

supports 2.5GT/s or 5GT/s assuming all tests pass.

For devices that support 8.0GT/s, it is now required to test that the link can be established and be stable

(without Recovery cycles) at 8GT/s.

Open the LTSSM test section on the main GUI to run the test:

“2.5GT/s -> 8GT/s through all phases of equalization”

Then press the button on the adjacent window:

Figure 12: Initiating Speed Change

This test should pass and the Link status should show Link Speed = 8GT/s on the Hardware Status pane.

If the link speed shows “8.0GT/s” then the next step is to check that the link is stable.

This is accomplished by running a test under the LTSSM Test tab on the main GUI:

Run button

“2.5GT/s -> 8GT/s

through all phases of

equalization”

Figure 13: LTSSM Test Window

Select the test called “Capture State Transitions” under the “Basic” group of tests. Then press the

button on the adjacent window.

This test will capture the state transitions that the LTSSM of the exerciser sees for 1 second and will

indicate in the log file if the link is stable in L0 or if it is transitioning to Recovery. If the link shows stable

in L0, then proceed to run the tests, if it exhibits Recovery cycles, or if the Link Speed does not show

8.0GT/s in the Hardware Status pane (assuming it advertises 8.0GT/s), then please see Appendix A for

further information on how to set the correct equalization settings.

6. Running the Tests

Once the link has been established and checked for stability at 8.0GT/s, the tests can now be run. This is

done by selecting the “Compliance Tests” button on the main GUI:

Run button

Capture State Transitions

Figure 14: Main Compliance Test GUI Window

For an 8GT/s capable add in card, select all the tests in the PTC III group of tests then press the “Run”

button:

Figure 15: List of Compliance Tests for an 8GT/s Add In Card – All tests must be run.

Run button

Figure 16: HTML Report produced after running tests