srp: current status
DESCRIPTION
SRP: Current Status. Irakli MANDJAVIDZE DAPNIA, CEA Saclay, 91191 Gif-sur-Yvette, France. Overview. Hardware Firmware Plans. Hardware. Schematic capture in progress Already done VME JTAG TTCrx & QPLL Parallel optic modules To be done Clock circuitry Configuration Flash PROMs - PowerPoint PPT PresentationTRANSCRIPT
ODE Workshop, LIP, 08/04/[email protected]@cea.fr
SRP: Current Status
Irakli MANDJAVIDZE
DAPNIA, CEA Saclay,91191 Gif-sur-Yvette, France
[email protected]@cea.fr ODE Workshop, LIP, 08/04/05 3
Hardware
Schematic capture in progress Already done
→ VME→ JTAG→ TTCrx & QPLL→ Parallel optic modules
To be done→ Clock circuitry→ Configuration Flash PROMs→ TTS interface→ External Memory→ Ethernet and RS232 console→ Power circuitry
[email protected]@cea.fr ODE Workshop, LIP, 08/04/05 4
Targeted AB Test-bed
Debugging and testing of ABs with ABs
TTCOUT
TCCRX
DCCTX
ABRX
ABTX
sTTSIN
sTTSOUT
TTCIN
ABundertest
DCCRX
TCCTX
ABRX
ABTX
sTTSIN
sTTSOUT
TTCIN
ABtester
TTCEX
Attenuator
Attenuator
TTCVICC
SBS620
Control PC
LinuxHAL
XDAQ
DAQKit
DCC emulatorup to 6 chan.
TCC emulatorup to 12 chan.
[email protected]@cea.fr ODE Workshop, LIP, 08/04/05 5
Firmware Architecture
System-on-chip design→ Embedded PowerPC processor for control and monitoring→ Facilitates debugging and testing→ Currently standalone “C” application
PPC100 MHz
On-chipmemory
Bridge
Pro
cess
or L
ocal
Bus
: 50
MH
z
On-
chip
Per
iphe
ral B
usRS232
Console
SlaveInterface
User Logic
Ethernet
ArbiterVME
Application
e.g. AB orAB Tester
LocalBus
[email protected]@cea.fr ODE Workshop, LIP, 08/04/05 6
Firmware Debugging
Firmware is tested on 3 Virtex-2 Pro development boards→ TCS emulation : with 2VP7 device→ AB Tester : with 2VP30 device
8 RocketIOs
→ AB: with 2VP50 device8 RocketIOs
TCS Emulator (2vp7)
AB Tester
(2VP30)
AB
(2VP50)
N TCC and DCC links
M AB links
Flat ribbon cablefor TCS signals
[email protected]@cea.fr ODE Workshop, LIP, 08/04/05 7
TCS Emulator Firmware
Generates and distributes TTC signals→ Clock40→ L1Accept→ BGo commands
Receives and combines sTTS signals→ From AB and AB Tester
Implements TCS state machine→ As in CMS NOTE 2002/033→ Allows to start/stop run from console
At any state changes fill a Spy buffer→ Monitoring and debugging
Signals follow closely TTCrx pin-out→ AB and AB tester feel like getting data from TTCrx
[email protected]@cea.fr ODE Workshop, LIP, 08/04/05 9
AB Tester Firmware
Sender module→ Memory with pre-loaded data to be sent at L1 Accept
TCC: TT classification flagsAB: Frontier TT classification flags
Receiver module→ Memory with pre-loaded data to be received
DCC: SR flagsAB: Frontier TT classification flags
→ Memory to store erroneous eventsWrong sender, event ID or dataParity or transmission error
Communication channels→ DCC/TCC: 80 MHz – 1.6 Gbit/s→ AB: up to 100 MHz – 2.0 Gbit/s
Variable number of TCC/DCC and AB/AB instances→ Usually running with 4 DCC/TCC and with 4 AB/AB
[email protected]@cea.fr ODE Workshop, LIP, 08/04/05 10
AB Tester Firmware (cont.)
TCS module→ Receives 40 MHz TTC Clock→ Receives and interprets BGo commands→ Receives and buffers L1 Accepts→ Transmits sTTS signals
AB Tester State Machine→ L1_Enb, L1_Wait, Arm_Time_Out, Wait_for_data, Disarm_Time_Out, Error
Run Control State Machine→ On, Init, Idle, Running, Out_of_Sync, Error
Spy Memory→ At any STATUS register changes
VME interface: to be done
Same firmware to test barrel and endcap ABs
[email protected]@cea.fr ODE Workshop, LIP, 08/04/05 11
AB Tester Screen Dump
General status and TTC module statistics
[email protected]@cea.fr ODE Workshop, LIP, 08/04/05 12
AB Tester Screen Dump
Sender and Receiver module statistics
Communication channels statistics
(Forced) data content errors
[email protected]@cea.fr ODE Workshop, LIP, 08/04/05 14
Algorithm Board Firmware
Under development
Shares many modules with AB Tester→ TCS→ Run Control state machine→ Clock management→ Communication channels→ VME Interface→ SoC
Modules developed for the system R&D work to be reused→ e.g. Multi-port memory
Two types of firmware→ for barrel AB→ for endcap AB
[email protected]@cea.fr ODE Workshop, LIP, 08/04/05 15
Plans
Two AB prototypes in September
Standalone debugging and testing until December
System-wide tests starting from 2006
Production, installation, integration, commissioning in 2006→At least for barrel