soc/asic/soc-fpga/s-asic design and verification methodology · soc/asic/soc-fpga/s-asic design and...

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SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology in telop Intelop Corporation 4800 Great America Pkwy. Ste-201 Santa Clara, CA. 95054 Ph: 408-496-0333, Fax: 408-496-0444 www.intelop.com Courtesy of Cadence design

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Page 1: SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology · SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology i n t e l o p Intelop Corporation 4800 Great America Pkwy

SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification

Methodology

intelop

Intelop Corporation4800 Great America Pkwy.

Ste-201Santa Clara, CA. 95054

Ph: 408-496-0333, Fax: 408-496-0444www.intelop.com

Courtesy of Cadence design

Page 2: SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology · SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology i n t e l o p Intelop Corporation 4800 Great America Pkwy

intelopChallenges in Embedded Systems Design

Page 3: SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology · SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology i n t e l o p Intelop Corporation 4800 Great America Pkwy

intelopCritical Issues

Page 4: SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology · SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology i n t e l o p Intelop Corporation 4800 Great America Pkwy

intelopVerification Effort size

Page 5: SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology · SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology i n t e l o p Intelop Corporation 4800 Great America Pkwy

intelopOverview of Verification Methodologies

Page 6: SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology · SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology i n t e l o p Intelop Corporation 4800 Great America Pkwy

intelopSoftware Simulation

Page 7: SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology · SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology i n t e l o p Intelop Corporation 4800 Great America Pkwy

intelopSoftware Simulation

Page 8: SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology · SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology i n t e l o p Intelop Corporation 4800 Great America Pkwy

intelopHardware Acceleration

Page 9: SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology · SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology i n t e l o p Intelop Corporation 4800 Great America Pkwy

intelopEmulation

Page 10: SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology · SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology i n t e l o p Intelop Corporation 4800 Great America Pkwy

intelopOverview of Verification Methodologies

Formal Verification

Page 11: SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology · SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology i n t e l o p Intelop Corporation 4800 Great America Pkwy

intelopFormal Verification : equivalence Check

Page 12: SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology · SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology i n t e l o p Intelop Corporation 4800 Great America Pkwy

intelopFormal Verification : equivalence Check

Page 13: SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology · SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology i n t e l o p Intelop Corporation 4800 Great America Pkwy

intelopTheorem Proving

Page 14: SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology · SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology i n t e l o p Intelop Corporation 4800 Great America Pkwy

intelopFormal Verification : Model Check

Page 15: SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology · SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology i n t e l o p Intelop Corporation 4800 Great America Pkwy

intelopFormal Verification : Model Checking

Page 16: SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology · SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology i n t e l o p Intelop Corporation 4800 Great America Pkwy

intelopFormal Verification : Challenges

Page 17: SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology · SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology i n t e l o p Intelop Corporation 4800 Great America Pkwy

intelopSemi-Formal Verification : Assertion

Page 18: SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology · SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology i n t e l o p Intelop Corporation 4800 Great America Pkwy

intelopSemi-Formal Verification : Coverage

Page 19: SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology · SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology i n t e l o p Intelop Corporation 4800 Great America Pkwy

intelopSemi-Formal Verification : Coverage

Page 20: SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology · SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology i n t e l o p Intelop Corporation 4800 Great America Pkwy

intelopSemi-Formal Verification : Coverage

Page 21: SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology · SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology i n t e l o p Intelop Corporation 4800 Great America Pkwy

intelop

Semi-Formal Verification

Page 22: SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology · SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology i n t e l o p Intelop Corporation 4800 Great America Pkwy

intelop

Design Complexity

Page 23: SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology · SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology i n t e l o p Intelop Corporation 4800 Great America Pkwy

intelopLanguage Heritage for SoC Design

Page 24: SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology · SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology i n t e l o p Intelop Corporation 4800 Great America Pkwy

intelopSystemC in SoC Design

Page 25: SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology · SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology i n t e l o p Intelop Corporation 4800 Great America Pkwy

intelopSystemC in SoC Design

Page 26: SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology · SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology i n t e l o p Intelop Corporation 4800 Great America Pkwy

intelop

Abstraction Levels of SystemC

Page 27: SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology · SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology i n t e l o p Intelop Corporation 4800 Great America Pkwy

intelop

Vera (Synopsys)

Page 28: SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology · SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology i n t e l o p Intelop Corporation 4800 Great America Pkwy

intelop

Vera (Synopsys)

Page 29: SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology · SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology i n t e l o p Intelop Corporation 4800 Great America Pkwy

intelop

System Verilog

Page 30: SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology · SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology i n t e l o p Intelop Corporation 4800 Great America Pkwy

intelop

System Verilog

Page 31: SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology · SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology i n t e l o p Intelop Corporation 4800 Great America Pkwy

intelop

Key Components of System Verilog

Page 32: SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology · SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology i n t e l o p Intelop Corporation 4800 Great America Pkwy

intelopSystem Design Language Summary

Page 33: SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology · SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology i n t e l o p Intelop Corporation 4800 Great America Pkwy

intelop

SoC Verification

Page 34: SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology · SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology i n t e l o p Intelop Corporation 4800 Great America Pkwy

intelopEmbedded Processor Cores in SoC

Page 35: SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology · SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology i n t e l o p Intelop Corporation 4800 Great America Pkwy

intelopModels of Embedded Processor

Page 36: SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology · SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology i n t e l o p Intelop Corporation 4800 Great America Pkwy

intelopModels of Embedded Processor

Page 37: SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology · SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology i n t e l o p Intelop Corporation 4800 Great America Pkwy

intelopModels of Embedded Processor

Page 38: SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology · SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology i n t e l o p Intelop Corporation 4800 Great America Pkwy

intelop

Verification with Embedded Processor

Page 39: SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology · SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology i n t e l o p Intelop Corporation 4800 Great America Pkwy

intelop

Verification with Embedded Processor

Page 40: SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology · SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology i n t e l o p Intelop Corporation 4800 Great America Pkwy

intelop

Simultaneous SoC design Flow

Page 41: SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology · SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology i n t e l o p Intelop Corporation 4800 Great America Pkwy

intelop

Tool utilized in HW-SW Co-Verification

Page 42: SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology · SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology i n t e l o p Intelop Corporation 4800 Great America Pkwy

intelop

Tool utilized in Co-Simulation

Page 43: SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology · SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology i n t e l o p Intelop Corporation 4800 Great America Pkwy

intelop

Conclusion

Page 44: SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology · SoC/ASIC/SoC-FPGA/S-ASIC Design and Verification Methodology i n t e l o p Intelop Corporation 4800 Great America Pkwy

intelop

Conclusion

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