sn65lvpe502cp evm

29
SN65LVPE502CP EVM User' s Guide User' s Guide Literature Number: SLLU142A March 2011 Revised May 2011

Upload: dinhkhanh

Post on 02-Jan-2017

260 views

Category:

Documents


1 download

TRANSCRIPT

Page 1: SN65LVPE502CP EVM

SN65LVPE502CP EVM User's Guide

User's Guide

Literature Number: SLLU142A

March 2011–Revised May 2011

Page 2: SN65LVPE502CP EVM

2 SLLU142A–March 2011–Revised May 2011Submit Documentation Feedback

Copyright © 2011, Texas Instruments Incorporated

Page 3: SN65LVPE502CP EVM

Contents

1 Introduction ........................................................................................................................ 7

2 SN65LVPE502CP EVM Configuration ..................................................................................... 91 SN65LVPE502CP EVM Kit Contents ....................................................................................... 92 Description of EVM Board .................................................................................................... 93 Selecting De-Emphasis Level for SN65LVPE502CP ............................................................... 114 Selecting Power for the SN65LVPE502CP EVM ..................................................................... 115 Powering the SN65LVPE502CP EVM Using the USB Host ...................................................... 116 Monitoring the Device Current ............................................................................................ 12

3 PCB Construction .............................................................................................................. 131 SN65LVPE502CP EVM Board Schematics ............................................................................. 132 SN65LVPE502CP EVM Board Layout ................................................................................... 183 SN65LVPE502CP EVM Board Construction ........................................................................... 25Appendix A SN65LVPE502CP EVM Bill of Materials ....................................................................... 27

3SLLU142A–March 2011–Revised May 2011 Table of ContentsSubmit Documentation Feedback

Copyright © 2011, Texas Instruments Incorporated

Page 4: SN65LVPE502CP EVM

www.ti.com

List of Figures

1 SN65LVPE502CP Functional System Level Block Diagram .......................................................... 7

2 SN65LVPE502CP EVM With Jumpers Highlighted (Top Side)....................................................... 9

3 SN65LVPE502CP EVM Location of R1 and JMP9 ................................................................... 11

4 SN65LVPE502CP EVM location of L1, R1, and JMP10 ............................................................. 12

5 SN65LVPE502CP EVM Schematic (High Speed Pins) .............................................................. 14

6 SN65LVPE502CP EVM Schematic (TX and RX Control Pins)...................................................... 15

7 SN65LVPE502CP EVM Schematic (Device Control Pins)........................................................... 16

8 SN65LVPE502CP EVM Schematic (Power and GND Pins)......................................................... 17

9 SN65LVPE502CP EVM Layout Layer 1 (Top) ........................................................................ 19

10 SN65LVPE502CP EVM Layout Layer 2 (GND) ....................................................................... 20

11 SN65LVPE502CP EVM Layout Layer 3 (VCC) ....................................................................... 21

12 SN65LVPE502CP EVM Layout Layer 4 (GND) ....................................................................... 22

13 SN65LVPE502CP EVM Layout Layer 5 (GND) ....................................................................... 23

14 SN65LVPE502CP EVM Layout Layer 6 (Bottom) .................................................................... 24

15 SN65LVPE502CP EVM Layer Stack-Up ............................................................................... 25

List of Tables

1 SN65LVPE502CP EVM Jumper Description and Settings .......................................................... 10

2 SN65LVPE502CP De-Emphasis Selection Table..................................................................... 11

3 Bill of Materials ............................................................................................................ 28

4 List of Figures SLLU142A–March 2011–Revised May 2011Submit Documentation Feedback

Copyright © 2011, Texas Instruments Incorporated

Page 5: SN65LVPE502CP EVM

This is the user's guide for the evaluation module (EVM) of the SN65LVPE502CP. The purpose of thisuser's guide is to facilitate an easy evaluation process of our SN65LVPE502CP USB 3.0 Re-Driver.

The contents of this user's guide are meant to provide an overview of the SN65LVPE502CP, whichincludes highlighting its key features, operating conditions, and how to setup this EVM for use in a systemlevel evaluation.

The construction of the SN65LVPE502CP EVM also serves as a reference design that can be easilymodified for any intended application. Target applications include Notebooks, Desktops, Docking Stations,Backplane, and Cabled applications. Schematic and layout information is included at the end of thismanual.

5SLLU142A–March 2011–Revised May 2011 List of TablesSubmit Documentation Feedback

Copyright © 2011, Texas Instruments Incorporated

Page 6: SN65LVPE502CP EVM

6 List of Tables SLLU142A–March 2011–Revised May 2011Submit Documentation Feedback

Copyright © 2011, Texas Instruments Incorporated

Page 7: SN65LVPE502CP EVM

USB 3.0 Host/Source (Desktop, Laptop, Docking Station, etc.)

SN65LVPE502CP

USB 3.0 Device/Sink (External Hard Drive, Thumb Drive, etc.)

USB 3.0 Type A Receptacle

USB 3.0 Type B Receptacle [INPUT]

USB 3.0 Type A Receptacle [OUTPUT]

USB 3.0 Type B Receptacle

USB 3.0

Type A?B

Cable

USB 3.0

Type A?B

Cable

SLLU142A–March 2011–Revised May 2011

Introduction

The SN65LVPE502CP is a dual channel, single lane USB 3.0 re-driver and signal conditioner supportingdata rates of 5.0Gbps. The device complies with USB 3.0 spec revision 1.0, supporting electrical idlecondition and low frequency periodic signals (LFPS) for USB 3.0 power management modes.

The device offers programmable equalization, de-emphasis and amplitude swing that extends theinterconnect distance between two devices. Also, the device supports two low power modes: Sleep Modeand Low Power when unplugged. The device can also function in USB compliance mode to test thetransmitter for compliance to voltage and timing specifications per USB 3.0 compliance specs.

This EVM was designed to be used as a medium connection between a USB host and a USB device. Theinterface to the EVM consists of a USB 3.0 Type A Receptacle and a USB 3.0 Type B Receptacle.Therefore, in order to connect the EVM to your system set up, you will most likely need two USB 3.0Standard Type A→B cables. Your test setup should look similar to the figure below:

Figure 1. SN65LVPE502CP Functional System Level Block Diagram

7SLLU142A–March 2011–Revised May 2011 IntroductionSubmit Documentation Feedback

Copyright © 2011, Texas Instruments Incorporated

Page 8: SN65LVPE502CP EVM

8 Introduction SLLU142A–March 2011–Revised May 2011Submit Documentation Feedback

Copyright © 2011, Texas Instruments Incorporated

Page 9: SN65LVPE502CP EVM

SLLU142A–March 2011–Revised May 2011

SN65LVPE502CP EVM Configuration

1 SN65LVPE502CP EVM Kit Contents

This EVM kit should contain the following items:

• SN65LVPE502CP EVM board• 9-V DC power supply• This user’s guide

2 Description of EVM Board

The SN65LVPE502CP EVM is designed to provide easy evaluation of the SN65LVPE502CP device. It isalso meant to serve as a reference design to show a practical example of how to use the device in amass-production system. Figure 2 highlights the jumpers installed on this EVM and Table 1 highlights theirfunctionality and configuration.

Figure 2. SN65LVPE502CP EVM With Jumpers Highlighted (Top Side)

9SLLU142A–March 2011–Revised May 2011 SN65LVPE502CP EVM ConfigurationSubmit Documentation Feedback

Copyright © 2011, Texas Instruments Incorporated

Page 10: SN65LVPE502CP EVM

Description of EVM Board www.ti.com

Table 1. SN65LVPE502CP EVM Jumper Description and Settings

JUMPER NUMBER FUNCTIONALITY AND CONFIGURATION

De-emphasis control selector for transmitter channel 1

High = Shunt pins 2 and 1 ["DE1" and "DE1_PU"]JMP1 Low = Shunt pins 2 and 3 ["DE1" and "DE1_PD"]

Mid-Level = Do not install shunt

Refer to Table 2 for actual de-emphasis level

De-emphasis control selector for transmitter channel 2

High = Shunt pins 2 and 1 ["DE2" and "DE2_PU"]JMP2 Low = Shunt pins 2 and 3 ["DE2" and "DE2_PD"]

Mid-Level = Do not install shunt

Refer to Table 2 for actual de-emphasis level

Equalization control selector for receiver channel 1

High (15 dB) = Shunt pins 2 and 1 ["EQ1" and "EQ1_PU"]JMP3

Low (7 dB) = Shunt pins 2 and 3 ["EQ1" and "EQ1_PD"]Mid-Level (0 dB) = Do not install shunt

Equalization control selector for receiver channel 2

High (15 dB) = Shunt pins 2 and 1 ["EQ2" and "EQ2_PU"]JMP4

Low (7 dB) = Shunt pins 2 and 3 ["EQ2" and "EQ2_PD"]Mid-Level (0 dB) = Do not install shunt

Output swing control selector for receiver channel 1

High (1166 mVp-p) = Shunt pins 2 and 1 ["OS1" and "OS1_PU"]JMP5

Low (833 mVp-p) = Shunt pins 2 and 3 ["OS1" and "OS1_PD"]Mid-Level (1000 mVp-p) = Do not install shunt

Output swing control selector for receiver channel 2

High (1166 mVp-p) = Shunt pins 2 and 1 ["OS2" and "OS2_PU"]JMP6

Low (833 mVp-p) = Shunt pins 2 and 3 ["OS2" and "OS2_PD"]Mid-Level (1000 mVp-p) = Do not install shunt

Sleep mode selector for LVPE502

JMP7 High (normal mode) = Do not install shunt

Low (sleep mode) = Install shunt

Compliance mode selector for LVPE502

JMP8 High (compliance mode) = Install shunt

Low (normal mode) = Do not install shunt

Power source selector for LVPE502

JMP9 Wall socket = Shunt pins 2 and 1 ["VIN" and "WALL I/P"]Battery = Shunt pins 2 and 3 ["VIN" and "BATT I/P"]

Test point for measuring current drawJMP10

Read "Monitoring the device current" before using JMP10

Device voltage selector

3 V = Shunt pins 2 and 1 (center pin to "LOW")JMP11

3.3 V = Shunt pins 2 and 3 (center pin to "NOM")3.6 V = Shunt pins 2 and 4 (center pin to "HIGH")

10 SN65LVPE502CP EVM Configuration SLLU142A–March 2011–Revised May 2011Submit Documentation Feedback

Copyright © 2011, Texas Instruments Incorporated

Page 11: SN65LVPE502CP EVM

www.ti.com Selecting De-Emphasis Level for SN65LVPE502CP

3 Selecting De-Emphasis Level for SN65LVPE502CP

The output de-emphasis level of each transmitter channel also depends on the output swing level selectedfor that channel. Table 2 lists all possible de-emphasis levels that can be achieved with theSN65LVPE502CP:

Table 2. SN65LVPE502CP De-Emphasis Selection Table

DE-EMPHASIS LEVEL SELECTOR

and OS Pin = High and OS Pin = Low and OS Pin = Mid-Level

If DE Pin = High -6.1 dB -5.2 dB -6.1 dB

If DE Pin = Low -4.5 dB -2.3 dB -3.6 dB

If DE Pin = Mid-Level 0 dB 0 dB 0 dB

4 Selecting Power for the SN65LVPE502CP EVM

The SN65LVPE502CP EVM kit comes with a 9-V DC power supply that plugs into a wall socket. Analternative option is to use a 9-V battery, which would be placed in the battery compartment on the bottomside of the EVM. Use JMP9 to select which of these two options you would like to use for operating theEVM.

5 Powering the SN65LVPE502CP EVM Using the USB Host

In addition to using a wall socket or battery, a third option exists for selecting the power source to theEVM. All USB 3.0 hosts, devices and cables have a power pin on their connector that is named VBUS.The purpose of this pin is to allow a USB Host to supply power to a USB device through the USB cable.The SN65LVPE502CP EVM gives you the option of powering the SN65LVPE502CP using this pin. Inorder to enable this feature, you must do two things:

1. Remove any battery or external power supply that is connected to the EVM. If left connected theycould back-drive current into your USB Host, rendering your USB host inoperable. Please takecaution.

2. Remove any USB cables connected to the EVM.3. Remove any shunts on JMP9 (see Figure 3).4. Install a 0-Ω, 0805 sized SMT resistor at location R1 (see Figure 3).

Once completed, plug your USB 3.0 Host and Device into the EVM, and you should be able to use thisEVM without the need for a wall socket or battery.

Figure 3. SN65LVPE502CP EVM Location of R1 and JMP9

NOTE: Should you decide to revert back to using a wall socket or battery, it is important to uninstallR1. When R1 is installed, the VBUS power pin connects to the same power plane used bythe wall socket and battery. This allows the wall socket or battery to back-drive current intoyour USB Host via the VBUS power pin. This could potentially render your USB hostinoperable. Please take caution.

11SLLU142A–March 2011–Revised May 2011 SN65LVPE502CP EVM ConfigurationSubmit Documentation Feedback

Copyright © 2011, Texas Instruments Incorporated

Page 12: SN65LVPE502CP EVM

Monitoring the Device Current www.ti.com

6 Monitoring the Device Current

One of the highlights of the SN65LVPE502CP is its power saving modes. To observe these savings inyour device evaluation, the SN65LVPE502CP EVM includes the option of monitoring the current draw ofthe device. In order to enable this feature, the following steps must be taken:

1. Un-install the ferrite bead located at L1, and if present, also uninstall the resistor located at R1 (seeFigure 4).

2. Obtain a power supply with the ability to display its current draw (or connect a current meter in seriesto the power supply) and connect to JMP10 (see Figure 4).

3. Turn on your power supply and observe the measured current on your power supply display (or currentmeter).

Figure 4. SN65LVPE502CP EVM location of L1, R1, and JMP10

In order to revert back to powering the EVM through the wall socket, battery or USB Host, you mustremove the power supply that is currently connected, and re-install the ferrite bead.

12 SN65LVPE502CP EVM Configuration SLLU142A–March 2011–Revised May 2011Submit Documentation Feedback

Copyright © 2011, Texas Instruments Incorporated

Page 13: SN65LVPE502CP EVM

SLLU142A–March 2011–Revised May 2011

PCB Construction

This section discusses the construction of the EVM boards. It includes the board schematics and layoutfiles to show how the board was built.

1 SN65LVPE502CP EVM Board Schematics

This section shows the board schematic sheets for the EVM.

13SLLU142A–March 2011–Revised May 2011 PCB ConstructionSubmit Documentation Feedback

Copyright © 2011, Texas Instruments Incorporated

Page 14: SN65LVPE502CP EVM

Install R1 if you want to power LVPE502 using the USB cable power pin

Layout Note - Match trace width of VBUS_PWR to pin width of VBUS_PWR

Size Document Number Rev Sheet

of

ENGINEER

LAYOUT

RELEASED

DATE

DATE

DATE

SCHEMATIC TITLE

TEXAS INSTRUMENTS

PAGE TITLE

16513033

SN65LVPE502 EVM

N. PATEL

<OrgAddr2>

<OrgAddr3>

<Title1><Title2>

10/18/09

<Date1>

<Date2>

HIGH SPEED PINS

A <Rev>

<Page Title 2>

4

U2

USB3_STANDARD_TYPE_A_RECEPTACLE

VBUS_PWR1

USB2_D_N2

USB2_D_P3

GND4

USB3_TX_N5

USB3_TX_P6

GND17

USB3_RX_N8

USB3_RX_P9

SHIELD_GND110

SHIELD_GND211

U1

USB3_STANDARD_TYPE_B_RECEPTACLE

VBUS_PWR1

USB2_D_N2

USB2_D_P3

GND4

USB3_RX_N5

USB3_RX_P6

GND17

USB3_TX_N8

USB3_TX_P9

SHIELD_GND110

SHIELD_GND211

HOST_USB3.0_TX_N

HOST_USB3.0_TX_P

USB3.0_TX1_N

USB3.0_TX1_P

DEVICE_USB3.0_RX_N

DEVICE_USB3.0_RX_P

DEVICE_USB3.0_TX_N

DEVICE_USB3.0_TX_P

VBUS_PWR

USB2.0_D_N

USB2.0_D_P

R10_DNI

Vin

HOST_USB3.0_RX_P

USB3.0_TX2_P

HOST_USB3.0_RX_N

USB3.0_TX2_NC1 0.1 uF

C2 0.1 uF

C6 0.1 uF

C8 0.1 uF

U3A

LVPE502

TX2_P12

TX2_N11

RX1_P9

RX1_N8

RX2_P19

RX2_N20

TX1_P22

TX1_N23

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SN65LVPE502CP EVM Board Schematics www.ti.com

Figure 5. SN65LVPE502CP EVM Schematic (High Speed Pins)

14 PCB Construction SLLU142A–March 2011–Revised May 2011Submit Documentation Feedback

Copyright © 2011, Texas Instruments Incorporated

Page 15: SN65LVPE502CP EVM

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

A <REV>6525543

EQ CONTROLPINS

2 4REV PAG EDO C UM ENT NUM BE RSIZE

of

TEXAS INSTRUMENTS

PA GE TITLE

J M P6

Header 3x 1

1

R 4

4.98 K

R 8

4.98 K

R11

4.98 K

U 3B

SN 65LV PE502CP

DE 13

EQ 12

O S14

DE216

EQ217

OS215

J M P5

Header 3x1

1

J M P4

Header 3x 1

1

R 10

4.98 K

J M P1

Header 3x1

1

R 7

4.98 K

R13

4.98 K

J M P2

Header 3x 1

1

R 12

4.98 K

R 3

4.98 K

J M P3

Header 3x1

1

R9

4.98 K

R 2

4.98 K

R 6

4.98 K

R 5

4.98 K

D E1_ PU

D E1_ PD

E Q1_ PU

E Q1_ PD

O S1_ PU

O S1_ PD

D E1

O S1

E Q1

DE2_ PU

DE2_ PD

EQ2_ PU

EQ2_ PD

OS2_ PU

OS2_ PD

DE2

OS2

EQ2

3.3V

3.3V

3.3V

3.3V

3.3V

3.3V

All pins on this page have a defaul tset ting ofNC

www.ti.com SN65LVPE502CP EVM Board Schematics

Figure 6. SN65LVPE502CP EVM Schematic (TX and RX Control Pins)

15SLLU142A–March 2011–Revised May 2011 PCB ConstructionSubmit Documentation Feedback

Copyright © 2011, Texas Instruments Incorporated

Page 16: SN65LVPE502CP EVM

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

A <REV>6525543

DEVICECONTROL PINS

3 4REV PAG EDO C UM ENT NUM BE RSIZE

of

TEXAS INSTRUMENTS

PA GE TITLE

JM P 7

H eader 2x 1

1

2

R14

4.98 K DNI

R17

4.98 K DNI

JM P 8

H eader 2x 1

1

2

U3C

SN65LVPE 502C P

EN_ RX D5

CM14

NC7

NC124

EN _ RXD

C M

3.3V

3.3V

CM default value = GND (internally pulled by SN65LVPE502CP)

EN_RXD default value = 3.3 V(internally pulled by SN65LVPE502CP)

SN65LVPE502CP EVM Board Schematics www.ti.com

Figure 7. SN65LVPE502CP EVM Schematic (Device Control Pins)

16 PCB Construction SLLU142A–March 2011–Revised May 2011Submit Documentation Feedback

Copyright © 2011, Texas Instruments Incorporated

Page 17: SN65LVPE502CP EVM

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

A <REV>6525543 4 4REV PAG EDO C UM ENT NUM BE RSIZE

of

TEXAS INSTRUMENTS

PA GE TITLE

U 4

REG 104

Vin1

Vout2

G ND 13

NR/Adjus t4

E nable5

GN D26

C20

22uf

C9

1.0uF

D1

40V 1A

C1

A2

C14

100uF

tant_ d

12

C21

10uf

C 23

1.0uF

U3E

SN65LVPE 502C P

GND6

GND 110

GND 218

GND 321

GND _P AD25

J1

Battery Holder 9V

+

-9V

C19

47uf

C25

0.01uF

C 12

22u

tant_ c

12

C26

4.7uF

C 24

0.1uF

R18

250

C16

1.0uF

R 21

64.9k

C18

0.01uF

C 22

1.0uF

R20

23.2k

C17

0.1uF

C13

10u

tant_c

12

P1

RA PC722

SILK = +9V

SLE

EV

E1

SH

UN

T2

TIP

3

C 11

220u

tant_ d

12

C 15

1.0uF

J M P9

H eader 3x 1

1

J M P11

Header T 4P in

1

4

U3D

SN 65LV PE502CP

VCC1

VCC113

R19

150k

C10

220u

tant_ d

12

R22

13k

JM P10

H eader 2x 1

1

2

L1

H I1206N 101R -00

1210

1 2

D2

Green

H IGH _ VCC

N OM _ VCC

LO W_ VC C

PRE -IN

WALL_ INPU T

BA TTERY _IN PUT

LED _IN DIC ATOR

V in

Vin 3.3V

3.3V _R EG

3.3V 3.3V

3.3V

3.3V

Place near L1

P lace under DUT near pin VCC

Place under DUT near pin VCC1

USE JMP9 TO SELECT POWER SOURCE:

1. WALL (SHUNT CENTER PIN TO PIN 1)

2. BATTERY (SHUNT CENTER PIN TO PIN 3)

3. USB CABLE(NO SHUNT & R1 INSTALLED)

LVPE502 IN ACTIVE MODE AND ALPMODE:

USE JM P11 TO SELECT DEVICE VOLTAGE:

1. 3.0 V - SHUNT PINS 2 AND 1

2. 3.3 V - SHUNT PINS 2 AND 3

3. 3.6 V - SHUNT PINS 2 AND 4

www.ti.com SN65LVPE502CP EVM Board Schematics

Figure 8. SN65LVPE502CP EVM Schematic (Power and GND Pins)

17SLLU142A–March 2011–Revised May 2011 PCB ConstructionSubmit Documentation Feedback

Copyright © 2011, Texas Instruments Incorporated

Page 18: SN65LVPE502CP EVM

SN65LVPE502CP EVM Board Layout www.ti.com

2 SN65LVPE502CP EVM Board Layout

This EVM was designed to show the implementation of this device on a 6-layer board.

18 PCB Construction SLLU142A–March 2011–Revised May 2011Submit Documentation Feedback

Copyright © 2011, Texas Instruments Incorporated

Page 19: SN65LVPE502CP EVM

U3

D1

D2

L1

U4

C12

C13

C10

C11

C14

P1

R1

R6

R5

R10

R11

R12 R13

R2

R3

R4

R7

R8 R9

R14

R17

R18

R19

R20

R21

R22

C1

C2

C3

C4

C5

C6

C7

C8

JMP10

JMP7 JMP8

C26

C9

+

C19

C20

C21

JMP1 JMP2

JMP3 JMP4

JMP5 JMP6

JMP9

JMP11

OUTPUT

INPUT

3P3V

WALL I/P

BATT I/P

VIN

GND

3P3V

NOM

HIGH

LOW

CM

EN_RXD

OS2_PD

OS2

OS2_PU

DE2_PD

DE2

DE2_PU

EQ2_PD

EQ2

EQ2_PU

OS1_PD

OS1_PU

OS1

EQ1_PD

EQ1_PU

EQ1

DE1_PU

DE1_PD

DE1

9V

1

6525543

SN65LVPE502CP EVM

www.ti.com SN65LVPE502CP EVM Board Layout

Figure 9. SN65LVPE502CP EVM Layout Layer 1 (Top)

19SLLU142A–March 2011–Revised May 2011 PCB ConstructionSubmit Documentation Feedback

Copyright © 2011, Texas Instruments Incorporated

Page 20: SN65LVPE502CP EVM

SN65LVPE502CP EVM Board Layout www.ti.com

Figure 10. SN65LVPE502CP EVM Layout Layer 2 (GND)

20 PCB Construction SLLU142A–March 2011–Revised May 2011Submit Documentation Feedback

Copyright © 2011, Texas Instruments Incorporated

Page 21: SN65LVPE502CP EVM

www.ti.com SN65LVPE502CP EVM Board Layout

Figure 11. SN65LVPE502CP EVM Layout Layer 3 (VCC)

21SLLU142A–March 2011–Revised May 2011 PCB ConstructionSubmit Documentation Feedback

Copyright © 2011, Texas Instruments Incorporated

Page 22: SN65LVPE502CP EVM

SN65LVPE502CP EVM Board Layout www.ti.com

Figure 12. SN65LVPE502CP EVM Layout Layer 4 (GND)

22 PCB Construction SLLU142A–March 2011–Revised May 2011Submit Documentation Feedback

Copyright © 2011, Texas Instruments Incorporated

Page 23: SN65LVPE502CP EVM

www.ti.com SN65LVPE502CP EVM Board Layout

Figure 13. SN65LVPE502CP EVM Layout Layer 5 (GND)

23SLLU142A–March 2011–Revised May 2011 PCB ConstructionSubmit Documentation Feedback

Copyright © 2011, Texas Instruments Incorporated

Page 24: SN65LVPE502CP EVM

U2

U1

+-

J1

C15

C16 C17 C25

C24 C23

C22

C18

OUTPUT

INPUT

SN65LVPE502CP EVM Board Layout www.ti.com

Figure 14. SN65LVPE502CP EVM Layout Layer 6 (Bottom)

24 PCB Construction SLLU142A–March 2011–Revised May 2011Submit Documentation Feedback

Copyright © 2011, Texas Instruments Incorporated

Page 25: SN65LVPE502CP EVM

www.ti.com SN65LVPE502CP EVM Board Construction

3 SN65LVPE502CP EVM Board Construction

The SN65LVPE502CP EVM board is a 6-layer board constructed of FR4 – TurboClad 370 material. Theboard stackup consists of a signal layer on top, a ground layer, a power layer, two ground layers and asignal layer on bottom.

If you require the SN65LVPE502CP and your USB 3.0 connector on the same surface of your systemboard, you will need to use vias on one of your high-speed USB lines. However, you can avoid the use ofvias to connect the SN65LVPE502CP and your USB 3.0 connector if you follow these steps:

1. The SN65LVPE502CP and your USB 3.0 connector are placed on opposite surfaces of your systemboard.

2. Have the TX2± and RX1± side of the SN65LVPE502CP directly face your USB 3.0 connector.3. Route your USB 3.0 connector to TX2± and RX1± of the SN65LVPE502CP.

To compensate for our specific Board Fabricator’s process, we targeted impedance that is slightly lessthan 45 Ω single-ended to yield a board whose actual impedance is as close to 45 Ω single-ended aspossible. Check with your board fabricator for their specific recommendations when determining theproper trace width and core thickness. A differential routing scheme that creates a 90-Ω impedancebetween the differential traces could have also been implemented equally as well with this device.

Figure 15. SN65LVPE502CP EVM Layer Stack-Up

NOTE: In order to achieve the desired impedance, it is recommended that you consult your boardmanufacturer for their process and design requirements.

25SLLU142A–March 2011–Revised May 2011 PCB ConstructionSubmit Documentation Feedback

Copyright © 2011, Texas Instruments Incorporated

Page 26: SN65LVPE502CP EVM

26 PCB Construction SLLU142A–March 2011–Revised May 2011Submit Documentation Feedback

Copyright © 2011, Texas Instruments Incorporated

Page 27: SN65LVPE502CP EVM

www.ti.com Appendix A

Appendix A SN65LVPE502CP EVM Bill of Materials

This appendix contains the SN65LVPE502CP EVM BOM (see Table 3).

27SLLU142A–March 2011–Revised May 2011 SN65LVPE502CP EVM Bill of MaterialsSubmit Documentation Feedback

Copyright © 2011, Texas Instruments Incorporated

Page 28: SN65LVPE502CP EVM

Appendix A www.ti.com

Table 3. Bill of Materials

Item Quantity Value Reference Manufacturer Part Number

1 4 0.1µF C1, C2, C6, C8 Venkel C0201X5R6R3-104KNE

2 2 0.01µF C18, C25 Venkel C0402X7R500-103KNE

3 2 0.1µF C17, C24 Venkel C0402X7R160-104KNE

4 5 1.0µF C9, C15, C16, C22, C23 Venkel C0402X5R6R3-105KNE

5 1 4.7µF C26 Venkel C0603X5R6R3-475KNE

6 1 10µF C21 Venkel C1206X7R160-106KNE

7 1 22µF C20 Murata Electronics North America GRM32ER71C226KE18L

8 1 47µF C19 Taiyo Yuden EMK325BJ476MM-T

9 1 10µF C13 Kemet T491C106K016AT

10 1 22µF C12 Kemet T494C226K025AT

11 1 100µF C14 Kemet T495X107K025ZTE150

12 2 220µF C10, C11 Kemet B45197A3227K509

13 1 13.0K R22 Venkel CR0603-10W-1302FT

14 1 150K R19 Venkel CR0603-16W-1503FT

15 1 23.2K R20 Panasonic - Ecg ERJ-3EKF2322V

16 1 249 R18 Yageo America RC0603FR-07249RL

17 12 4.99K R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, R13 Venkel CR0603-16W-4991FT

18 1 64.9K R21 Panasonic - Ecg ERJ-3EKF6492V

19 1 100 L1 Steward HI1206N101R-10

20 1 1N5819HW-7-F D1 Diodes Inc 1N5819HW-7-F

21 1 LED - Green Clear D2 Lite-On Inc LTST-C170KGKT

22 1 SN65LVPE502CP U3 Texas Instruments SN65LVPE502CP

23 1 REG104GA-A U4 Texas Instruments REG104GA-A

24 7 1 X 3 JMP1, JMP2, JMP3, JMP4, JMP5, JMP6, JMP9 Samtec HTSW-150-07-G-S

25 3 1 X 2 JMP7, JMP8, JMP10 Samtec HTSW-150-07-G-S

26 1 1 X 1 JMP11 Samtec HTSW-150-07-G-S

27 1 1 X 3 JMP11 Samtec HTSW-150-07-G-S

28 1 USB 3.0 - A Type U1 Main Super Enterprises Co., Ltd. AK2SA009K1

29 1 USB 3.0 - B Type U2 Main Super Enterprises Co., Ltd. AK4AA009K1

30 1 Power Jack P1 Cui Inc PJ-002AH

31 1 1294 J1 Keystone Electronics 1294

32 10 Shunt NOTE Kobiconn 151-8000-E

33 6 4-40/0.25" Screws Building Fasteners PMSSS 440 0025 PH

34 2 0.75" Standoff Keystone Electronics 2029

35 4 4/40 Nut Nuts for Battery Holder Building Fasteners HNZ440

36 2 DNI R14, R17

37 1 DNI R1

28 SN65LVPE502CP EVM Bill of Materials SLLU142A–March 2011–Revised May 2011Submit Documentation Feedback

Copyright © 2011, Texas Instruments Incorporated

Page 29: SN65LVPE502CP EVM

IMPORTANT NOTICE

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements,and other changes to its products and services at any time and to discontinue any product or service without notice. Customers shouldobtain the latest relevant information before placing orders and should verify that such information is current and complete. All products aresold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.

TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standardwarranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except wheremandated by government requirements, testing of all parameters of each product is not necessarily performed.

TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products andapplications using TI components. To minimize the risks associated with customer products and applications, customers should provideadequate design and operating safeguards.

TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right,or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Informationpublished by TI regarding third-party products or services does not constitute a license from TI to use such products or services or awarranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectualproperty of the third party, or a license from TI under the patents or other intellectual property of TI.

Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompaniedby all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptivebusiness practice. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additionalrestrictions.

Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids allexpress and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is notresponsible or liable for any such statements.

TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would reasonablybe expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governingsuch use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, andacknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their productsand any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may beprovided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products insuch safety-critical applications.

TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products arespecifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet militaryspecifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely atthe Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use.

TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products aredesignated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designatedproducts in automotive applications, TI will not be responsible for any failure to meet such requirements.

Following are URLs where you can obtain information on other Texas Instruments products and application solutions:

Products Applications

Audio www.ti.com/audio Communications and Telecom www.ti.com/communications

Amplifiers amplifier.ti.com Computers and Peripherals www.ti.com/computers

Data Converters dataconverter.ti.com Consumer Electronics www.ti.com/consumer-apps

DLP® Products www.dlp.com Energy and Lighting www.ti.com/energy

DSP dsp.ti.com Industrial www.ti.com/industrial

Clocks and Timers www.ti.com/clocks Medical www.ti.com/medical

Interface interface.ti.com Security www.ti.com/security

Logic logic.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense

Power Mgmt power.ti.com Transportation and www.ti.com/automotiveAutomotive

Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video

RFID www.ti-rfid.com Wireless www.ti.com/wireless-apps

RF/IF and ZigBee® Solutions www.ti.com/lprf

TI E2E Community Home Page e2e.ti.com

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265Copyright © 2011, Texas Instruments Incorporated