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Second EditionSecond Edition

A. Anand KumarA. Anand Kumar

Pulse and Digital Circuits

Pulse and Digital Circuits

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PULSE AND DIGITAL CIRCUITSSECOND EDITION

A. ANAND KUMARDean

K.L. UniversityVijayawada, Andhra Pradesh

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PULSE AND DIGITAL CIRCUITS, 2nd ed.A. Anand Kumar

© 2008 by PHI Learning Private Limited, New Delhi. All rights reserved. No part of this book maybe reproduced in any form, by mimeograph or any other means, without permission in writing fromthe publisher.

ISBN-978-81-203-3356-7

The export rights of this book are vested solely with the publisher.

Fifteenth Printing (Second Edition) ... ... ... January, 2011

Published by Asoke K. Ghosh, PHI Learning Private Limited, M-97, Connaught Circus, New Delhi-110001and Printed by Jay Print Pack Private Limited, New Delhi-110015.

KopyK

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my parentsShri A. Nagabhushanam and Smt. A. Ushamani

(Freedom Fighters)

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Preface xi

1. LINEAR WAVE SHAPING 1–103

1.1 The Low-Pass RC Circuit 11.1.1 Sinusoidal Input 21.1.2 Step-Voltage Input 31.1.3 Pulse Input 51.1.4 Square-Wave Input 71.1.5 Ramp Input 91.1.6 Exponential Input 11

1.2 The Low-Pass RC Circuit as an Integrator 121.3 The High-Pass RC Circuit 31

1.3.1 Sinusoidal Input 311.3.2 Step Input 331.3.3 Pulse Input 331.3.4 Square-Wave Input 341.3.5 Ramp Input 381.3.6 Exponential Input 39

1.4 The High-Pass RC Circuit as a Differentiator 421.5 Double Differentiation 431.6 Attenuators 65

1.6.1 Application of Attenuator as a CRO Probe 691.7 RL Circuits 761.8 RLC Circuits 77

1.8.1 RLC Series Circuit 771.8.2 RLC Parallel Circuit 79

1.9 Ringing Circuit 80Short Questions and Answers 81Review Questions 88Fill in the Blanks 89Objective Type Questions 91Problems 100

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2. NONLINEAR WAVE SHAPING 104–195

2.1 Clipping Circuits 1042.1.1 Diode Clippers 1042.1.2 Shunt Clippers 1052.1.3 Series Clippers 1082.1.4 Clipping at Two Independent Levels 1142.1.5 Series and Shunt Noise Clippers 1182.1.6 Compensation for Variation of Temperature 1202.1.7 Transistor Clippers 1212.1.8 Emitter-Coupled Clipper 1242.1.9 Comparators 148

2.2 Clamping Circuits 1502.2.1 The Clamping Operation 1502.2.2 Negative Clamper 1512.2.3 Positive Clamper 1532.2.4 Biased Clamping 1542.2.5 Clamping Circuit Taking Source and

Diode Resistances into Account 1562.2.6 Clamping Circuit Theorem 1612.2.7 Practical Clamping Circuit 1632.2.8 Effect of Diode Characteristics on Clamping Voltage 1652.2.9 Synchronized Clamping 1672.2.10 Design of a Clamping Circuit 175

Short Questions and Answers 181Review Questions 185Fill in the Blanks 186Objective Type Questions 188Problems 191

3. SWITCHING CHARACTERISTICS OF DEVICES 196–222

3.1 Junction Diode—Switching Times 1963.2 Piece-Wise Linear Diode Characteristics 2003.3 Breakdown in p-n Junction Diodes 2003.4 Transistor as a Switch 2023.5 Transistor Switching Times 2033.6 Breakdown Voltages of a Transistor 2043.7 The Transistor Switch in Saturation 2073.8 Temperature Sensitivity of Saturation Parameters 2093.9 Design of Transistor Switch 209Short Questions and Answers 216Review Questions 219Fill in the Blanks 219Objective Type Questions 221

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4. MULTIVIBRATORS 223–331

4.1 Bistable Multivibrator 2244.2 A Fixed-Bias Bistable Multivibrator 2244.3 A Self-Biased Transistor Binary 2404.4 Commutating Capacitors 2524.5 A Non-Saturating Binary 2534.6 Triggering the Binary 2544.7 Triggering Unsymmetrically through a Unilateral Device (Diode) 2564.8 Triggering Symmetrically through a Unilateral Device 2574.9 A Direct-Connected Binary 2594.10 The Emitter-Coupled Binary (the Schmitt Trigger Circuit) 2604.11 Monostable Multivibrator 2794.12 The Collector Coupled Monostable Multivibrator 2794.13 The Emitter-Coupled Monostable Multivibrator 2954.14 Triggering the Monostable Multivibrator 2974.15 Astable Multivibrator 2984.16 The Collector-Coupled Astable Multivibrator 2984.17 The Emitter-Coupled Astable Multivibrator 312Short Questions and Answers 316Review Questions 322Fill in the Blanks 323Objective Type Questions 325Problems 330

5. TIME-BASE GENERATORS 332–388

5.1 General Features of a Time-Base Signal 3325.2 Methods of Generating a Time-Base Waveform 3345.3 Exponential Sweep Circuit 3355.4 Unijunction Transistor 3385.5 Sweep Circuit Using UJT 3405.6 Sweep Circuit Using a Transistor Switch 3475.7 A Transistor Constant-Current Sweep 3485.8 Miller and Bootstrap Time-Base Generators—Basic Principles 3505.9 The Transistor Miller Time-Base Generator 3555.10 The Transistor Bootstrap Time-Base Generator 3565.11 Current Time-Base Generators 3735.12 A Simple Current Sweep 3735.13 Linearity Correction Through Adjustment of Driving Waveform 3745.14 A Transistor Current Time-Base Generator 377Short Questions and Answers 380Review Questions 383Fill in the Blanks 384Objective Type Questions 385Problems 387

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6. SYNCHRONIZATION AND FREQUENCY DIVISION 389–406

6.1 Pulse Synchronization of Relaxation Devices 3896.2 Frequency Division in the Sweep Circuit 3916.3 Other Astable Relaxation Circuits 3926.4 Monostable Relaxation Circuits as Dividers 3966.5 Phase Delay and Phase Jitters 3986.6 Synchronization of a Sweep Circuit with Symmetrical Signals 3996.7 Sine Wave Frequency Division with a Sweep Circuit 401Short Questions and Answers 402Review Questions 404Fill in the Blanks 404Objective Type Questions 405

7. SAMPLING GATES 407–430

7.1 Basic Operating Principles of Sampling Gates 4077.2 Unidirectional Diode Gate 4087.3 Unidirectional Diode Gates to Accommodate More than

One Input Signal 4107.4 Bidirectional Sampling Gates Using Transistors 4127.5 Reduction of Pedestal in a Gate Circuit 4147.6 Bidirectional Diode Sampling Gate 4157.7 Four-Diode Sampling Gate 4197.8 Four-Diode Gate (Alternative Form) 4207.9 Six-Diode Sampling Gate 4237.10 Applications of Sampling Gates 4247.11 Chopper Amplifier 4247.12 Sampling Scope 426Short Questions and Answers 427Review Questions 429Fill in the Blanks 429Objective Type Questions 430

8. LOGIC GATES 431–463

8.1 The Basic Gates 4328.1.1 The OR Gate 4328.1.2 The AND Gate 4358.1.3 The NOT Gate (Inverter) 438

8.2 The Universal Gates 4398.2.1 The NAND Gate 4398.2.2 The NOR Gate 443

8.3 The Derived Gates 4468.3.1 The Exclusive-OR (X-OR) Gate 4468.3.2 The Exclusive-NOR (X-NOR) Gate 447

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8.4 Inhibit Circuits 4488.5 Pulsed Operation of Logic Gates 453Short Questions and Answers 456Review Questions 459Fill in the Blanks 460Objective Type Questions 461Problems 463

9. LOGIC FAMILIES 464–494

9.1 Digital IC Specification Terminology 464 9.2 Logic Families 465 9.3 Transistor Transistor Logic (TTL) 465

9.3.1 Two-Input TTL NAND Gate (Standard TTL) 4669.3.2 Totem-Pole Output 4679.3.3 Open-Collector Gates 4689.3.4 Tri-State (3-State) TTL 4699.3.5 Schottky TTL 470

9.4 Integrated Injection Logic (IIL or I2L) 4709.4.1 I2L Inverter 4719.4.2 I2L NAND Gate 4719.4.3 I2L NOR Gate 472

9.5 Emitter-Coupled Logic (ECL) 4729.5.1 ECL OR/NOR Gate 473

9.6 Metal Oxide Semiconductor (MOS) Logic 4759.6.1 Symbols and Switching Action of NMOS and PMOS 4759.6.2 Resistor 4769.6.3 NMOS Inverter 4769.6.4 NMOS NAND Gate 4779.6.5 NMOS NOR Gate 478

9.7 Complementary Metal Oxide Semiconductor (CMOS) Logic 4799.7.1 CMOS Inverter 4799.7.2 CMOS NAND Gate 4809.7.3 CMOS NOR Gate 4819.7.4 Transmission Gate 482

9.8 Dynamic MOS Logic 4839.8.1 Dynamic MOS Inverter 4849.8.2 Dynamic MOS NAND Gate 4859.8.3 Dynamic MOS NOR Gate 486

Short Questions and Answers 487Review Questions 491Fill in the Blanks 492Objective Type Questions 493

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10. BLOCKING OSCILLATORS 495–517

10.1 Monostable Blocking Oscillator (Base Timing) 49510.2 Monostable Blocking Oscillator (Emitter Timing) 49910.3 Astable Blocking Oscillator (Diode Controlled) 50210.4 Astable Blocking Oscillator (RC Controlled) 51010.5 Applications of Blocking Oscillators 513Short Questions and Answers 513Review Questions 515Fill in the Blanks 516Objective Type Questions 517Problems 517

GLOSSARY 519–526

ANSWERS TO FILL IN THE BLANKS 527–530

ANSWERS TO OBJECTIVE TYPE QUESTIONS 531–532

ANSWERS TO PROBLEMS 533–547

INDEX 549–552

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After nearly thirty years of my experience in the classroom, I have strived to develop thiscomprehensive text on pulse circuitry in order to provide students with a solid groundingin the foundations of analysis and design of pulse and digital circuits. The second editionof this textbook with various new features is suitable for use as one-semester course materialby undergraduate students of Electronics and Communication Engineering, Electrical andElectronics Engineering, Electronics and Instrumentation Engineering, and TelecommunicationEngineering. Appropriate for self-study, the book will also be useful to AMIE and IETEstudents.

The text is organized into 10 chapters. The outline of the book is as follows.When non-sinusoidal signals are transmitted through a linear network, the shape of the

waveform undergoes a change. This process called linear wave shaping is discussed inChapter 1.

Particularly in communication systems, quite often, it is required to remove a part ofthe waveform above or below some reference level. This process is called clipping. In manypulse systems, quite often a dc level is required to be added to a waveform to fix the topor bottom of the waveform at some reference level. This process is called clamping. Clippingand clamping together is called nonlinear wave shaping. Chapter 2 deals with the variousclipping and clamping circuits.

The switching characteristics of junction diodes and transistors as required for a clearunderstanding of the pulse circuits are covered in Chapter 3.

Memory is the basic requirement of all computers. The basic memory element is a flip-flop, i.e. the bistable multivibrator. The monostable multivibrator is the basic gating circuit.The astable multivibrator is used as a master oscillator, and the Schmitt trigger circuit asa basic voltage comparator. The various types of multivibrators are discussed in Chapter 4.

Time-base generators are essential for display of signals on the screen. Voltage andcurrent time-base generators are presented in Chapter 5.

A large pulse and digital system consists of a number of waveform generators whichneed to be synchronized with or without frequency division. Synchronization and frequencydivision of various generators with pulse type as well as symmetrical signals are the topicstreated in Chapter 6.

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When signals are to be transmitted only for specified intervals of time and are to beblocked during other intervals of time, we require sampling gates. Various types of samplinggates are explained in Chapter 7.

Logic gates are the fundamental building blocks of any digital system. Realization oflogic gates using diodes and transistors is discussed in Chapter 8.

Most of the logic gates, flip-flops, counters, shift registers, arithmetic circuits, encoders,decoders, etc. are available in several digital families. The TTL, ECL, IIL, MOS and CMOSclass of logic families are discussed in Chapter 9.

When pulses of very large peak power are to be generated, we require blocking oscillators.Several types of monostable and astable blocking oscillators are discussed in Chapter 10.

A large number of design examples have been worked out to help students understandeach new concept or analysis method as it is introduced. Extensive short questions andanswers and also review questions are included at the end of each chapter to enable thestudents to prepare for examinations confidently. Fill-in-the-blank type questions, objectivetype multiple choice questions and numerical problems are provided at the chapter-ends toenable students to build a clear understanding of the subject matter discussed in the text andalso to assess their learning. Answers to fill-in-the-blanks, objective type questions andnumerical problems are given at the end of the book. Most of the solved and unsolvedproblems presented in this book have been classroom tested.

I express my profound gratitude to all those individuals without whose assistance andcooperation this book would not have been completed. First of all, I thank Sri. V. SrinivasaRao, Technician of Adam’s Engineering College, Palvancha who typed the entire originalmanuscript and drew all the figures in this book. I also thank Mr. P. Venkateswara Rao ofour college for helping me in the revision of this book.

I am grateful to Mr. Burugupalli Venugopala Krishna, Chairman Sasi Educational Society,Velivennu for encouraging and providing me with all the facilities for the revision of this book.I also thank Mr. B. Ravi Kumar, our Executive Director, for his cooperation.

I thank Mr. Koneru Satyanarayana, Chancellor, K.L. University, Vijayawada, AP for hisconstant encouragement.

I express my sincere appreciation to my brother Mr. A. Vijaya Kumar and to my friends,Dr. K. Koteswara Rao, Chairman, Gowtham Educational Society, Gudivada and Mr. Y. RameshBabu and Smt. Y. Krishna Kumari of Detroit for their encouragement.

I thank Dr. K. Raja Rajeswari, Professor, ECE Department and Dr. K.S. Lingamurthy,Professor and Head of EEE Department of Andhra University College of Engineering,Visakhapatnam for their constant words of encouragement.

I thank my publishers PHI Learning and their staff, in particular Mr. Darshan Kumar, senioreditor, who edited the manuscript for the first edition and Mr. Sudarshan Das, editor, who madethis second edition possible.

Finally, I am indebted to my wife, A. Jhansi, for putting up with my spending countlesshours working on the manuscript. Our sons Dr. A. Anil Kumar and Mr. A. Sunil Kumar anddaughters-in-law Dr. A. Anureet Kaur and A. Apurupa and granddaughter Khushi supported mewith their constant words of encouragement.

The author will gratefully acknowledge constructive criticism from both students andteachers for further improvement of this book.

A. Anand Kumar

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1Linear Wave Shaping

A linear network is a network made up of linear elements only. A linear network can bedescribed by linear differential equations. The principle of superposition and the principleof homogeneity hold good for linear networks. In pulse circuitry, there are a number ofwaveforms, which appear very frequently. The most important of these are sinusoidal, step,pulse, square wave, ramp, and exponential waveforms. The response of RC, RL, and RLCcircuits to these signals is described in this chapter. Out of these signals, the sinusoidal signalhas a unique characteristic that it preserves its shape when it is transmitted through a linearnetwork, i.e. under steady state, the output will be a precise reproduction of the inputsinusoidal signal. There will only be a change in the amplitude of the signal and there maybe a phase shift between the input and the output waveforms. The influence of the circuiton the signal may then be completely specified by the ratio of the output to the inputamplitude and by the phase angle between the output and the input. No other periodicwaveform preserves its shape precisely when transmitted through a linear network, and inmany cases the output signal may bear very little resemblance to the input signal.

The process whereby the form of a non-sinusoidal signal is altered by transmission througha linear network is called linear wave shaping.

1.1 THE LOW-PASS RC CIRCUIT

Figure 1.1 shows a low-pass RC circuit. A low-pass circuit is a circuit, which transmits onlylow-frequency signals and attenuates or stops high-frequency signals. At zero frequency, the

1

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+

–

R

i t( )

+

–

v to ( )v ti ( ) C

Figure 1.1 The low-pass RC circuit.

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reactance of the capacitor is infinity (i.e. the capacitor acts as an open circuit) so the entireinput appears at the output, i.e. the input is transmitted to the output with zero attenuation.So the output is the same as the input, i.e. the gain is unity. As the frequency increases thecapacitive reactance (XC = 1/2pf C) decreases and so the output decreases. At very highfrequencies the capacitor virtually acts as a short-circuit and the output falls to zero.

1.1.1 Sinusoidal Input

The Laplace transformed low-pass RC circuit is shown in Figure 1.2(a). The gain versusfrequency curve of a low-pass circuit excited by a sinusoidal input is shown in Figure 1.2(b).This curve is obtained by keeping the amplitude of the input sinusoidal signal constant andvarying its frequency and noting the output at each frequency. At low frequencies the outputis equal to the input and hence the gain is unity. As the frequency increases, the outputdecreases and hence the gain decreases. The frequency at which the gain is 1/ 2 (= 0.707)of its maximum value is called the cut-off frequency. For a low-pass circuit, there is nolower cut-off frequency. It is zero itself. The upper cut-off frequency is the frequency (inthe high-frequency range) at which the gain is 1/ 2 , i.e. 70.7%, of its maximum value. Thebandwidth of the low-pass circuit is equal to the upper cut-off frequency f2 itself.

I s( )

RR

1/Cs

+ +

– –

V si( ) V so( )

0 f2 f

0.707

1

| |A

Bandwidth

(a) (b)

Figure 1.2 (a) Laplace transformed low-pass RC circuit and (b) its frequency response.

For the network shown in Figure 1.2(a), the magnitude of the steady-state gain A isgiven by

A = ( )

( )o

i

V s

V s =

1

1+

Cs

RCs

= 1

1 + RCs =

1

1 + j RCw =

1

1 + 2j fRCp

\ |A | = 2

1

1 + (2 )f RCp

At the upper cut-off frequency f2, | A | = 1

2

\ 1

2=

22

1

1 + (2 )f RCp

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Squaring both sides and equating the denominators,

2 = 1 + (2pf2RC)2

\ The upper cut-off frequency, f2 = 1

2 RCp.

So A =

2

1

1 + f

jf

and2

2

1| | =

1 +

Af

f

The angle q by which the output leads the input is given by

−1

2

= tanf

fq

1.1.2 Step-Voltage Input

A step signal is one which maintains the value zero for all times t < 0, and maintains thevalue V for all times t > 0. The transition between the two voltage levels takes place att = 0 and is accomplished in an arbitrarily small time interval. Thus, in Figure 1.3(a),vi = 0 immediately before t = 0 (to be referred to as time t = 0–) and vi = V, immediatelyafter t = 0 (to be referred to as time t = 0+). In the low-pass RC circuit shown inFigure 1.1, if the capacitor is initially uncharged, when a step input is applied, since thevoltage across the capacitor cannot change instantaneously, the output will be zero at t = 0,and then, as the capacitor charges, the output voltage rises exponentially towards the steady-state value V with a time constant RC as shown in Figure 1.3(b).

V

0t

vi

5tt2t1

10%

90%99.3%

t RC= 5

vo

V

0.9V

0.632V

0.1V

0

vi

63.2%

(a) (b)

t RCr = 2.2

t = RC

t t

vo

Figure 1.3 (a) Step input and (b) step response of the low-pass RC circuit.

Let V¢ be the initial voltage across the capacitor.Writing KVL around the loop in Figure 1.1,

1( ) = ( ) + ( ) iv t Ri t i t dt

C ∫Differentiating this equation,

( ) ( ) 1 = + ( )idv t di t

R i tdt dt C

Pulse And Digital Circuits

Publisher : PHI Learning ISBN : 9788120333567 Author : A. Anand Kumar

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