seccamp2012 チューター発表

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  • 1. Open DesignComputer Project

2. @hktechno ( ) 2009 AC2011 ITOpen Design Computer Project 3. 4. FPGA IC(HDL) 5. Open DesignComputer Project FPGA 6. mist32 OS 7. 00000470 : 470: 11 00 03 c0 push rbase 474: 11 00 03 e0 push rret 478: 18 00 03 c0 srspr rbase 32bit 47c: 0e e0 03 a0 lih rtmp,0x0 addr 480: 0d 40 47 a0 wl16 rtmp,0x220 484: 20 70 03 e2 movepcrret,8 488: 14 40 03 a0 b rtmp,#alcall 48c: 08 30 00 01 shr r0,0x1 490: 12 00 03 e0 pop rret 494: 12 00 03 c0 pop rbasereturn 498: 14 40 03 e0 b rret,#al 8. mist32 () 9. NX bit 10. PDTR - ----- - - 11. PDTR KPDTR - - - 12. MIST1032SA + : 81,000 LE : 101,800LE GCC : 3,100 binutils(gas, ld) : 1,800 : 1,500 Newlib : 1,000 13. FPGA ...(^o^) 14. ... DE2-115 OS GCC 15. Web http://open-arch.org/ http://github.com/cpulabs/ http://github.com/techno/ 16. ...Verilog HDL CPU OS 17.