Registers and Counters

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  • Registers and Counters , " ,

  • FF. ( ) "" : "" "" "" "" "" CPU

    - Integers " - Floating PointControl UnitArithmetic Logic UnitALUCURegisters

  • 4-bit

  • SRFFLOAD = 0 LOAD = 1

    CLEAR 4-bit

  • - DFF Load = 0 DFFs

  • " " " ": Select, Mux (ROM)LOAD - CLEAR CPload = 1clear = 1

  • : B, A X. Y.

    ABXABY00000001001010201001030110014100100510101061101107111001

  • " D1AD2BD3D4 XL=1 C=1Y

  • - Shift Registersn n FF:/ () ...MSBLSBMSBLSBMSBLSBMSBLSB Serial Input (SI) Serial Output (SO) (defaults: 0 pos 1 neg )

  • - 4 - SI "" SO "". . B ASO(B) Shift Control cpSOSICPICPIWord Time CPIT1T2T3T4B:A:SO(B):

    00101001110001101011

    10111101111001111011

    01001

  • Serial Shift Register with Parallel Load

  • Serial Input for RIGHT Shift0 00 00 00 10 10 1

  • Serial Input for LEFT Shift1 01 01 01 11 11 1

  • " (1+).DFF : Carry DFF "1" SR-ASR-BFAFFSCXYZQDSIOPcpSIOPcp - /SOSO CP clear

  • - Counters Count Pulse : n i i+1 n 1: 3 000001010011100101110111 , '...

  • TFF TFF . - - least 3

    FFX3X2X1TX3TX2TX1000001001011010001011111100001101011110001111111

  • TX1 = 1TX2 = X1

    TX3 = X1X2

    X1X3X2X1X3X2TXi = Txi-1Xi-1 - i :TX1TQTQTX3TQCount Pulse1TX1O1O2O3TX2TX3TX21X1X2X3

    1111

    11

  • - Count Down 1 0 0 1 "" 000Count Up 1 0 0 1 "" 111

    1111111011011100101110101001100001110110

    0000000100100011010001010110011110001001

  • - /Count UpCount DownTi = Ti-1Qi-1Count UpTi = Ti-1Q'i-1Count DownT1 = 1 "" -

  • Up Counter

  • Down Counter

  • Up-Down Counter

  • 1 00 01 10 010000000

  • JKFF000001 010 100 101 1106 3 :C: 0 1 (Set OR Flip)1 B: 0 0 (Reset OR Stay)0 A: 0 0 (Reset OR Stay)0 J K

    - FFABCJAKAJBKBJCKC000001001011010110100001101011110110

    ABC000001

  • BCAJAJA = B KA = B:BCAKAQJQKQJQKQJQK11cpCBAJB = CKB = 1JC = BKC = 1

    0001111000011

    0001111001001

  • 100000000110100101001010111011

    JAJBJCKAKBKC011110111111110111

  • modulo n: X X+n-1 X+n-1 /RCLCPResetCountLoadClock Pulse

    Reset - CPLOADCOUNT/ 0100 1 1* 1 01

  • 6:RCLCP3 2 1 03 2 1 00Clock11X=001 2 3 4 53 4 5 6 7 8RCLCP3 2 1 03 2 1 0X=3Clock110 0 1 1 "":RCLCP3 2 1 03 2 1 0Clock10 01 2 3 4 56

  • 2M 3 4 5 6 7 8 3 ... S 8 3 4 5 6 7 8 3 ... Load 3Load 3 3 3+6-1=8 8 / 3 .. 8

  • ""S 4 5 6 0 0 ... M 5 6 0 1 ... Master Count-up 5 6Slave Count-up Ends 5 6Direct Preset: M0 S0 ( ): 0 1 2 3 4 5 0 1 2 3 ...

  • JKFF /JQ = XYKQ = XY = (X+Y)S = XYQ " 2 + JKFF + CnanbnCn+1Sn

    Carry Q Q SXYJQKQ000000001010010010011101100011101100110100111110

  • " JKFF J,K JKFF .SISO=XSO=YS SR - ASR - BClearCPQJK

    2001 2001 2001 2001 2001 2001 2001Note, there is a need of two FF to connect the output of the gates back to the inputs. Why? 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001 2001