PIP Update

July 11 2012

Agenda

• Summary Update– Budget/RLS– Current Activities– Upcoming Activities/ Changes

• Update Slides

• High-Power Ferrite Testing Dennis Barak • Booster Cogging Kiyomi Seiya • RFQ Repair & Installation Plans CY Tan

UpdateGeneral Info• Latest Budget Numbers

– No Change (FY13 Department Budgets are due July16 – no word on PIP)

• Labor– Met with Roger – discussed concern over PIP labor (contractors)– Keep an eye on labor changes – impact to schedule!

• RLS Info– Elmie – where are we?

• Shutdown – Comments (Mary)?Task Info (highlights)• RFQ

– Progress being made – CY Tan will talk about this….

• Cavity 7 Refurb – Where are we?• Absorber work continuing – Most (if not all) parts are in…• Linac Modulator Work – • High Power Report (J. Steimel – soon)• LCW – work is underway and so far looks to be on schedule - next slide• Booster Vacuum – PO for blowers has gone out• Booster Transformer – We are proceeding to purchase a new transformer ahead of the PIP

schedule due to potential failure of East Gallery transformer• Linac Transformer – bigger job then expected – FESS/EE continue to investigate

PIP Webpage and Elog• http://www-bd.fnal.gov/cgi-mach/machlog.pl?nb=pip&action=view&page=19&scroll=false&load=

• We should make better use of our elog…– Simple Entries– Pictures– Weekly work summary?

– RFQ has it’s own…..keep separate• Lots of data!

LCWThe LCW is moving along well:

• 95 LCW system drained during the week of July 2• Booster choke leak repairs and choke tube replacement pretty much

finished• Replacing BRF LCW valves as they become available during Booster

RF Cavity refurb.• 55LCW piping has been cut out at the Long 13 absorber site to make

room for the new absorber• 95 LCW piping work at the Long 13 absorber site is in progress• 95 LCW strainers mounted on enclosure walls, need to finish final

hook-ups to 95LCW system• 400 MeV valves and hoses have been replaced• 95LCW return piping to CUB contractor work is ongoing• T&M contractor is looking for aluminum welders to do the 95LCW

isolation valve and pump install work

High power test of ferrite cores – As of the last update

• The high power testing fixture was being worked on at low power– Measuring resonant frequency and Q of the

structure (loaded and unloaded)• The high current PS was in the room, but not

yet connected to the buss inside the high power testing fixture

• The goal was to complete a high power test of an old ferrite core by the end of June

John Reid, Kiyomi Seiya, and Dennis Barak

John Reid, Kiyomi Seiya, and Dennis Barak

High power test of ferrite cores –New updates

• The high current PS has been connected to the center buss and has been tested up to 10-kA– This should be enough bias current for our

purposes• 5-kW RF amp has been installed• An old Stackpole core has been tested up to

3.3-kW with no observable high loss effect• An old Toshiba core was tested this morning at

about 4-kW with no observable high loss effect

John Reid, Kiyomi Seiya, and Dennis Barak

High power test of ferrite cores –What’s next?

• We need more RF power in order to see the high RF loss effect– The current SS amp that is being used can be

swapped with one that has twice as many modules• Compare the observed high RF loss effect with

documentation from the original test that was done decades ago

• Begin high power testing of the new ferrite cores

B+dB

Booster Cogging

Fixed with RPOS feedback

Changed by dipole correctorDipole corrector: 0.009[T-m] @ 24.4[A]

0

50000

100000

150000

200000

250000

300000

350000

400000

0 0.001 0.002 0.003 0.004 0.005 0.006 0.007 0.008

bu

cke

t co

un

ts

Time [sec]

Tim

e

More B field

Less B field

Measurements(1)

Dipole offset and calculated bucket position

Measured bucket position with dipole offset(+4A on 24 dipole correctors at short)

Measured orbit difference with & w/o offset

Measurements(2)

ADC

DAC

FPGA

DSP

MFC board

MFC board

Slot 0 /frontend (Alex) VXI interface to the Acnet

Loader for DSP and FPGA codes to the board

DSP (Craig)Simplify set up parameters for all devices on the boardMemory mappingProtocol for reading and writing parameters and curves.

FPGA (Kiyomi)Cogging algorithmList up parameters for Acnet and DSP

Cable and Setup

Cable (Kent)DC offset to the 24 dipoles at long.

Setup (Kent , Kiyomi)Signal and scope at LLRF room

Plans