PHYSICS 338

Analog Electronics

Laboratory Manual

Fall 2011 Mods C&D

Dr. Adam T. Whitten

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Physics 338 Analog Electronics Lab Manual Fall 2011

Preliminaries

In Physics 200 you learned how to use digital multimeters (DMMs), oscilloscopes, and func-tion generators. There will not be enough time in class or lab to review the fundamental op-erating procedures for these devices, so if you feel you need a refresher on their operation youcan download the Electrical Measurements document at http://www.physics.csbsju.edu/217/electric measurement.pdf and follow the tutorial before starting lab.

For this lab course we will adopt the most common wire color coding convention for analog circuitry:

• black wires are used for 0 V ground connections• red wires are used for +5 V power connections• yellow wires are used for +5-15 V power connections• blue wires are used for −5-15 V power connections• any other color wire is used for signal connections

Note: for analog household wiring (120 V, 60 Hz) black is power and white is ground.

You will be using digital/analog protoboards in lab to build and test circuit. Improper connectionscan cause components to overheat and burn. This costs money, stinks up the lab room, andreleases toxic materials into the air – it is always a good idea to double check your connectionsbefore powering on the protoboard.

Always use the Wavetek function generators, not the function generators built into the protoboards.

The potentiometer (a.k.a. pot or variable resistor) is the most common itemon the protoboard to be destroyed by students. A pot consists of a sweeperarm (denoted by the arrow) that touches a resistive slab at an adjustablelocation, dividing the resistive slab into two ‘resistors’. If the ends of thepot are connected to power and ground (see right), the sweeper samples thevoltage in between the the ends. Pots are labeled with the total slab resistanceR1 + R2, but individual values R1 and R2 are in general unknown. On theprotoboard, the sweeper is connected to the central four holes. If power andground are accidentally connected between the sweeper and an end, then ahuge current will flow when the knob is rotated to small resistances – thisburns off the delicate sweeper end. Never draw appreciable current from asweeper!

Lab Write-ups

Your lab grade will be based on what you record in your Roaring Spring 5x5 quadrille ruled (orequivalent) lab notebook. Please be thorough, complete, and legible! Your lab write-ups for thiscourse will be different from other courses you have taken and will be more informal. You shouldinclude the following items:

1. The title of lab.

2. A brief summary of the goals of the lab (2-4 sentences)

3. A parts list of components used which indicates actual number and type (i.e., 2N3906 pnpbipolar junction transistor, LF411 opamp). Note: Leave extra space to record additional

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chips as required. Also include a listing of capacitor, inductor, and resistor values as well asany diodes (including type) used. Note: this list may change as you work on your circuit.

4. Clear and legible drawings of circuit diagrams as you encounter them in the lab manual.Identify each component using appropriate logic symbols with pins labeled and numbered.For transistors you do not need to number the pins, but be sure to label them. Note thesymbols used for power depend on the component’s fabrication technology – bipolar junctiontransistors use VCC for the positive supply and VEE for the negative supply, whereas junctionfield effect transistors use VDD for the positive supply and VSS for the negative supply

5. Clear timing diagrams/drawings of oscilloscope traces when asked. Use the quadrille rules toline up timing events and make sure to label axes and scales.

6. Make sure to answer all questions as they are encountered in the lab manual.

7. A final reflective paragraph on what you learned should be included at the end.

Lab notebooks are due on 3 days after your scheduled lab period at the beginning of class.

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Physics 217A LAB 1 Fall 2011AC Circuits, Impedance, and Filters

Introduction and Pre-Lab

In this lab you will investigateRC andRLC circuits. You will measure aRC time constant, examinethe behavior of low-pass filter/integrator, examine the behavior of a high-pass filter/differentiator,and investigate the operation of band-pass and notch filters.

Horowitz & Hill pages 29-42 detail the generalization of resistance R to impedance Z for alternatingcurrent (AC) circuits. When the voltage varies sinusoidally with frequency f (ω = 2πf) we canwrite the voltage as:

V = V0 cos(ωt+ ϕ) = Re(V0e

jϕejωt)= Re

(Vejωt

)where V = a+ jb is a complex number with magnitude V0 and phase ϕ:

a = V0 cosϕ = Re(V) b = V0 sinϕ = Im(V) V0 =√

a2 + b2 = |V| = (V V ∗)1/2 tanϕ = b/a

Ohm’s Law now becomes V = IZ (Z is the impedance) which means that |V| = |I|·|Z| and that thephase of Z corresponds to the phase difference between V and I. Each of our passive componentshas an impedance which can introduce a phase shift and may have a frequency dependence. Theseare summarized in the following table:

Component Impedance Phase Shift Frequency Dependence

resistor ZR = R none constantcapacitor ZC = −j/ωC voltage lags current large/small at low/high frequencyinductor ZL = jωL voltage leads current small/large at low/high frequency

These characteristics allow us to construct some simple filters.

Low-Pass Filter/Integrator

The figure to the right depicts a RC low-pass filter orintegrator. The name used to describe it depends onwhether you are interested in the time domain response(integrator) or frequency domain response (filter). How-ever, in order to be a good integrator only frequenciesmuch greater than f−3dB should be applied.

R

CV in V

The analysis is straight-forward for this voltage divider:

I =Vin

Ztot=

Vin

R− (j/ωC)= Vin

R+ (j/ωC)

R2 + 1/ω2C2

V = IZC = VinR+ (j/ωC)

R2 + 1/ω2C2

(−j

ωC

)= Vin

1− jRωC

ω2R2C2 + 1

To get the amplitude, find the absolute value by multiplying by the complex conjugate and takingthe square root:

V = Vin1√

1 + ω2R2C2= Vin

1√1 + ω2/ω2

1

ω1 =1

RC

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To see that this is an integrator, consider a step function applied to the input at time t = 0. Notethat V ≪ Vin when ω ≫ ω1 and we can then write:

I = CdV

dt=

Vin − V

R≈ Vin

R=⇒ V (t) =

1

RC

∫ t

Vin dt+ constant

Since the phase of Vin is arbitrary, it can be taken as a real function giving a phase for V of:

tanϕ =Im(V)

Re(V)=

−ωRC

1= −ωRC

High-Pass Filter/Differentiator

The figure to the right depicts a RC high-pass filter ordifferentiator. The name used to describe it dependson whether you are interested in the time domain re-sponse (differentiator) or frequency domain response (fil-ter). However, in order to be a good differentiator onlyfrequencies much less than f−3dB should be applied.

RC

V in V

Again the analysis is straight-forward for this voltage divider (I was calculated previously):

V = IZR = VinR+ (j/ωC)

R2 + 1/ω2C2R =⇒ V = Vin

1√1 + 1/ω2R2C2

= Vin1√

1 + ω21/ω

2ω1 =

1

RC

To see that this is a differentiator, consider a step function applied to the input at time t = 0. Notethat V ≪ Vin when ω ≪ ω1 and we can then write:

I =V

R= C

d

dt(Vin − V ) ≈ C

dVin

dt=⇒ V = RC

dVin

dt

Again the phase of Vin is arbitrary, so the phase of V is:

tanϕ =Im(V)

Re(V)=

1/ωC

R=

1

ωRC

Band-Pass and Notch Filters

The simplest single pole band-pass and notch filters are shown in the figure below. In practice morethan one pole is used, but working with single poles will allow you to investigate their behavior.

R

CV in VL

R

C

V in V

L

Band-pass Notch

These get analyzed just like any other voltage divider only now there is either a parallel or se-ries combination of L and C. Let Zeff be the effective impedance of the inductor and capacitorcombination.

For the band-pass filter (parallel configuration):

1

Zeff=

1

−j/ωC+

1

jωL= jωC − j/ωL =⇒ Zeff =

j

1/ωL− ωC= jA A =

1

1/ωL− ωC

4

V = VinZeff

R+ Zeff= Vin

jA

R+ jA=⇒ V = Vin

1√1 +R2/A2

and write R/A as:R

A=

R

ωL− ωRC =

ω2

ω− ω

ω1ω2 =

R

Lω1 =

1

RC

which means that for ω ≪ ω1 or for ω ≫ ω2 the output V ≪ Vin and V = Vin when ω0 = 1/√LC.

For the notch filter (series configuration):

Zeff = jωL− j

ωC= jB B = ωL− 1

ωC

V = VinZeff

R+ Zeff= Vin

jB

R+ jB=⇒ V = Vin

1√1 +R2/B2

and write R/B as:

R

B=

R

ωL− 1/ωC=

1

ωL/R− 1/ωRC=

(ω

ω2− ω1

ω

)−1

which means that for ω ≪ ω1 or for ω ≫ ω2 the output V ≈ Vin and V = 0 when ω0 = 1/√LC.

Note that for both filters the phase ϕ depends on the sign of A or B.

Experiment

1. RC Time Constant Measurement

Construct a low-pass filter circuit using R = 10 kΩ and C = 0.01 µF and drive it with a500 Hz square wave. The time constant for discharging (or charging) τ = RC and can bemeasured on an oscilloscope by noting how long it takes the voltage V to fall to V0e

−1 fromits maximum value. Display both Vin and V on the oscilloscope and make a sketch of it inyour lab notebook. Measure τ and compare it to the product RC. Next vary the frequencyof Vin up to 100 kHz and sketch/describe how the output’s magnitude and shape changes.What is the circuit’s input impedance at dc (f = 0 Hz) and infinite frequency?

2. RC Integrator

An input frequency of 100 kHz is much greater than f−3dB = (2πRC)−1, so you are in therange of frequencies where the circuit behaves like an integrator. Demonstrate that this is trueby sketching input and output waveforms for all the different types of waveforms available onthe function generator.

3. Low-pass Filter

Calculate your circuit’s –3dB frequency (i.e., for f−3dB, V = Vin/√2) and verify this value

experimentally with a sine wave input. Set the amplitude of your input sine wave to 1 V andcollect data on attenuation (V/Vin) and phase shift (ϕ = 2π∆t/T ) over a range of frequenciesf/f−3dB = 0.1, 0.2, 0.5, 1, 2, 5, 10, 20, 50, 100. Displaying V and Vin simultaneously on thescope allows you to measure the lag/lead time ∆t. Measuring the amplitudes and period, T ,is straight-forward.

Use the log-log graph paper provided to make a Bode plot of attenuation vs. frequency (i.e.,log(attenuation) vs. log(f/f−3dB)) and check that the slope for f ≫ f−3dB is –20dB/decade(or –6dB/octave). Attach this plot in your lab notebook. Plot ϕ vs. f in your lab notebookand verify that the phase shift at f−3dB is as expected. Does V lag or lead Vin?

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4. High-pass Filter

Reconfigure your R and C components to form a high-pass filter. Measure f−3dB and compareit with the expected value calculated from your component values. Collect attenuation andphase shift data for f/f−3dB = 0.01, 0.02, 0.05, 0.1, 0.2, 0.5, 1.0, 2.0, 5.0, 10. Use the log-log graph paper provided to make a Bode plot of attenuation vs. frequency and check thatthe slope for f ≪ f−3dB is –20dB/decade (or –6dB/octave). Attach this plot in your labnotebook. Plot ϕ vs. f in your lab notebook and verify that the phase shift at f−3dB is asexpected. Does V lag or lead Vin?

5. RC Differentiator

Change your resistor and capacitor components so that R = 100 Ω and C = 100 pF. What isthis circuit’s f−3dB? Drive the circuit with a 100 kHz triangle wave and show that it behavesas a differentiator by sketching the input and output waveforms in your lab notebook. Verifythe differentiation behavior for all the other types of waveforms available on the functiongenerator by sketching the input and output signals.

6. Band-pass Filter

Construct a band-pass filter with R = 10 kΩ, C = 0.01 µF, and L = 10 mH. Calculate f0,f1, and f2 for your circuit (recall ω = 2πf). Using a unit amplitude sine wave as the input,measure the output voltage over an appropriate range of frequencies and sketch the resonancecurve V vs. f . Is the maximum response at the frequency you expect given the componentvalues? Explain. Does the phase change, ϕ, over your range of frequencies correspond towhat you expect? Explain.

7. Notch Filter

Reconfigure your circuit to make a notch filter. Measure the output voltage over an appro-priate range of frequencies and sketch the resonance curve V vs. f . Is the minimum responseat the frequency you expect given the component values? Explain. Does the phase change,ϕ, over your range of frequencies correspond to what you expect? Explain.

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Physics 217A LAB 2 Fall 2011Diodes and Power Supplies

Introduction and Pre-Lab

In this lab you will investigate the conversion of alternating current (AC) to direct current (DC),power supply regulation, diode clamping, and two new scope modes (differential and xy).

Horowitz & Hill pages 44-53 describe diodes andsome of their practical applications. Rectificationis the process of converting AC to DC.

Diodes first convert ±V swings to positive voltage variations. A storage capacitor is then used tosmooth out the variations in voltage. The smoothing is not perfect, however, and the resultant DCvoltage has a ripple ∆V associated with it. ∆V = (I/C)∆t and is roughly a sawtooth wave, so theresulting rms voltage is (∆V is a peak-to-peak value):

Vrms =∆V

2√3=

I∆t

2√3C

For a full-wave rectifier, both the positive and negative portions of the input sine wave are used(pictured above) so ∆t = 1/f . For a half-wave rectifier, only the positive portion of the input sinewave is used so ∆t = 2/f .

Note that the rms voltage depends on how much current is being drawn from the rectifier circuit.The term “dc droop” refers to the reduction in dc voltage due to current draw and it is ≈ 1

2∆V .If the rectification circuit has no resistance (not a valid assumption) then the dc droop would be(I/2C)∆t. A common power supply specification is the “load regulation”, which is the maximumamount of dc droop usually expressed as a percentage of the designed output voltage V0. The loadregulation therefore depends on the maximum designed output current.

Vdc = V0 −∆V

2= V0 −

I∆t

2C

Experiment

1. Half-wave RectifierConstruct the circuit shown to the right using a ∼ 7 Vrms

transformer and a 1 A diode. Use various power resistors,making sure to keep I ⪅ 0.5 A. Suggested values are R =10, 20, 50, 100, 200 Ω. Sketch the output waveform for oneof the resistors as seen on the scope with and without thecapacitor. What value should you use for ∆t?

Use the one DMM to measure the voltage (Keithley preferred because of its smaller uncer-tainty) and a second DMM to measure the current (Metex is okay). For each of your powerresistors measure the current I drawn by the load, the dc output voltage Vdc, and the rmsac ripple voltage Vrip. Use WAPP+ to fit and plot Vrip vs. I and Vdc vs. I. Because yourrectifier has a non-zero output impedance, your may have to fit Vdc to a quadratic expression.Calculate the effective capacitance of your rectifier from the appropriate fit value obtainedfrom the Vrip fit. Use your fits to calculate the ripple and load regulation at I = 1

4 A.

If you double the capacitance, your ripple should be cut in half. Double your capacitance byadding another capacitor and note the effect when you have a 50 Ω power resistor in place.

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2. Full-wave Rectifier

Build either the bridge rectifier or the center-tapped rectifier. Make the same measure-ments, fits, and plots as you did for the half-wave rectifier. What value should you use for∆t? Compare the full-wave rectifier’s ripple and regulation to the half-wave rectifier’s rippleand regulation. Do they compare as expected according to the theory?

3. Power Supply Regulation

Regulators are ICs that reduce the ripple and regulation.Insert a 7805 in between the capacitor and load of yourfull-wave rectifier circuit as shown to the right. KeepingI ≤ 1

4 A, measure the ripple and regulation and comparethem with the unregulated circuit. Check the output on ascope to make sure there are no unwanted oscillations. Fitsand plots are not necessary for the regulated circuit. Why?

4. Diode Clamp

Construct the diode clamp circuit shown to the right and drive it witha ∼1 kHz large amplitude (∼10 V) sine wave. Sketch Vin and V in yourlab notebook and discuss the output. Make a voltage divider from 1 kΩand 2 kΩ resistors and divide the +15 V source to make a +5 V source.Sketch Vin and V in your lab notebook for this new diode clamp and compare it with theprevious diode clamp using the protoboard’s +5 V source. Why is the signal less well clampedwith the new +5 V source? What is the input impedance of each of the +5 V sources? (Hint:Apply Thevenin’s theorem.) Modify your new +5 V source by add a 6.8 µF bypass capacitorfrom the divider point to ground. What is the capacitor’s effect on clamping? Discuss itsoperation.

5. Scope Differential Mode

Construct the ac bridge circuit shown to the right to measure theresstance of a thermistor. Make R = 10 kΩ and use a variable resis-tance box for RA. When RA is equal to the resistance of the thermistor,the the voltages at x and y are the same – this is called a null detector.Connect scope channels 1 & 2 to x & y and put the scope into “x minusy” mode (i.e., in the math menu Operation −).

Both channels should be set to the same scale (VOLTS/DIV). When the math menu is selectedthe scale for the math trace is set by the multipurpose knob and the selected value is displayedas the bottom option in the math menu. Using a 100 kHz sine wave to power the bridge,adjust RA to get a “null” (i.e., ≈ 0 V difference between x and y) to get one value for thethermistor’s resistance. Note that if the temperature of the thermistor changes (pinch it withyour thumb and forefinger), you will no longer have a null reading. Measure the thermistor’sresistance with an ohmmeter and compare the two results. Differential mode is useful formeasuring the voltage across components in a live circuit when you can not apply a ground,but the finite resolution of the scope’s ADC makes null readings suspect.

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6. xy Mode

Construct the circuit shown to the right which plots on thescope the current through a device (y) vs. the voltage acrossit (x). The scope must be in xy mode (in the display menuchoose Format XY).

Use a 60 Hz sine wave from the transformer to drive the circuit so you can set the groundto be between the device and the R = 1 kΩ resistor. x (CH1) is the voltage drop acrossthe device and y (CH2) will be proportional to the current through the device (V = −IR).You get positive y-values for positive currents by inverting CH2 (on the ch2 menu selectInvert On). Observe the I–V characteristics of a 100 Ω resistor, a Si diode, a Ge diode, anda Si zener diode. Sketch the curves obtained, record the scope’s settings, and explain eachelement’s behavior. What are the “turn on” voltages for the Si and Ge diodes? What is thezener (breakdown) voltage for the Si zener diode?

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Physics 338 LAB 3 Fall 2011Bipolar Junction Transistors

Introduction and Pre-Lab

Characteristic Curves and Load LinesThe below figure shows the characteristic curves for a bipolar junction transistor (BJT) along withthe load line for the simple common-emitter amplifier (RE = 0). What is the collector resisitorvalue, RC , and supply voltage, VCC , implied by this load line? Focus on the operating point Q fora base current of IB = 20 µA. Note that the collector current IC at this operating point is about2.7 mA. Recall that the current gain β = hfe is:

hfe =∂IC∂IB

≈ ∆IC∆IB

∣∣∣∣VCE=const

=2.7 mA− 1.2 mA

20 µA− 10 µA= 150

where 1.2 mA comes from where the dashed line intersects the 10 µA curve.

If a signal input swings the base current by ±10 µA (indicated by the dotted lines), then thecollector-to-emitter voltage VCE will have a range of about 7.1 ± 4.3 V. While the current gainis known to be β = 150, the voltage gain GV = ∆Vout/∆Vin = ∆VC/∆VB depends in the inputimpedance. Therefore, we would like to know what input voltage swing will cause the base currentto change by ±10 µA. The base-emitter resistance re depends on the collector current as derivedfrom the Ebers-Moll equation:

re =(kT/q)

IC≈ 25 mV

IC(mA)=

25

ICΩ for IC in mA

For the operating point Q, IC = 2.7 mA giving re = 9.3 Ω. The input impedance is then approxi-mately Zin ≈ βre = (150)(9.3 Ω) = 1.4 kΩ. Finally GV can be calculated:

∆VC = −∆ICRC = −β∆IBRC = −β∆VB

ZinRC = −∆VB

βRC

βre=⇒ GV =

∆VC

∆VB= −RC

re≈ −300

Verify this voltage gain by calculating it to 2 significant digits using you derived collector resis-tor value RC from above. Remember that common-emitter amplifiers with RE = 0 suffer fromnon-linearity and varying Zin making them difficult to bias, so we should always use an “emitterdegeneration” circuit with RE = 0.

0 2 4 6 8 10 12 14

0.000

0.001

0.002

0.003

0.004

0.005

0.006

0.007

Ic (A)

Vce (V)

10 µA

2N3904 Transistor Characteristic Curve with Load Line

Q 20 µA

30 µA

IB

RC

VCC

outV

CI

BV

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Biasing and Blocking CapacitorsThe grounded common-emitter amplifier under consideration requires a base current of 20 µA toset the operating point Q. This is accomplished by using a voltage divider to set the base voltageVB one diode drop above the emitter voltage VE (in this case VE = 0). This is called “biasing”the transistor to set up its quiescent state. In this particular example VB ≈ 0.6 V and VC ≈ 7.1 Vin the quiescent state. When signals are applied to the base, they must have any dc componentsremoved so as not to alter this quiescent state. Therefore blocking capacitors are required to coupleac signals to the transistor. The choice of capacitance value depends mostly on the impedance ofthe voltage divider used to bias the transistor, Zdiv, and may depend on the input impedance ofthe transistor Zin (also called hie in datasheets). In order to minimize the effects of Zin, makeZdiv ≳ 10Zin. For this particular circuit Zin = 1.4 kΩ, so make Zdiv ≳ 15 kΩ. The blockingcapacitor then forms a high pass filter with Zdiv with a low frequency f−3db = (2πRC)−1. Assumeyou make Zdiv = 19 kΩ. What minimum value of C is required to pass frequencies above 20 Hz?

Measuring Input and Output ImpedancesTo measure an input impedance you place a variable resistor between the signal source and theamplifier input and to measure an output impedance you use a resistor from the output to ground.In both cases the test resistor is adjusted until 1

2 the original output is achieved. The test resis-tances must not affect the biasing, so blocking capacitors must be placed in series with the testresistor in both cases. The input is always capacitively coupled and this capacitor appears in thecircuit diagrams, but you must add a blocking capacitor to the output when measuring the outputimpedance. If the output impedance is small, a large (∼ 6.8 µF electrolytic) blocking capacitor isneeded. In addition, a small output impedance allows large output powers, so power resistors areneeded to measure the output impedance.

Experiment

1. BJT CharacteristicsSelect two 2N3904 npn BJT’s and generate characteristiccurves for each using the curve-tracing program available athttp://block.physics.csbsju.edu keeping track of which plot cor-responds to which device. From your characteristic curves determine thecurrent gain hfe = β. Also use the Metex DMM to measure β. How doyour measurements compare with each other and with the manufacturer’sdatasheet value of 30-300?

E

BC

2N

3904

E

BC

2N

3906

2. Current GainThe current gain of a transistor depends on temperature and can varyfrom transistor to transistor of the same type. Therefore, a circuitthat relies on a particular value of β is an unreliable circuit. Constructthe circuit to the right in order to measure the current gain of oneof your transistors. You will need to measure collector current ICand base current IB to find β = hFE . Use a large range for IB: µAto 0.3 mA. (Note: to keep IB < 0.3 mA, RB > 50 kΩ. Explainwhy.) Calculate the current gain β = IC/IB for each data point.The circuit limits the maximum value of IC . What is the theoreticalvalue of IC,max for this circuit? Make a log-log plot of β vs. IC usinghttp://www.physics.csbsju.edu/plot and compare the results withthose of part 1. Is β a constant?

A

A

+15V

IB

470ΩCIRB

12

3. Emitter FollowerConstruct the emitter follower circuit shown to the right, driveit with a 10 kHz sine wave, and simultaneously observe the in-put and output waveforms on an oscilloscope. What is the acgain? Measure the base and emitter dc bias voltages and com-ment on whether or not they are what you expect them to be.Measure the amplifier’s input impedance and compare it withyour theoretical expectation. Using the power resistor set (10,20, 50, 100, 200 Ω) from the power supply lab and a 6.8 µFblocking capacitor, estimate the output impedance. Is it whatyou expect?

130k

150k7.5k

1µFV in

Vout

1R

2R

ER

+15V

4. Common-Emitter AmplifierConstruct the common-emitter amplifier circuitshown to the right. Measure the ac voltage gain,input impedance, and output impedance. Comparethese values with the theoretical values (which youmust calculate). Measure the high frequency f−3dB

point. Now bypass the emitter resistor RE with a6.8 µF electrolytic capacitor and again measure theac gain. How does it compare with the theoreticalvalue? Note: with CE present you will have to keepthe amplitude of the input signal small to avoid clip-ping.

130k

15k680Ω

1µFV in

Vout

1R

2R

ER

+15V

CR

+

EC

6.8k

5. Complementary Push-Pull FollowerThis circuit is the basis for the output stage of most audiopower amplifiers. Construct it, drive it with a large amplitudesine wave, and observe the crossover distortion in Vout as youchange both the amplitude and dc offset of Vin. Sketch theinput and output when the input amplitude is about 2 Vp-p

with zero dc offset. Explain your observations. For zero dcoffset in Vin, is crossover distortion more of a problem for smallor large input amplitudes?

+15V

−15V

6.8k

V in Vout

npn

pnp

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6. Differential Amplifier: “long-tailed pair”

Using a “matched pair” (note: only matched in β, not thermal characteristics) of 2N3904s,construct the circuit shown on the left below. One input (V+) is a non-inverting input and theother input (V−) is an inverting input. Measure the circuit’s differential gain by groundingone input and applying a small signal to the other input. Measure its common-mode gain bydriving both inputs with the same 1 Vp-p sine wave. From these data compute the common-mode rejection ratio (CMRR = Vout, diff/Vout,CM) and compare with the theoretical valuesgiven by H&H section 2.18:

Gdiff =RC

2(RE + re)GCM = − RC

2Rtail +RE + reCMRR ≈ Rtail

RE + re

Save this circuit for part 7!

7. Current Mirror: active tail

Construct the current mirror shown on the right below and report/explain the formula relat-ing the “programming resistor” Rp to the constant current I. (Select R so that about 0.1-1V drops across it for currents of a few mA – e.g., ∼ 200 Ω.) Check whether I ∼ Ip (as wouldbe expected for identical transistors). Over what range of Rx is the current approximatelyconstant? Try a second value for Rp and again measure both Ip and I. Discuss what deter-mines the range of Rx values over which this circuit is useful. Finally remove the portions ofthe current mirror and differential amplifier circuits in the dashed boxes and substitute thecurrent mirror for the long tail of the differential amp. Measure the differential amp’s new dif-ferential and common-mode gains and compare the CMRR with its previous value from part 6.

Rtail

RE

RB

RC

V+ V−

Vout

+15V

−15V

100Ω

1µF

7.5k

10k

"long tail"

7.5k

100Ω

10k

1µF

RB

RE

Circuit for Part 6

R

RxRp

−15V

7.5k

constant

current

sink: I

R

IpAfor testing

purposes

Circuit for Part 7

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Physics 338 LAB 4 Fall 2011Operational Amplifiers

Introduction and Pre-Lab

The Golden Rules

1. The output attempts to do whatever it can to makethe voltage difference between the inputs zero.

2. The inputs draw no current.

+

−2

3

41

5

6

7

CCV

EEV

Voutinpu

ts

10k

+−

1

54

8

2

3 6

7

In this lab you will investigate several common op-amp circuits using the LF411 op-amp. Beforeyou come to lab, design an inverting amplifier with a gain of −10 using an op-amp and “reasonable”values for the input and feedback resistors (i.e., 1 kΩ-100 kΩ).

Experiment

1. Open-loop Test CircuitConstruct the open-loop test circuit to the right and observethe output Vout on an oscilloscope set to 5 volts/div. Whathappens as you slowly turn the potentiometer? Is it possibleto measure the open-loop voltage gain? Provide evidence fora statement of the form “the gain must be greater than X”.(Hint: if the gain were 106 and Vout = 1 V is desired, calculatethe required Vin and “simply” adjust the potentiometer to getthat voltage.)

+

−V

10k

10k

+15V

−15V

+15V

−15V

Vout

2

3

4

7

6

2. Inverting AmplifierConstruct the non-inverting amplifier you designed for the pre-lab. Drive your amplifier witha 1 kHz sine wave and measure its small-signal gain by observing the input and outputwaveforms on the oscilloscope. Does the gain depend on the input amplitude? What isthe maximum output voltage swing? Sketch an oscilloscope trace showing output clipping(include scope settings). Measure the gain at different frequencies: what is an approximateupper frequency limit (f−3dB, where Vout has been reduce by a factor of 1√

2)? Measure the

slew rate (maximum time rate of change of the output voltage) in V/µs using a high frequency,large amplitude square wave as the input by observing the rising/falling edge of the outputon the oscilloscope. Compare with the manufacturer’s specs.

3. Non-inverting AmplifierConstruct a non-inverting amplifier using the same components as in part 2. Measure itsvoltage gain and compare with the theoretical value.

15

4. Current SourceConstruct the op-amp current source shown to the right. Varythe load resistor RL (you may use the variable resistor box) andmonitor the current: over what resistance range does the currentremain constant? (If the current isn’t constant for small RL, checkthe op-amp for oscillations.) Calculate what the theoretical currentshould be and compare with your measurements. Why does thecurrent not remain constant at large RL?

+

−A

+15V

−15V

15k

1k

180Ω

RL

+15V

5. Summing AmplifierThe inverting op-amp configuration in conjunction withsumming inputs can be used as a digital-to-analog con-verter. The four input bits of the binary (base 2) number(e.g., 11012 = 1310) have voltages of either 0 V for “0” or5 V for “1”. The resistors are chosen to weight the bitsappropriately according to whether they are in the 1s, 2s,4s, or 8s place (1s place is given the least weight). Con-struct this circuit and measure the output voltage with aDMM for all 16 possible binary inputs. Plot and fit Vout

vs. digital input and find the fit parameters. Are the fitparameters what you expect from a theoretical analysis ofthe circuit?

+

−

8.2kΩ

3.9kΩ

2.0kΩ

1.0kΩ

1.0kΩ

1

2

4

8

+15V

−15V

Vout

6. IntegratorConstruct the integrator shown. Drive it with a 1 kHz sinewave and observe the output on an oscilloscope (dc coupled)while varying the dc offset of the input signal. Describe whatyou observe. (Note: even if the function generator’s dc offsetis “off”, there will be a small dc offset in the output signal!)What is the function of the 10 MΩ resistor? (Remove it andsee what happens, but then replace it.) Draw oscilloscopetraces showing input and output for all three of the availablewaveforms on the function generator. To observe the outputwaveform you may need to switch CouplingAC to remove thedc offset, allowing you to switch to an appropriate volts/divscale. Is Vin ∝ d

dtVout? Measure the input offset voltage witha DMM. Is it within specs? Use the trimming circuit shownin the introduction to zero out the offset voltage. Describethe effect of this on the integrator output.

+

−

+15V

−15V

100kΩ

Vout

inV

10MΩ

0.01µF

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Physics 338 LAB 5 Fall 2011Field Effect Transistors

Introduction and Pre-Lab

Characteristic Curves and Load LinesThe characteristic curves for a JFET along with a load line for the circuit of part 2 are displayedbelow. Report the value of RD for this loadline! An operating point (a.k.a. quiescent point) Qhas been selected at a gate bias voltage VGS = −0.4 V and drain current ID ≈ 1.7 mA. Thetransconductance g (a.k.a. forward admittance yfs) at Q is given by:

g =∂ID∂VGS

≈ ∆ID∆VGS

∣∣∣∣VDS=constant

=2.2 mA− 1.1 mA

−0.2 V− −0.6 V= 2.8 mS

The SI unit of transconductance is “siemens” (S) and is equivalent to Ω−1. In some texts andprofessions the non-SI unit “mho” () is still used.

If an input voltage swings the gate voltage ±0.2 V, the drain-to-source voltage VDS voltage rangewill be about 6.7 ± 2.8 V giving use a gain of about 14. Note that a FET with a different set ofcharacteristics curves would in general give us a different gain.

Using a larger value of RD would force us to small ID operating points and lower regions of transcon-ductance since more closely spaced characteristic curves mean lower g – explain why! On the otherhand, smaller drain resistors with their more steeply sloped load lines gives us small VDS swings,but push us to operating points nearer to the VDD = +15 V rail. The gain could be maximized ifwe had a nearly flat load line (e.g., a current source that always sources 1.7 mA, independent ofthe voltage across it). Note that with such a flat load line through Q a swing in VG < 0.1 V swingsVDS nearly rail-to-rail.

0 2 4 6 8 10 12 14

0.0000

0.0005

0.0010

0.0015

0.0020

0.0025

0.0030

2N5457 JFET Characteristic Curve with Load Line

−0.2V

−0.4V

−0.6V

VDS(V)

I D(A

)

Q

D

SG

2N

5457

D

SG

2N

5460

Experiment

1. FET CharacteristicsSelect two different 2N5457 n-channel JFETs and obtain characteristic curves for each us-ing the web-based curve tracer (http://block.physics.csbsju.edu). Keep track of whichcharacteristic curves correspond to which device! Call the JFET with the larger IDSS FETA and the other one FET B.

17

Reading off the characteristic curve plot for FET A, make a table of ID vs. VG at VDS = 7.5 V.According to H&H you should find:

ID = k(VG − VT )2 = kV 2

G − 2kVGVT + kV 2T︸ ︷︷ ︸

theoretical form

= AV 2G +BVG + C︸ ︷︷ ︸

fit form

where VT is the threshold voltage and k is determined by the FETs’s geometry, which bothvary from device to device. Fit your data to a quadratic function and plot it (attach boththe fit results and the plot in your lab notebook). Calculate the derivative of your fit andnote that this slope (of the ID vs. VG plot) is the transconductance g (a.k.a. yfs). Use thefact that the slope should be zero at VG = VT to calculate VT from the fit’s derivative. Sincethe derivative of a quadratic is linear, g increases linearly for VG ∈ (VT , 0

−). Calculate yfs atVG = 0. Compare your values of IDSS , VT , and yfs to the spec sheet values. Note that thederivative of your fit is:

∂ID∂VG

= 2kVG − 2kVT︸ ︷︷ ︸theoretical form

= 2AVG +B︸ ︷︷ ︸fit form

2. FET Voltage AmplifierConstruct the amplifier shown to the right using FET A. De-termine RD by selecting a resistor that makes a “nice” load lineon FET A’s characteristic curves. Add the load line to yourcharacteristic curves plot. Select and label your operating (qui-escent) point Q. Use the dc offset of your function generator tobias the gate (initially with only a dc signal) to your operatingpoint. Measure the output voltage Vout as you change this dcbias Vin. Plot the resulting points on your characteristic curve(they should lie near the load line).

Vout

V in

RD

+15V

4.7kΩ

Now switch Vin to a sine wave with a dc offset. Again monitor Vout on your scope as you varythe dc bias and record both the lower and upper levels of dc offset that result in clipping ofVout. Return the bias level so that you are back near your Q operating point. Keeping theinput amplitude small enough to avoid clipping, measure the ac voltage gain vout/vin at afrequency of 10 kHz (recall that lower case letters indicate the ac component only). Compareyour result with the approximate theoretical value GV = −gRD. (This requires you to find gat Q.) Vary the input frequency through several decades and note that gain is approximatelyconstant throughout a large bandwidth. Find the high frequency f−3dB. Save this circuit forpart 4!

3. FET Current SourceConstruct the amplifier shown to the right using FET B. Initially short thegate and source (i.e., RS = 0) and measure the current with varying loadRL. Over what range of RL is the current approximately constant? Howdoes this relate to the VG = 0 characteristic curve?

Consider the case of non-zero RS . Using your characteristic curves , pick a“nice” value of ID and the corresponding VGS . Calculate the required RS

and build the circuit. How does the experimental “constant” current valuecompare to the design value? Save this circuit for part 4!

A

+15V

RS

RL

18

4. Active LoadIn the pre-lab it was noted that the best possible load for a FETamplifier is a constant current source. You’ve constructed avoltage amplifier using FET A in part 2 and a constant currentsource using FET B in part 3. Now put the two together usingthe gate-shorted-to-source version of the current source shownto the right. Find and report the gate bias voltage (for FET A)needed to maximize the small signal gain of this amplifier. Re-port that maximum gain and compare it to the gain from part 2.

Recall that if you really want voltage gain, FETs are not thedevice to use – an LF411 can produce gains of 105.

+15V

Vout

V in

4.7kΩ

5. Voltage-Controlled Gain AmplifierThis circuit uses FET A as a “voltage-variable resistor” (VVR). The aim is to construct anamplifier whose gain is controlled by a dc voltage on the FET’s gate, requiring the FET tooperate in the ohmic (linear) region where VDS is small (e.g., small than the “gate drive”VG − VT ). Explain why VDS = Vin is expected. Construct this circuit using an LF411 andchoosing R1 to be ∼ 40× the VG = 0 FET resistance (i.e., y−1

fs ) found in part 1. Drive thecircuit with an ac signal of about 5 kHz and an amplitude small enough to avoid clipping(e.g., Vin < 100 mV). Make a graph of voltage gain GV vs. the pot-controlled gate voltage VG.

You should recognize the op amp as a non-inverting amplifier...write out the equation for itsgain. Where is the “second” resistor R2? Looking at your FET characteristic curves, whatrange does R2 have? Operating at a fairly large negative control voltage (e.g., VT /2), seehow much you can increase the input signal amplitude before the output waveform becomesdistorted. Note the value of VDS when this distortion sets in and refer to your characteristiccurves to explain its cause. This distortion can be decreased by adding the feedback elementsshown between points A and B. Try this fix and note its effect. (See H&H p. 139 for aquantitative explanation.) Save this circuit for part 6!

+

−

+15V

−15V

V in Vout

R1A

B

−15V

10kΩ

1MΩ

0.01µF

A

B

additional

feedback

components

1MΩ

19

6. Automatic Gain Control (AGC)The AGC circuit shown uses a voltage-controlled gain amplifier to keep Vout nearly constantover a wide range of amplitudes for Vin. These circuits are used in radios and tape recordersto maintain a constant volume output for input signals whose strength may vary considerably– it is designed to boost the gain of low amplitude inputs. The AVLS (automatic volumelimiting system) found on mp3 players and PlayStations is similar – it is designed to reducethe gain of high amplitude inputs.

Build this circuit from the amplifier of part 5 and demonstrate it to your instructor (the opamps should be connected to ±15 V power supplies). Measure the range of amplitudes forVin over which Vout remains nearly constant. Note that when the circuit is regulating thegain, the potentiometer acts as the volume control. A duplicate of the circuit diagram belowis included on the last page for you to cut and tape into your lab notebook. Do this and thencircle and label the following parts of the circuit: (1) a non-inverting amp with a voltage-controlled resistor, (2) a half-wave rectifier with a capacitor filter, and (3) an integrator withsumming inputs. A former student commented, “If the inputs to the integrator are constant,the output will also be constant.” Is this a correct statement?

Explain qualitatively how this circuit works as an AGC amp. Begin by answering the followingquestions. In part 5 you saw that the gate voltage determined the gain. Which part of thiscircuit controls the gate voltage? What is required for the gate voltage to remain constant?What condition forces a decreasing gate voltage? Assume that Vout is too large so that thegain of the amplifier needs to be reduced. Report the chain of consequences that will causethe gate voltage to be correctly adjusted (up or down?) to bring about the required reductionin gain. If the potentiometer is adjusted so that its voltage becomes more negative, reportthe chain of consequences that will affect (up or down?) the gain.

−15V

10kΩ

1MΩ

+

−

V inVout

R1

1MΩ

0.01µF

+

−

0.01µF

1MΩ

1MΩ

0.01µF

Ge

Ge

20

Physics 338 LAB 6 Fall 2011

Active Filters

Introduction and Pre-Lab

In this lab you will investigate voltage-controlled voltage-source (VCVS) active filters and statevariable filters. State variable filters are more stable and are easier to adjust than VCVS filters.

Three common filter types are the Butterworth, Chebyshev, and Bessel filters and each has its ownadvantages and disadvantages.

ButterworthAdvantages: Maximally flat magnitude response in the pass-band. Good all-around

performance. Pulse response better than Chebyshev. Rate of attenua-tion better than Bessel.

Disadvantages: Some overshoot and ringing in step response. Poor phase characteristics.

ChebyshevAdvantages: Better rate of attenuation beyond the pass-band than Butterworth.

Disadvantages: Ripple in pass-band. Considerably more ringing in step response thanButterworth.

BesselAdvantages: Best step response – very little overshoot or ringing. Best phase charac-

teristics.

Disadvantages: Slower initial rate of attenuation beyond the pass-band than Butter-worth.

All filter types can be used to make low-pass, high-pass, band-pass, and band-reject filters. Intheory, a band-pass filter can be made by cascading overlapping low- and high-pass filters and aband-reject can be made by summing the outputs of non-overlapping low- and high-pass filters,but there are better circuits available for these types of filters (see H&H Figs. 5.15 & 5.17).

2 pole VCVS filter circuitsControlled source filters use noninverting amplifiers with gains greater than 1. The differencebetween low-pass and high-pass filters is in the placement of the resistors and capacitors.

inV

−

+

EEV

CCV

R

1R

outV

2R1C

2C(K−1)R

inV

−

+

EEV

CCV

R

1R

outV

2R

1C 2C

(K−1)R

2 pole VCVS low-pass filter 2 pole VCVS high-pass filter

Choosing the proper resistor, capacitor, and K values is outlined in H&H Section 5.07.

21

2 pole state-variable filter circuitsState-variable filters usually come pre-packaged in a single IC with capacitors (C1, C2) and resistors(R1, R2, R3, R4)preset to specific values. This requires that the user only needs to set resistor val-ues RF1,2, RG (gain resistor), and RQ (Q-factor resistor). There is usually software available fromthe manufacturer that calculates these resistor values for you. The input stage can be configuredas an inverting amplifier.

+

−inV

+

−

V lowpasshighpassV

+

−CCV

EEVEEV

CCV

EEV

CCVGR

QR

F1R F2R

1R2R

4R

1C 2C

bandpassV

For Butterworth filters the high- and low-pass outputs have the same cutoff frequency, fc, for agiven RF – for Chebyshev and Bessel filters, different values of RF must be chosen to get equivalentfcs for high- and low-pass configurations. If the bandpass filter is desired, RQ must be reducedcompared to the low- or high-pass values to increase the sharpness of the peak.

The input stage can also be configured as a noninverting amplifier for bandpass filtering.

+

−

inV+

−

+

−

bandpassV

CCV

EEVEEV

CCV

EEV

CCV

3R

QR

F1R F2R

1R2R

4R

1C 2C

highpassV lowpassV

Again, if the bandpass filter is desired, RQ must be reduced compared to the low- or high-passvalues to increase the sharpness of the peak. For a band-reject filter, use a reduced RQ andsumming amplifier to combine the outputs of the first (high-pass) and third (low-pass) amplifiers.

Experiment

1. Construct a 2 pole VCVS low-pass Butterworth filter with fc = 1.0 kHz. Choose R1 = R2 =159 k and C1 = C2 = 0.001µF. Also set R = 100 k and (K − 1)R = 58.6 k. These valueswere calculated from H&H Table 5.2. Set the amplitude of your input sine wave to 1 V andcollect data on attenuation (V/Vin) and phase shift (ϕ = 2π∆t/T ) over a range of frequenciesf/fc = 0.1, 0.2, 0.5, 1, 2, 5, 10, 20, 50, 100. Displaying V and Vin simultaneously on thescope allows you to measure the lag/lead time ∆t. Measuring the amplitudes and period, T ,is straight-forward.

Make a Bode plot of attenuation vs. frequency (i.e., log(attenuation) vs. log(f/fc)) using

22

the log-log graph paper provided, WAPP2PLOT, or Mathematica and attach this plot inyour lab notebook. Plot ϕ vs. f using the semi-log graph paper provided, WAPP2PLOT, orMathematica and attach this plot in your lab notebook.

2. Turn your VCVS low-pass Butterworth filter into a high-pass Butterworth filter by inter-changing the appropriate resistors and capacitors. Keep the amplitude of your input sinewave at 1 V and collect attenuation and phase shift data for f/fc = 0.01, 0.02, 0.05, 0.1, 0.2,0.5, 1.0, 2.0, 5.0, 10. Make a Bode plot of attenuation vs. frequency and a plot of ϕ vs. f .Attach these plots in your lab notebook.

3. Construct a 2 pole VCVS low-pass Bessel filter with fc = 1.0 kHz. Choose R1 = R2 = 125 kand C1 = C2 = 0.001µF. Also set R = 100 k and (K − 1)R = 26.8 k. These values werecalculated from H&H Table 5.2. Keep the amplitude of your input sine wave at 1 V andcollect attenuation and phase shift data for f/fc = 0.01, 0.02, 0.05, 0.1, 0.2, 0.5, 1.0, 2.0, 5.0,10. Make a Bode plot of attenuation vs. frequency and a plot of ϕ vs. f . Attach these plotsin your lab notebook.

4. Turn your VCVS low-pass Bessel filter into a high-pass Bessel filter by interchanging theappropriate resistors and capacitors. Note that R1 and R2 need to be changed to 203 k.Collect attenuation and phase shift data for f/f−3dB = 0.01, 0.02, 0.05, 0.1, 0.2, 0.5, 1.0, 2.0,5.0, 10. Make a Bode plot of attenuation vs. frequency and a plot of ϕ vs. f . Attach theseplots in your lab notebook.

5. Construct a 2 pole state-variable Butterworth inverting filter with fc = 1.0 kHz. Set R1 =R2 = R4 = RG = 50.0 k, C1 = C2 = 0.001µF, RF1 = RF2 = 158.0 k, and RQ = 44.20 k. Setthe amplitude of your input sine wave at 1 V and collect attenuation and phase shift data forf/fc = 0.01, 0.02, 0.05, 0.1, 0.2, 0.5, 1.0, 2.0, 5.0, 10 for both the high- and low-pass outputs.Make a Bode plot of attenuation vs. frequency and a plot of ϕ vs. f . Attach these plots inyour lab notebook.

Qualitatively examine the bandpass output as you change the frequency through the range0.01 ≤ f/fc ≤ 10 and record your observations in your lab notebook. Change the Q-factorresistor to RQ = 24.90 k and collect attenuation and phase shift data for f/fc = 0.01, 0.02,0.05, 0.1, 0.2, 0.5, 1.0, 2.0, 5.0, 10. Make a Bode plot of attenuation vs. frequency and a plotof ϕ vs. f . Attach these plots in your lab notebook.

Questions

1. Compare your VCVS low-pass Butterworth and Bessel filters by examining their Bode andphase plots. Record your observations. Do they compare as expected?

2. Compare your VCVS low-pass Butterworth and Bessel filters by examining their Bode andphase plots. Record your observations. Do they compare as expected?

3. Compare your two low-pass Butterworth filters (VCVS and state-variable) by examining theirBode and phase plots. Record your observations. Do they compare as expected?

4. Compare your two high-pass Butterworth filters (VCVS and state-variable) by examiningtheir Bode and phase plots. Record your observations. Do they compare as expected?

5. Comment on your state-variable bandpass filter by referring to its Bode and Phase plots.What is it’s Q-factor? How does the phase change with frequency?

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24

−15V

10kΩ

1MΩ

+

−

V inVout

R1

1MΩ

0.01µF

+

−

0.01µF

1MΩ

1MΩ

0.01µF

Ge

Ge

25