msp430g2xx iji

Download msp430g2xx iji

Post on 28-Apr-2015

11 views

Category:

Documents

1 download

Embed Size (px)

DESCRIPTION

pp

TRANSCRIPT

MSP430x2xx Family

User's Guide

Literature Number: SLAU144I December 2004 Revised January 2012

2

Copyright 20042012, Texas Instruments Incorporated

SLAU144I December 2004 Revised January 2012 Submit Documentation Feedback

ContentsPreface 1

2

3

...................................................................................................................................... Introduction ...................................................................................................................... 1.1 Architecture ................................................................................................................. 1.2 Flexible Clock System .................................................................................................... 1.3 Embedded Emulation ..................................................................................................... 1.4 Address Space ............................................................................................................. 1.4.1 Flash/ROM ........................................................................................................ 1.4.2 RAM ................................................................................................................ 1.4.3 Peripheral Modules ............................................................................................... 1.4.4 Special Function Registers (SFRs) ............................................................................ 1.4.5 Memory Organization ............................................................................................ 1.5 MSP430x2xx Family Enhancements .................................................................................... System Resets, Interrupts, and Operating Modes .................................................................. 2.1 System Reset and Initialization .......................................................................................... 2.1.1 Brownout Reset (BOR) .......................................................................................... 2.1.2 Device Initial Conditions After System Reset ................................................................. 2.2 Interrupts .................................................................................................................... 2.2.1 (Non)-Maskable Interrupts (NMI) ............................................................................... 2.2.2 Maskable Interrupts .............................................................................................. 2.2.3 Interrupt Processing .............................................................................................. 2.2.4 Interrupt Vectors .................................................................................................. 2.3 Operating Modes .......................................................................................................... 2.3.1 Entering and Exiting Low-Power Modes ...................................................................... 2.4 Principles for Low-Power Applications .................................................................................. 2.5 Connection of Unused Pins .............................................................................................. CPU ................................................................................................................................. 3.1 CPU Introduction .......................................................................................................... 3.2 CPU Registers ............................................................................................................. 3.2.1 Program Counter (PC) ........................................................................................... 3.2.2 Stack Pointer (SP) ................................................................................................ 3.2.3 Status Register (SR) ............................................................................................. 3.2.4 Constant Generator Registers CG1 and CG2 ................................................................ 3.2.5 General-Purpose Registers R4 to R15 ........................................................................ 3.3 Addressing Modes ......................................................................................................... 3.3.1 Register Mode .................................................................................................... 3.3.2 Indexed Mode ..................................................................................................... 3.3.3 Symbolic Mode ................................................................................................... 3.3.4 Absolute Mode .................................................................................................... 3.3.5 Indirect Register Mode ........................................................................................... 3.3.6 Indirect Autoincrement Mode ................................................................................... 3.3.7 Immediate Mode .................................................................................................. 3.4 Instruction Set .............................................................................................................. 3.4.1 Double-Operand (Format I) Instructions ....................................................................... 3.4.2 Single-Operand (Format II) Instructions ....................................................................... 3.4.3 Jumps ..............................................................................................................ContentsCopyright 20042012, Texas Instruments Incorporated

23 2526 26 27 27 27 28 28 28 28 29

3132 32 33 34 34 37 38 40 41 43 43 44

4546 47 47 48 48 49 50 50 52 53 54 55 56 57 58 59 60 61 623

SLAU144I December 2004 Revised January 2012 Submit Documentation Feedback

www.ti.com

3.4.4 3.4.5 3.4.6

Instruction Cycles and Lengths ................................................................................. 63 Instruction Set Description ...................................................................................... 65 Instruction Set Details ............................................................................................ 67 120 122 123 123 123 125 126 127 129 130 131 135 140 142 143 144 146 146 151 164 165 167 219 261 278 280 281 281 281 282 282 284 284 285 287 288 288 289 290 291 291 294 296 296 297 303

4

CPUX .............................................................................................................................. 1194.1 4.2 4.3 CPU Introduction ......................................................................................................... Interrupts .................................................................................................................. CPU Registers ............................................................................................................ 4.3.1 Program Counter (PC) ......................................................................................... 4.3.2 Stack Pointer (SP) .............................................................................................. 4.3.3 Status Register (SR) ............................................................................................ 4.3.4 Constant Generator Registers (CG1 and CG2) ............................................................. 4.3.5 General-Purpose Registers (R4 to R15) ..................................................................... Addressing Modes ....................................................................................................... 4.4.1 Register Mode ................................................................................................... 4.4.2 Indexed Mode ................................................................................................... 4.4.3 Symbolic Mode .................................................................................................. 4.4.4 Absolute Mode .................................................................................................. 4.4.5 Indirect Register Mode ......................................................................................... 4.4.6 Indirect Autoincrement Mode .................................................................................. 4.4.7 Immediate Mode ................................................................................................ MSP430 and MSP430X Instructions .................................................................................. 4.5.1 MSP430 Instructions ............................................................................................ 4.5.2 MSP430X Extended Instructions .............................................................................. Instruction Set Description .............................................................................................. 4.6.1 Extended Instruction Binary Descriptions .................................................................... 4.6.2 MSP430 Instructions ............................................................................................ 4.6.3 MSP430X Extended Instructions .............................................................................. 4.6.4 MSP430X Address Instructions ............................................................................... Basic Basic 5.2.1 5.2.2 5.2.3 5.2.4 5.2.5 5.2.6 5.2.7 5.2.8 Basic 5.3.1 5.3.2 5.3.3 5.3.4 5.3.5 5.3.6 Clock Module+ Introduction ..................................................................................... Clock Module+ Operation .....................

Recommended

View more >