microprogrammed explained

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Thursday, October 26, 20171

GROUP MEMBERS :

•Muhammad Umar (R1F15Bscs0015)

• Hardwired

• Microprogrammed

Instruction code

CombinationalLogic Circuits

Memory

Sequence Counter

.

.Controlsignals

Controlsignals

Next AddressGenerator

(sequencer)CAR Control

MemoryCDR

Decoding

Circuit

Memory

.

.

CAR: Control Address RegisterCDR: Control Data RegisterInstruction code

Thursday, October 26, 20173

Control Unit :

The control unit (CU) is a component of a

computer's central processing unit (CPU)

that directs the operation of the processor.

It tells the computer's memory,

arithmetic/logic unit and input and output

devices on how to respond to a program's

instructions.

Thursday, October 26, 20174

Hardwire :

Hardwire control is a control

mechanism that generates control signals

by using an appropriate Finite State

Machine (FSM). Actually we sort it on

circuit.

The disadvantage is that wrong wiring

waste waste the whole circuit and time .

Thursday, October 26, 20175

Microprogrammed :

Microprogrammed control is a control

mechanism that generates control signals

by reading a memory called a Control

Storage (CS) that certain control signals.

It’s like a chips or bio’s and digital clock

watch (Masjid) is a chiped

microprogrammed.

Flexibility (change time etc )…

Thursday, October 26, 20176

HARDWIRED CONTROL

UNIT

MICROPROGRAMMED

CONTROL UNIT

1) Speed is fast.2) More costlier.3) Occurrence of error is more.4) Control functions implemented in

hardware5) Not flexible to accommodate new

system specification or new instruction redesign is required.

6) Difficult to handle complex instruction sets.

7) Complicated design process.

8) Complex decoding and sequencing logic.

9) More chip area.10) Application:

Mostly RISC microprocessor.

1) Speed is slow.2) Cheaper.3) Occurrence of error is less.4) Control functions implemented in

software5) More flexible to accommodate new

system specification or new instructions

6) Easier to handle complex instruction sets

7) Orderly, systematic and simple design process.

8) Easier decoding and sequencing logic

9) Less chip area.10) Application:

Mainframes some microprocessors

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Control Signals.

Control Variables.

Control Word.

Control Memory.

Microinstructions.

Microprogram.

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• Control Signals :Group of bits used to select paths in Multiplexer,decoder

and Arithematic logic units.

• Control Variables :Multiple Micro-operations

i.e a=a+b• Binary variables specify micro-operations

• Control Word :String of 1’s and 0’s represented control variables.

• Control Memory :Memory certain control words

Thursday, October 26, 20179

• Micro-instructions:

Instructions that makes microprogrammed

are called micro-instruction.• In micro instruction write program and stored in chip

oControl words stored in control memory.

oSpecify control signals for execution of micro operation.

• Micro-program:

Sequence of micro-instruction

Thursday, October 26, 201710

• Are the funcional, or

atomic, operations of a

processor.

• A single micro-operation

generally involves a

transfer between

registers, transfer

between registers and

external bus, or a

simple ALU operation.

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Read-only memory (ROM) Content of word in ROM at given address specifies

microinstruction Each computer instruction initiates series of

microinstructions (micro program) in control memory These microinstructions generate micro operations to

• Fetch instruction from main memory

• Evaluate effective address

• Execute operation specified by instruction

• Return control to fetch phase for next instruction

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Micro-program are stored in ROM. That

memory is called Control Memory.

(Like A Library)

Address

Control

memory

(ROM)

Control word

(microinstruction)

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Control memory:

• Contains microprograms (set of microinstructions)

• Microinstruction contains

Bits initiate microoperations

Bits determine address of next microinstruction

Controlword

Next AddressGenerator

(sequencer)CAR

ControlMemory(ROM)

CDRExternal

input

Thursday, October 26, 201714

Control address register (CAR) :

• Specifies address of next microinstruction

Next address generator (microprogram

sequencer)

• Determines address sequence for control memory

Microprogram sequencer functions

• Increment CAR by one

• Transfer external address into CAR

• Load initial address into CAR to start control

operations

Thursday, October 26, 201715

Control data register (CDR)- or pipeline

register:

• Holds microinstruction read from control memory

• Allows execution of microoperations specified by

control word simultaneously with generation of next

microinstruction

Control unit can operate without CDR

Controlword

Next AddressGenerator

(sequencer)CAR

ControlMemory(ROM)

Externalinput

Thursday, October 26, 201716

Routine :• Every block of code is “Routine.”

• Group of microinstructions stored in control

memory.

Each computer instruction has its own

microprogram routine to generate

microoperations that execute the

instruction.

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Subroutine:

• Sequence of microinstructions used by other routines

to accomplish particular task

Example:

• Subroutine to generate effective address of operand

for memory reference instruction

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Branching from one routine to another depends on status bit conditions.

Working on the base of condition.e.g :

{ if a>50;cout<<message;------------------------------

} Unconditional branch

• Fix value of status bit to 1

e.g :Goto X;

Thursday, October 26, 201719

Each computer instruction has its own

microprogram routine stored in a given

location of the control memory

Mapping:• Transformation from instruction code bits to

address in control memory where routine is

located

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Each routine must be able to branch to the next routine in the sequence. An initial address is loaded into the CAR when power is turned on; this is usually the address of the first microinstruction in the instruction fetch routine. Next, the control unit must determine the effective address of the instruction.

Address sequencing capabilities required in control unit• Incrementing CAR• Unconditional or conditional branch, depending on status bit

conditions• Mapping from bits of instruction to address for control memory• Facility for subroutine call and return

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1940

opcode 940

1 is the opcode.

940 is the Address.

---------------------------------------------

------------------------------------------

---------------------------------------

CONTROL UNIT

Thursday, October 26, 201723

Computer instruction format:

Four computer instructions:

(EA is Effective Address)

I Opcode Address

15 14 11 10 0

ADD 0000 AC AC + M[EA]

BRANCH 0001 if (AC < 0) then (PC EA)

STORE 0010 M[EA] AC

EXCHANGE 0011 AC M[EA], M[EA] AC

Symbol OP-code Description

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• F1,F2,F3 : Micro-operation fields.

• CD : Condition for branching

• BR : Branch Field

• AD : Address Field

Thursday, October 26, 201725

CD Condition Symbol Comments

00 Always = 1 U Unconditional branch

01 DR(15) I Indirect address bit

10 AC(15) S Sign bit of AC

11 AC = 0 Z Zero value in AC

BR Symbol Function

00 JMP CAR AD if condition = 1

CAR CAR + 1 if condition = 0

01 CALL CAR AD, SBR CAR + 1 if condition = 1

CAR CAR + 1 if condition = 0

10 RET CAR SBR (Return from subroutine)

11 MAP CAR(2-5) DR(11-14), CAR(0,1,6) 0

Thursday, October 26, 201726

Sample Format :

Label May be empty or may specify symbolic address terminated with colon

Micro-ops Consists of 1, 2, or 3 symbols separated by commas

CD One of {U, I, S, Z}U: Unconditional BranchI: Indirect address bit

S: Sign of ACZ: Zero value in AC

BR One of (JMP, CALL, RET, MAP)

AD One of (Symbolic address, NEXT, empty).

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