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Logic Gates

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Page 1: Logic Gates. Outline  Logic Gates  The Inverter  The AND Gate  The OR Gate  The NAND Gate  The NOR Gate  The XOR Gate  The XNOR Gate  Drawing

Logic Gates

Page 2: Logic Gates. Outline  Logic Gates  The Inverter  The AND Gate  The OR Gate  The NAND Gate  The NOR Gate  The XOR Gate  The XNOR Gate  Drawing

Outline

Logic Gates The Inverter The AND Gate The OR Gate The NAND Gate The NOR Gate The XOR Gate The XNOR Gate

Drawing Logic Circuit Analysing Logic Circuit

Page 3: Logic Gates. Outline  Logic Gates  The Inverter  The AND Gate  The OR Gate  The NAND Gate  The NOR Gate  The XOR Gate  The XNOR Gate  Drawing

Outline

Logic Gates The Inverter The AND Gate The OR Gate The NAND Gate The NOR Gate The XOR Gate The XNOR Gate

Drawing Logic Circuit Analysing Logic Circuit

Page 4: Logic Gates. Outline  Logic Gates  The Inverter  The AND Gate  The OR Gate  The NAND Gate  The NOR Gate  The XOR Gate  The XNOR Gate  Drawing

Logic Gates Gate Symbols

EXCLUSIVE OR

a

ba.b

a

ba+b

a a'

a

b(a+b)'

a

b(a.b)'

a

ba b

a

ba.b&

a

ba+b1

AND

a a'1

a

b(a.b)'&

a

b(a+b)'1

a

ba b=1

OR

NOT

NAND

NOR

Symbol set 1 Symbol set 2

(ANSI/IEEE Standard 91-1984)

Page 5: Logic Gates. Outline  Logic Gates  The Inverter  The AND Gate  The OR Gate  The NAND Gate  The NOR Gate  The XOR Gate  The XNOR Gate  Drawing

Logic Gates: The Inverter

The Inverter

A A'

0 1 1 0

A A' A A'

Application of the inverter: Complement.

1

0

0

1

0

1

0

1

1

0

0

1

1

0

1

0

Binary number

1’s Complement

Page 6: Logic Gates. Outline  Logic Gates  The Inverter  The AND Gate  The OR Gate  The NAND Gate  The NOR Gate  The XOR Gate  The XNOR Gate  Drawing

Logic Gates: The AND Gate (1/2)

The AND Gate

A B A . B0 0 00 1 01 0 01 1 1

A

BA.B

&A

BA.B

Page 7: Logic Gates. Outline  Logic Gates  The Inverter  The AND Gate  The OR Gate  The NAND Gate  The NOR Gate  The XOR Gate  The XNOR Gate  Drawing

Logic Gates: The AND Gate (2/2)

Application of the AND Gate

1 sec

A

1 secEnable

A

EnableCounter

Reset to zero between Enable pulses

Register, decode and frequency display

Page 8: Logic Gates. Outline  Logic Gates  The Inverter  The AND Gate  The OR Gate  The NAND Gate  The NOR Gate  The XOR Gate  The XNOR Gate  Drawing

Logic Gates: The OR Gate

The OR Gate

1

A

BA+B

A

BA+B

A B A + B0 0 00 1 11 0 11 1 1

Page 9: Logic Gates. Outline  Logic Gates  The Inverter  The AND Gate  The OR Gate  The NAND Gate  The NOR Gate  The XOR Gate  The XNOR Gate  Drawing

Logic Gates: The NAND Gate

The NAND Gate

&A

B(A.B)'

A

B(A.B)'

A

B(A.B)'

NAND Negative-OR

A B (A.B)'0 0 10 1 11 0 11 1 0

Page 10: Logic Gates. Outline  Logic Gates  The Inverter  The AND Gate  The OR Gate  The NAND Gate  The NOR Gate  The XOR Gate  The XNOR Gate  Drawing

Logic Gates: The NOR Gate

The NOR Gate

NOR Negative-AND

1

A

B(A+B)'A

B(A+B)'

A

B(A+B)'

A B (A+B)'0 0 10 1 01 0 01 1 0

Page 11: Logic Gates. Outline  Logic Gates  The Inverter  The AND Gate  The OR Gate  The NAND Gate  The NOR Gate  The XOR Gate  The XNOR Gate  Drawing

Logic Gates: The XOR Gate

The XOR Gate

=1A

BA B

A

BA B

A B A B0 0 00 1 11 0 11 1 0

Page 12: Logic Gates. Outline  Logic Gates  The Inverter  The AND Gate  The OR Gate  The NAND Gate  The NOR Gate  The XOR Gate  The XNOR Gate  Drawing

Logic Gates: The XNOR Gate

The XNOR Gate

A

B(A B)'

=1A

B(A B)'

A B (A B) '0 0 10 1 01 0 01 1 1

Page 13: Logic Gates. Outline  Logic Gates  The Inverter  The AND Gate  The OR Gate  The NAND Gate  The NOR Gate  The XOR Gate  The XNOR Gate  Drawing

Outline

Logic Gates The Inverter The AND Gate The OR Gate The NAND Gate The NOR Gate The XOR Gate The XNOR Gate

Drawing Logic Circuit Analysing Logic Circuit

Page 14: Logic Gates. Outline  Logic Gates  The Inverter  The AND Gate  The OR Gate  The NAND Gate  The NOR Gate  The XOR Gate  The XNOR Gate  Drawing

Drawing Logic Circuit (1/2)

When a Boolean expression is provided, we can easily draw the logic circuit.

Examples:

(i) F1 = x.y.z' (note the use of a 3-input AND gate)

xy

z

F1

z'

Page 15: Logic Gates. Outline  Logic Gates  The Inverter  The AND Gate  The OR Gate  The NAND Gate  The NOR Gate  The XOR Gate  The XNOR Gate  Drawing

Drawing Logic Circuit (2/2)

(ii) F2 = x + y'.z (if we assume that variables and their complements are available)

(iii) F3 = x.y' + x'.z

x

y'z

F2

y'.z

x'z

F3

x'.z

x.y'xy'

Page 16: Logic Gates. Outline  Logic Gates  The Inverter  The AND Gate  The OR Gate  The NAND Gate  The NOR Gate  The XOR Gate  The XNOR Gate  Drawing

Outline

Logic Gates The Inverter The AND Gate The OR Gate The NAND Gate The NOR Gate The XOR Gate The XNOR Gate

Drawing Logic Circuit Analysing Logic Circuit

Page 17: Logic Gates. Outline  Logic Gates  The Inverter  The AND Gate  The OR Gate  The NAND Gate  The NOR Gate  The XOR Gate  The XNOR Gate  Drawing

Analysing Logic Circuit

When a logic circuit is provided, we can analyse the circuit to obtain the logic expression.

Example: What is the Boolean expression of F4?

A'.B'

A'.B'+C (A'.B'+C)'

A'

B'

CF4

F4 = (A'.B'+C)' = (A+B).C'