lecture#06 inner workings of the cpu

Download Lecture#06   inner workings of the cpu

Post on 17-Dec-2014

2.242 views

Category:

Technology

3 download

Embed Size (px)

DESCRIPTION

 

TRANSCRIPT

  • 1. ICT1012 Computer SystemsLecture 6 Inner Workings of the Central Processing Unit Lakshman JayaratneLearning ObjectivesComputer architectureComponents of a simple central processing unit: o registers, ALU, control unit and busesOther hardware components of a computer: o Buses, clocks, peripheral devices, memoryFeatures of computersSpeed and reliabilityComponents and CPU registersMemory organizationFetchdecodeexecute cycle and its use toFetch decodeexecute instructions in a simple computer1

2. Hardware Components of a TypicalComputer PeripheralCentralProcessing MemoryDevices Unit (CPU)Buses allow components to pass data to eachotherHardware Components of a TypicalComputer - CPU PeripheralCentralProcessing MemoryDevices Unit (CPU) Central Processing Unit (CPU) Performs the basic operations Consists of two parts: Arithmetic / Logic Unit (ALU) - data manipulation Control Unit - coordinate machines activities machine 2 3. Central Processing Unit (CPU)Fetches, decodes and executes programinstructionsTwo principal parts of the CPU Arithmetic-Logic Unit (ALU) Arithmetic-o Connected to registers and memory by a data buso All three comprise the Datapath Control unito Sends signals to CPU components to perform sequenced operationsCPU: Registers, ALU and Control Unit Registers Hold data that can be readily accessed by the CPU Implemented using D flip-flops flip-o A 32-bit register requires 32 D flip-flops32- flip- Arithmetic-logic unit (ALU) Arithmetic- Carries out logical and arithmetic operations Often affects the status register (e.g., overflow, carry) Operations are controlled by the control unit Control unit (CU) Policeman or traffic manager Determines which actions to carry out according to the values in a program counter register and a status register3 4. Hardware Components of a TypicalComputer - Memory PeripheralCentralProcessingMemoryDevices Unit (CPU)Main Memory Holds programs and data Stores bits in fixed-sized chunks: word (8, 16,fixed- word 32 or 64 bits) Each word has a unique address The words can be accessed in any orderrandom-access memory or RAMrandom-RAMMemoryConsists of a linear array of addressablestorage cellsA memory address is represented by anunsigned integerCan be byte-addressable or word-addressable byte- word-Byte-addressable: each byte has a unique addressByte-Word-addressable: a word (e.g., 4 bytes) has a uniqueWord-address4 5. Memory: Example A memory word size of a machine is 16 bits A 4MB 16 RAM chip gives us 4 megabytes of 16-bit memory locations 16- 4MB = 22 * 220 = 222 = 4,194,304 unique locations (each location contains a 16-bit word) 16- Memory locations range from 0 to 4,194,303 in unsigned integers 2N addressable units of memory require N bits to address each location Thus, the memory bus of this system requires at least 22 address lines The address lines count from 0 to 222 -1 in binarycountHardware Components of a TypicalComputer Peripheral Devices thatCommunicate with the Outside WorldPeripheral CentralProcessingMemory DevicesUnit (CPU) Input/Output (I/O)Input: keyboard, mouse, microphone, scanner,sensors (camera, infra-red), punch-cardsinfra- punch-Output: video, printer, audio speakers, etc Communicationmodem, ethernet card5 6. Hardware Components of a TypicalComputer Peripheral Devices thatStore Data Long Term Secondary (mass) storage Stores information for long periods of time as files Examples: hard drive, floppy disk, tape, CD- CD- ROM (Compact Disk Read-Only Memory), flash Read- drive, DVD (Digital Video/Versatile Disk)Hardware Components of a TypicalComputer Buses Peripheral Central Processing MemoryDevicesUnit (CPU)BusesUsed to share data between system componentsinside and outside the CPUSet of wires (lines) that act as a shared path allow parallel movement of bits 6 7. Typical Bus Transactions Sending an address (for performing a read or write) Transferring data from memory to register and vice versa Transferring data for I/O reads and writes from peripheral devicesBusesPhysically a bus is a group ofconductors that allows all thebits in a binary word to becopied from a source componentto a destination componentBuses move binary values insidethe CPU between registers andother componentsBuses are also used outside the CPU, to copy valuesbetween the CPU registers and main memory, andbetween the CPU registers and the I/O sub-systemsub-7 8. Types of Buses: Source and Destination Point-to-point: Point- to- point: connects two specific components Multi-point: a shared Multi- point: resource that connects several components access to it is controlled through protocols, which are built into the hardwareTypes of Buses: Contents Data bus: conveys bits from one device to anotherbus: Control bus: determines the direction of data flow and bus: when each device can access the bus Address bus: determines the location of the sourcebus: or destination of the data8 9. ClockEvery computer contains at least one clock thatsynchronizes the activities of its componentsA fixed number of clock cycles are required to carry out eachdata movement or computational operationThe clock frequency determines the speed of all operations oMeasured in megaHertz or gigaHertzGenerally the term clock refers to the CPU (master)clockBuses can have their own clocks which are usually slowerMost machines are synchronousControlled by a master clock signalRegisters must wait for the clock to tick before loading new data dataClock Speed (I) Clock cycle time is the reciprocal of clock frequencyExample, an 800 MHz clock has a cycle time of 1.25 nso 1/800,000,000 = 0.00000000125 = 1.25 * 10-9 Clock-speed CPU-performance Clock-CPU- The CPU time required to run a program is given by the general performance equation:9 10. Clock Speed (II) Therefore, we can improve CPU throughput when we reduce the number of instructions in a program the number of cycles per instruction the number of nanoseconds per clock cycle But, in general Multiplication takes longer than addition Floating point operations require more cycles than integer operations Accessing memory takes longer than accessing registersFeatures of Computers: Speed andReliabilitySpeedCPU speedSystem-clock / Bus speedSystem-Memory-access speedMemory-Peripheral device speedReliability10 11. CPU SpeedCPU clock speed: in cycles per second("hertz")Example: 700MHz Pentium III, 3GHzPentium IVbut different CPU designs do differentamounts of work in one clock cycleOther measures of speedflops (floating-point operations per second) flops (floating-mips (million instructions per second) mipsSystem-Clock / Bus Speed Speed of communication between CPU, memory and peripheral devices Depends on main board design Examples: Examples: o Intel 1.50GHz Pentium-4 works on a 400MHz bus Pentium- speed 11 12. Memory-Access Speed RAM about 60ns (1 nanosecond = a billionth of a second), and getting faster may be rated with respect to bus speed (e.g., speed PC-100) PC- Cache memory faster than main memory (about 20ns access speed), but more expensive contains data which the CPU is likely to use nextPeripheral Device Speed Mass storage Examples: o 3.5in 1.4MB floppy disk: about 200kb/sec at 300 rpm (revolutions per minute) o Hard drive: up to 160 GB of storage, average seek time about 6 milliseconds, and 7,200 rpm Communications Examples: modems at 56 kilobits per second, and network cards at 10 or 100 megabits per second I/O Examples: ISA, PCI, IDE, SCSI, ATA, USB, etc....12 13. Cache Memory and Virtual Memory Cache memory random access memory that a processor can access more quickly than regular RAM Virtual memory an extension of RAM using the hard diskallows the computer to behave as though it hasmore memory than what is physically availableInterrupts and Exceptions Events that alter the normal execution of a program Exceptions are triggered within the processor Arithmetic errors, overflow or underflow Invalid instructions User-defined break points User- Interrupts are triggered outside the processor I/O requests Each type of interrupt or exception is associated with a procedure that directs the actions of the CPU 13 14. Fetch-decode-execute CycleA computer runs programs by performingfetch-decode-execute cyclesfetch next instruction from Example: instruction wordExample: memory ( word pointed to at mem[PC] is 0x20A9FFFD mem[PC] by PC ) and place in IR001000 00101 01001 1111111111111101decode instruction in the IROpcode 8 is add immediate,immediateto determine type source reg is $5, target reg$5, targetis reg $9, add amount is 3 $9, execute instructionSend reg $5 and -3 to ALU,add them, put result in reg $9go to the next instructionPC = PC + 4 (next word in memory)Accessing Memory (I) Every memory access needs an address word to be sent from CPU to memory Address range is 0x00000000 to 0xFFFFFFFFo about 4 billion bytes of addressable space Addresses output by the CPU go to the Memory Address Register (MAR) During a fetch access, the PC value is copied to MAR During a load/store access, a computed address from the ALU is copied to MAR address14 15. Accessing Memory (II) Why compute load/store addresses?32(instruction bits) 6(opcode bits) =26(available bits)26(availableinsufficient to hold a full memory address Solution: register based addressinguse 26-bits to specify a base address GPR, a 26- GPR,target GPR, plus a 16-bit signed offsetGPR,16-ALU computes memory reference address onthe fly as: MAR = base GPR + offsetflytarget GPR receives/supplies memory dataMemory SegmentsMemory is organized into segments, each with its own segments,purpose0x00000000kernel code reserved for OS0x00400000text segmentusers codeuser0x10000000data segmentfree space,grows and memory shrinks as (heap)heap)addresses stack/data stack segment segments0x80000000changereserved for thekernel code0xFFFFFFFFOperating System (OS)and data15 16. Text Segment Starts at memory address 0x00400000 runs up to address 0x0FFFFFFF Contains users executable program code (ofte

Recommended

View more >