ivrs for attendance mgmt (documentation)-001

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IVRS FOR ATTENDANCE MANAGEMENT

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Page 1: IVRS for Attendance Mgmt (DOCUMENTATION)-001

IVRS FOR ATTENDANCE MANAGEMENT

Page 2: IVRS for Attendance Mgmt (DOCUMENTATION)-001

INDEX

CONTENTS

1. Abbreviations

2. Figures locations

3. Abstract

4. Introduction

5. Block Diagram

6. Block Diagram Description

7. Schematic

8. Schematic Description

9. Hardware Components

10. Circuit Description

11. Software components

Embedded ‘C’

12. KEIL procedure description

13. Conclusion (or) Synopsis

14. Future Aspects

15. Bibliography

Page 3: IVRS for Attendance Mgmt (DOCUMENTATION)-001

ABREVATIONS:

Microcontroller:

Symbol Name

ACC Accumulator

B B register

PSW Program status word

SP Stack pointer

DPTR Data pointer 2 bytes

DPL Low byte

DPH High byte

P0 Port0

P1 Port1

P2 Port2

P3 Port3

IP Interrupt priority control

IE Interrupt enable control

TMOD Timer/counter mode control

TCON Timer/counter control

T2CON Timer/counter 2 control

T2MOD Timer/counter mode2 control

TH0 Timer/counter 0high byte

TL0 Timer/counter 0 low byte

TH1 Timer/counter 1 high byte

TL1 Timer/counter 1 low byte

TH2 Timer/counter 2 high byte

TL2 Timer/counter 2 low byte

SCON Serial control

SBUF Serial data buffer

PCON Power control

Page 4: IVRS for Attendance Mgmt (DOCUMENTATION)-001

Interactive Voice Response System (IVRS) for attendance management

ABSTRACT

Most of the services provided in today’s world are voice interactive, you call

up bank and computerized voice will speak to you, and guide you to enter particular

number from your phone to get the desired service .this service is only available

through the fast speed computers and having huge amount of memory. We

implemented interactive service for industrial application.

“Interactive Voice Response System”, IVRS is an automated system to be

used in colleges which enables the user to get the student attendance details.

This project is designed around a micro controller, which forms the control

unit of the project. According to this project, the system being designed is to be

placed in colleges being connected to devices to get the details of attendance. The

person who wants to gets the details needs to call to a mobile being connected to

designed embedded system. After connection establishment, the user is asked to press

password of students to get a student attendance in voice announcement. DTMF

decoder an interface between mobile phone and micro controller, Voice processing

unit, to get the attendance of particular student in the voice announcement. The

student details of attendance stored in the eeprom and keypad interfacing with

microcontroller to change the attendance of the students.

Page 5: IVRS for Attendance Mgmt (DOCUMENTATION)-001

INTRODUCTION

1.1. EMBEDDED SYSTEMS

Embedded systems are designed to do some specific task rather than be a

general-purpose computer for multiple tasks.Some also has real time performance

constraints that must be met, for reason such as safety and usability; others may have

low or no performance requirements, allowing the system hardware to be simplified

to reduce costs.

An embedded system is not always a separate block - very often it is

physically built-in to the device it is controlling.

The software written for embedded systems is often called firmware, and is

stored in read-only memory or flash convector chips rather than a disk drive. It often

runs with limited computer hardware resources: small or no keyboard, screen, and

little memory.

Communication:

Communication refers to the sending, receiving and processing of information

by electric means. As such, it started with wire telegraphy in the early 80’s,

developing with telephony and radio some decades later. Radio communication

became the most widely used and refined through the invention of and use of

transistor, integrated circuit, and other semi-conductor devices. Most recently, the use

of satellites and fiber optics has made communication even more wide spread, with an

increasing emphasis on computer and other data communications.

A modern communications system is first concerned with the sorting,

processing and storing of information before its transmission. The actual transmission

then follows, with further processing and the filtering of noise. Finally we have

reception, which may include processing steps such as decoding, storage and

interpretation. In this context, forms of communications include radio, telephony and

telegraphy, broadcast, point to point and mobile communications (commercial and

military), computer communications, radar, radio telemetry and radio aids to

navigation. It is also important to consider the human factors influencing a particular

system, since they can always affect its design, planning and use.

Page 6: IVRS for Attendance Mgmt (DOCUMENTATION)-001

Wireless communication has become an important feature for commercial

products and a popular research topic within the last ten years. There are now more

mobile phone subscriptions than wired-line subscriptions. Lately, one area of

commercial interest has been low-cost, low-power, and short-distance wireless

communication used for personal wireless networks." Technology advancements are

providing smaller and more cost effective devices for integrating computational

processing, wireless communication, and a host of other functionalities. These

embedded communications devices will be integrated into applications ranging from

homeland security to industry automation and monitoring. They will also enable

custom tailored engineering solutions, creating a revolutionary way of disseminating

and processing information. With new technologies and devices come new business

activities, and the need for employees in these technological areas. Engineers who

have knowledge of embedded systems and wireless communications will be in high

demand. Unfortunately, there are few adorable environments available for

development and classroom use, so students often do not learn about these

technologies during hands-on lab exercises. The communication mediums were

twisted pair, optical fiber, infrared, and generally wireless radio.

Page 7: IVRS for Attendance Mgmt (DOCUMENTATION)-001

Block diagram:

Block diagram description:

In this section we will be discussing about compete block diagram and its

functional description of our project. And also brief description about each block

of the block diagram.

Power supply

Micro controller

DTMF decoder

Voice processing unit

EEPROM

LCD

Keypad

MICRO CONTROLLER

Voice processing

unit

EEPROM

DTMF

Mobile phone

Power Supply

KEYPAD

LCD

Page 8: IVRS for Attendance Mgmt (DOCUMENTATION)-001

Power supply:

In this system we are using 5V power supply for microcontroller of

Transmitter section as well as receiver section. We use rectifiers for converting the

A.C. into D.C and a step down transformer to step down the voltage. The full

description of the Power supply section is given in this documentation in the

following sections i.e. hardware components.

Microcontroller (8051):

In this project work the micro-controller is playing a major role. Micro-

controllers were originally used as components in complicated process-control

systems. However, because of their small size and low price, Micro-controllers are

now also being used in regulators for individual control loops. In several areas

Micro-controllers are now outperforming their analog counterparts and are cheaper as

well.

The purpose of this project work is to present control theory that is relevant to

the analysis and design of Micro-controller system with an emphasis on basic concept

and ideas. It is assumed that a Microcontroller with reasonable software is available

for computations and simulations so that many tedious details can be left to the

Microcontroller. The control system design is also carried out up to the stage of

implementation in the form of controller programs in assembly language OR in C-

Language.

DTMF (DUAL TONE MULTI FREQUENCY):

A DTMF is used to decode the frequency and to give the instructions to

microcontroller.

Voice processing unit:

Voice processing unit is used to give voice instructions, which is done with the

help of voice IC.

Page 9: IVRS for Attendance Mgmt (DOCUMENTATION)-001

LCD Display Section: This section is basically meant to show up the status of the

project. This project makes use of Liquid Crystal Display to display / prompt for

necessary information.

Keypad Section: This section consists of a Linear Keypad. This keypad is used to

enter the no. of liters of petrol required. The keypad is interfaced to microcontroller

which continuously scans the keypad.

Schematic:

Page 10: IVRS for Attendance Mgmt (DOCUMENTATION)-001

Schematic Explanation:

The main aim of this power supply is to convert the 230V AC into 5V DC in

order to give supply for the TTL. This schematic explanation includes the detailed pin

connections of every device with the microcontroller.

This schematic explanation includes the detailed pin connections of every

device with the microcontroller. The pin no 23 and 25 are grounded in such a way that

voice record and play back will be possible. The mobile will be connected to the

speaker pins.

Let us see the pin connections of each and every device with the

microcontroller in detail.

Power Supply:

In this process we are using a step down transformer, a bridge rectifier, a

smoothing circuit and the RPS.

Page 11: IVRS for Attendance Mgmt (DOCUMENTATION)-001

At the primary of the transformer we are giving the 230V AC supply. The

secondary is connected to the opposite terminals of the Bridge rectifier as the input.

From other set of opposite terminals we are taking the output to the rectifier.

The bridge rectifier converts the AC coming from the secondary of the

transformer into pulsating DC. The output of this rectifier is further given to the

smoother circuit which is capacitor in our project. The smoothing circuit eliminates

the ripples from the pulsating DC and gives the pure DC to the RPS to get a constant

output DC voltage. The RPS regulates the voltage as per our requirement.

Microcontroller:

The microcontroller AT89S51 with Pull up resistors at Port0 and crystal

oscillator of 11.0592 MHz crystal in conjunction with couple of capacitors of is

placed at 18th & 19th pins of 89S51 to make it work (execute) properly.

DTMF:

This is nothing but a Dual Tune Multiple Frequency. This receives the signals

from the mobile and sends it to the microcontroller. D0, D1, D2, D3 and clock pins

of DTMF are connected to the P0.0, P0.1, P0.2, P0.3, P0.4

Voice IC (APR 9600):

This device will receive the signal of human voice through mike. It is having

28 pins on its IC. It consists of 8 message lines (or channels) to which we can give a

voice message and it can operate in any one of two modes (recording and playback).

The supply pins are connected to power supply circuit. Analog (AGND) and

digital ground (DGND) pins of voice decoder IC are connected to VSS of power

supply. Analog power supply. All the voice channels pins are connected to the port1

of microcontroller.

EEPROM:

The SDA and SCL pins of the eeprom are connected to the P0.6 and P0.7

Page 12: IVRS for Attendance Mgmt (DOCUMENTATION)-001

Keypad:

In the keypad matrix, the columns are connected to the P3.4 to P3.7 and rows are

connected to the P3.0 to P3.3

HARDWARE DESIGN

Introduction

In this chapter we are going to cover all parts of “Interactive Voice Response

System (IVRS)” in detailed manner and their functions in brief. Here we are more

interested about the Microcontroller since it is the heart of the project. So the

complete architecture is explained and also significance of the Microcontroller.

Hardware components:

1. power supply

2. Micro controller

3. DTMF decoder

4. Voice IC

5. EEPROM

6. LCD

7. keypad

MICRO CONTROLLER (AT89S51)

Introduction

A Micro controller consists of a powerful CPU tightly coupled with memory,

various I/O interfaces such as serial port, parallel port timer or counter, interrupt

controller, data acquisition interfaces-Analog to Digital converter, Digital to Analog

converter, integrated on to a single silicon chip.

If a system is developed with a microprocessor, the designer has to go for

external memory such as RAM, ROM, EPROM and peripherals. But controller is

provided all these facilities on a single chip. Development of a Micro controller

reduces PCB size and cost of design.

Page 13: IVRS for Attendance Mgmt (DOCUMENTATION)-001

One of the major differences between a Microprocessor and a Micro controller

is that a controller often deals with bits not bytes as in the real world application.

Intel has introduced a family of Micro controllers called the MCS-51.

Figure: micro controller

Features:

• Compatible with MCS-51® Products

• 4K Bytes of In-System Programmable (ISP) Flash Memory

– Endurance: 1000 Write/Erase Cycles

• 4.0V to 5.5V Operating Range

• Fully Static Operation: 0 Hz to 33 MHz

• Three-level Program Memory Lock

• 128 x 8-bit Internal RAM

• 32 Programmable I/O Lines

• Two 16-bit Timer/Counters

• Six Interrupt Sources

• Full Duplex UART Serial Channel

• Low-power Idle and Power-down Modes

Description

The AT89S51 is a low-power, high-performance CMOS 8-bit microcontroller with 4K

bytes of in-system programmable Flash memory. The device is manufactured using

Atmel’s high-density nonvolatile memory technology and is compatible with the industry-

standard 80C51 instruction set and pinout. The on-chip Flash allows the program memory

to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By

combining a versatile 8-bit CPU with in-system programmable Flash on a monolithic chip,

the Atmel AT89S51 is a powerful microcontroller which provides a highly-flexible and

cost-effective solution to many embedded control applications.

Page 14: IVRS for Attendance Mgmt (DOCUMENTATION)-001

Block diagram:

Figure: Block diagram

Pin diagram:

Figure: pin diagram of micro controller

Page 15: IVRS for Attendance Mgmt (DOCUMENTATION)-001

Pin Description

VCC - Supply voltage.

GND - Ground.

Port 0:

Port 0 is an 8-bit open drain bidirectional I/O port. As an output port, each pin can

sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high-

impedance inputs. Port 0 can also be configured to be the multiplexed low-order

address/data bus during accesses to external program and data memory. In this mode, P0

has internal pull-ups. Port 0 also receives the code bytes during Flash programming and

outputs the code bytes during program verification. External pull-ups are required

during program verification.

Port 1:

Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 1 output

buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled

high by the internal pull-ups and can be used as inputs. As inputs, Port 1 pins that are

externally being pulled low will source current (IIL) because of the internal pull-ups. Port 1

also receives the low-order address bytes during Flash programming and verification.

Port 2:

Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 2 output

buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled

high by the internal pull-ups and can be used as inputs. As inputs, Port 2 pins that are

externally being pulled low will source current (IIL) because of the internal pull-ups. Port 2

also receives the high-order address bits and some control signals during Flash

programming and verification.

Page 16: IVRS for Attendance Mgmt (DOCUMENTATION)-001

Port 3:

Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 3 output

buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled

high by the internal pull-ups and can be used as inputs. As inputs, Port 3 pins that are

externally being pulled low will source current (IIL) because of the pull-ups. Port 3

receives some control signals for Flash programming and verification. Port 3 also serves the

functions of various special features of the AT89S51, as shown in the following table.

RST:

Reset input. A high on this pin for two machine cycles while the oscillator is

running resets the device. This pin drives High for 98 oscillator periods after the Watchdog

times out. The DISRTO bit in SFR AUXR (address 8EH) can be used to disable this

feature. In the default state of bit DISRTO, the RESET HIGH out feature is enabled.

ALE/PROG:

Address Latch Enable (ALE) is an output pulse for latching the low byte of the

address during accesses to external memory. This pin is also the program pulse input

(PROG) during Flash programming. In normal operation, ALE is emitted at a constant rate

of 1/6 the oscillator frequency and may be used for external timing or clocking purposes.

Note, however, that one ALE pulse is skipped during each access to external data memory.

If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit

set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly

pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external

execution mode.

Page 17: IVRS for Attendance Mgmt (DOCUMENTATION)-001

PSEN:

Program Store Enable (PSEN) is the read strobe to external program memory. When

the AT89S51 is executing code from external program memory, PSEN is activated twice

each machine cycle, except that two PSEN activations are skipped during each access to

external data memory.

EA/VPP:

External Access Enable. EA must be strapped to GND in order to enable the device

to fetch code from external program memory locations starting at 0000H up to FFFFH.

Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA

should be strapped to VCC for internal program executions. This pin also receives the 12-

volt programming enable voltage (VPP) during Flash programming.

XTAL1:

Input to the inverting oscillator amplifier and input to the internal clock operating

circuit.

XTAL2:

Output from the inverting oscillator amplifier.

Oscillator Characteristics:

XTAL1 and XTAL2 are the input and output, respectively, of an inverting

amplifier which can be configured for use as an on-chip oscillator, as shown in Figs

6.2.3. Either a quartz crystal or ceramic resonator may be used. To drive the device

from an external clock source, XTAL2 should be left unconnected while XTAL1 is

driven as shown in Figure 6.2.4.There are no requirements on the duty cycle of the

external clock signal, since the input to the internal clocking circuitry is through a

divide-by-two flip-flop, but minimum and maximum voltage high and low time

specifications must be observed.

Page 18: IVRS for Attendance Mgmt (DOCUMENTATION)-001

Fig 6.2.3 Oscillator Connections Fig 6.2.4 External Clock Drive Configuration

Page 19: IVRS for Attendance Mgmt (DOCUMENTATION)-001

DTMF (DUAL TONE MULTI FREQUENCY)

The M-8870 is a full DTMF Receiver that integrates both band split filter and

decoder functions into a single 18-pin DIP or SOIC package. Manufactured using

CMOS process technology, the M-8870 offers low power consumption (35 mW max)

and precise data handling. Its filter section uses switched capacitor technology for

both the high and low group filters and for dial tone rejection. Its decoder uses digital

counting techniques to detect and decode all 16 DTMF tone pairs into a 4-bit code.

External component count is minimized by provision of an on-chip differential input

amplifier, clock generator, and latched tri-state interface bus. Minimal external

components required include a low-cost 3.579545 MHz color burst crystal, a timing

resistor, and a timing capacitor.

The -8870 provides a “power-down” option which, when enabled, drops

consumption to less than 0.5 mW. The M-8870-02 can also inhibit the decoding of

fourth column digits

Features

• Low Power Consumption

• Adjustable Acquisition and Release Times

• Central Office Quality and Performance

• Power-down and Inhibit Modes (-02 only)

• Inexpensive 3.58 MHz Time Base

• Single 5 Volt Power Supply

• Dial Tone Suppression

Pin diagram:

Page 20: IVRS for Attendance Mgmt (DOCUMENTATION)-001

BLOCK DIAGRAM:

Page 21: IVRS for Attendance Mgmt (DOCUMENTATION)-001

Functional Description

M-8870 operating functions include a band split filter that separates the high

and low tones of the received pair, and a digital decoder that verifies both the

frequency and duration of the received tones before passing the resulting 4-bit code to

the output bus.

Filter

The low and high group tones are separated by applying the dual-tone signal

to the inputs of two 6th order switched capacitor band pass filters with bandwidths

that correspond to the bands enclosing the low and high group tones. The filter also

incorporates notches at 350 and 440 Hz, providing excellent dial tone rejection. Each

filter output is followed by a single-order switched capacitor section that smoothes the

signals prior to limiting. Signal limiting is performed by high gain comparators

provided with hysteresis to prevent detection of unwanted low-level signals and noise.

The comparator outputs provide full-rail logic swings at the frequencies of the

incoming tones.

Decoder

The M-8870 decoder uses a digital counting technique to determine the

frequencies of the limited tones and to verify that they correspond to standard DTMF

frequencies. A complex averaging algorithm is used to protect against tone simulation

by extraneous signals (such as voice) while tolerating small frequency variations. The

algorithm ensures an optimum combination of immunity to talkoff and tolerance to

interfering signals (third tones) and noise. When the detector recognizes the

simultaneous presence of two valid tones (known as signal condition), it raises the

Early Steering flag (ESt). Any subsequent loss of signal condition will cause ESt to

fall.

Steering Circuit

Before a decoded tone pair is registered, the receiver checks for a valid signal

duration (referred to as character- recognition-condition). This check is performed by

an external RC time constant driven by ESt. A logic high on ESt causes VC to rise as

the capacitor discharges. Provided that signal condition is maintained (ESt remains

high) for the validation period (tGTF), VC reaches the threshold (VTSt) of the

steering logic to register the tone pair, thus latching its corresponding 4-bit code into

the output latch. At this point, the GT output is activated and drives VC to VDD.

Page 22: IVRS for Attendance Mgmt (DOCUMENTATION)-001

GT continues to drive high as long as ESt remains high. Finally, after a short delay to

allow the output latch to settle, the delayed steering output flag (StD) goes high,

signaling that a received tone pair has been registered. The contents of the output

latch are made available on the 4-bit output bus by raising the threestate control input

(OE) to a logic high. The steering circuit works in reverse to validate the interdigit

pause between signals. Thus, as well as rejecting signals too short to be considered

valid, the receiver will tolerate signal interruptions (dropouts) too short to be

considered a valid pause. This capability, together with the ability to select the

steering time constants externally, allows the designer to tailor performance to meet a

wide variety of system requirements.

Page 23: IVRS for Attendance Mgmt (DOCUMENTATION)-001

Input Configuration

The input arrangement of the M-8870 provides a differential input operational

amplifier as well as a bias source (VREF) to bias the inputs at mid-rail. Provision is

made for connection of a feedback resistor to the op-amp output (GS) for gain

adjustment. In a single-ended configuration, the input pins are connected as shown in

the Single - Ended Input with the op-amp connected for unity gain and VREF biasing

the input at 1/2VDD. The Differential Input Configuration bellow permits gain

adjustment with the feedback resistor R5.

DTMF Clock Circuit

The internal clock circuit is completed with the addition of a standard 3.579545 MHz

television color burst crystal. The crystal can be connected to a single M-8870 as or to

a series of M-8870s. As illustrated in the Common Crystal Connection below, a single

crystal can be used to connect a series of M-8870s by coupling the oscillator output of

each M-8870 through a 30pF capacitor to the oscillator input of the next M-8870.

Explanation of Events

(A) Tone bursts detected, tone duration invalid, outputs not updated.

(B) Tone #n detected, tone duration valid, tone decoded and latched in outputs.

Page 24: IVRS for Attendance Mgmt (DOCUMENTATION)-001

(C) End of tone #n detected, tone absent duration valid, outputs remain latched until

next valid tone.

(D) Outputs switched to high impedance state.

(E) Tone #n + 1 detected, tone duration valid, tone decoded and latched in outputs

(currently high impedance).

(F) Acceptable dropout of tone #n + 1, tone absent duration invalid, outputs remain

latched.

(G) End of tone #n + 1 detected, tone absent duration valid, outputs remain latched

until next valid tone.

Explanation of Symbols

VIN : DTMF composite input signal.

ESt : Early steering output. Indicates detection of valid tone

frequencies.

St/GT : Steering input/guard time output. Drives external RC timing

circuit.

Q1 - Q4 : 4-bit decoded tone output.

StD : Delayed steering output. Indicates that valid frequencies have

been present/ absent for the required guardtime, thus

constituting a valid signal.

OE : Output enable (input). A low level shifts Q1 - Q4 to its high

Impedance state.

tREC : Maximum DTMF signal duration not detected as valid.

tREC : Minimum DTMF signal duration required for valid recognition.

tID : Minimum time between valid DTMF signals.

tDO : Maximum allowable dropout during valid DTMF signal.

tDP : Time to detect the presence of valid DTMF signals.

tDA : Time to detect the absence of valid DTMF signals.

TGTP : Guard time, tone present.

TGTA : Guard time, tone absent.

Page 25: IVRS for Attendance Mgmt (DOCUMENTATION)-001

REGULATED POWER SUPPLY

The power supplies are designed to convert high voltage AC mains

electricity to a suitable low voltage supply for electronics circuits and other devices. A

RPS (Regulated Power Supply) is the Power Supply with Rectification, Filtering

and Regulation being done on the AC mains to get a Regulated power supply for

Microcontroller and for the other devices being interfaced to it.

A power supply can by broken down into a series of blocks, each of which

performs a particular function. A d.c power supply which maintains the output voltage

constant irrespective of a.c mains fluctuations or load variations is known as

“Regulated D.C Power Supply”

For example a 5V regulated power supply system as shown below:

Page 26: IVRS for Attendance Mgmt (DOCUMENTATION)-001

Transformer:

A transformer is an electrical device which is used to convert electrical

power from one Electrical circuit to another without change in frequency.

Transformers convert AC electricity from one voltage to another with little

loss of power. Transformers work only with AC and this is one of the reasons why

mains electricity is AC. Step-up transformers increase in output voltage, step-down

transformers decrease in output voltage. Most power supplies use a step-down

transformer to reduce the dangerously high mains voltage to a safer low voltage. The

input coil is called the primary and the output coil is called the secondary. There is no

electrical connection between the two coils; instead they are linked by an alternating

magnetic field created in the soft-iron core of the transformer. The two lines in the

middle of the circuit symbol represent the core. Transformers waste very little power

so the power out is (almost) equal to the power in. Note that as voltage is stepped

down current is stepped up. The ratio of the number of turns on each coil, called the

turn’s ratio, determines the ratio of the voltages. A step-down transformer has a large

number of turns on its primary (input) coil which is connected to the high voltage

mains supply, and a small number of turns on its secondary (output) coil to give a low

output voltage.

An Electrical Transformer

Page 27: IVRS for Attendance Mgmt (DOCUMENTATION)-001

Turns ratio = Vp/ VS = Np/NS

Power Out= Power In

VS X IS=VP X IP

Vp = primary (input) voltage

Np = number of turns on primary coil

Ip  = primary (input) current    

RECTIFIER:

A circuit which is used to convert a.c to dc is known as RECTIFIER. The

process of conversion a.c to d.c is called “rectification”

TYPES OF RECTIFIERS: Half wave Rectifier

Full wave rectifier

1. Centre tap full wave rectifier.

2. Bridge type full bridge rectifier.

Comparison of rectifier circuits:

Parameter Type of Rectifier

Half wave Full wave Bridge

Number of diodes 1 2 4

PIV of diodes Vm 2Vm Vm

D.C output voltage Vm/z 2Vm/ 2Vm/

Vdc, at no-load 0.318Vm 0.636Vm 0.636Vm

Ripple factor 1.21 0.482 0.482

Ripple frequency F 2f 2f

Rectification efficiency 0.406 0.812 0.812

Transformer Utilization Factor(TUF)

0.287 0.693 0.812

RMS voltage Vrms Vm/2 Vm/√2 Vm/√2

Page 28: IVRS for Attendance Mgmt (DOCUMENTATION)-001

Full-wave Rectifier:From the above comparison we came to know that full wave bridge rectifier

as more advantages than the other two rectifiers. So, in our project we are using full

wave bridge rectifier circuit.

Bridge Rectifier:

A bridge rectifier makes use of four diodes in a bridge arrangement to

achieve full-wave rectification. This is a widely used configuration, both with

individual diodes wired as shown and with single component bridges where the diode

bridge is wired internally.

A bridge rectifier makes use of four diodes in a bridge arrangement as shown

in fig (a) to achieve full-wave rectification. This is a widely used configuration, both

with individual diodes wired as shown and with single component bridges where the

diode bridge is wired internally.

Fig (A)

Operation:

During positive half cycle of secondary, the diodes D2 and D3 are in forward biased

while D1 and D4 are in reverse biased as shown in the fig(b). The current flow

direction is shown in the fig (b) with dotted arrows.

Page 29: IVRS for Attendance Mgmt (DOCUMENTATION)-001

Fig (B)

During negative half cycle of secondary voltage, the diodes D1 and D4 are

in forward biased while D2 and D3 are in reverse biased as shown in the fig(c). The

current flow direction is shown in the fig (c) with dotted arrows.

Fig(C)

Filter:A Filter is a device which removes the a.c component of rectifier output but

allows the d.c component to reach the load.

Capacitor Filter:

We have seen that the ripple content in the rectified output of half wave

rectifier is 121% or that of full-wave or bridge rectifier or bridge rectifier is 48%

such high percentages of ripples is not acceptable for most of the applications. Ripples

can be removed by one of the following methods of filtering.

(a) A capacitor, in parallel to the load, provides an easier by –pass for the ripples

voltage though it due to low impedance. At ripple frequency and leave the D.C. to

appear at the load.

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(b) An inductor, in series with the load, prevents the passage of the ripple current (due

to high impedance at ripple frequency) while allowing the d.c (due to low resistance

to d.c).

(c) Various combinations of capacitor and inductor, such as L-section filter section

filter, multiple section filter etc. which make use of both the properties mentioned in

(a) and (b) above. Two cases of capacitor filter, one applied on half wave rectifier and

another with full wave rectifier.

Filtering is performed by a large value electrolytic capacitor connected

across the DC supply to act as a reservoir, supplying current to the output when the

varying DC voltage from the rectifier is falling. The capacitor charges quickly near

the peak of the varying DC, and then discharges as it supplies current to the output.

Filtering significantly increases the average DC voltage to almost the peak value

(1.4 × RMS value).

To calculate the value of capacitor(C),

C = ¼*√3*f*r*Rl

Where,

f = supply frequency,

r = ripple factor,

Rl = load resistance

Note: In our circuit we are using 1000µF hence large value of capacitor is placed to reduce ripples and to improve the DC component.

Regulator:

Voltage regulator ICs is available with fixed (typically 5, 12 and 15V) or

variable output voltages. The maximum current they can pass also rates them.

Negative voltage regulators are available, mainly for use in dual supplies. Most

regulators include some automatic protection from excessive current ('overload

protection') and overheating ('thermal protection'). Many of the fixed voltage

regulators ICs have 3 leads and look like power transistors, such as the 7805 +5V 1A

regulator shown on the right. The LM7805 is simple to use. You simply connect the

positive lead of your unregulated DC power supply (anything from 9VDC to 24VDC)

to the Input pin, connect the negative lead to the Common pin and then when you turn

on the power, you get a 5 volt supply from the output pin.

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Fig 6.1.6 A Three Terminal Voltage Regulator

78XX:

The Bay Linear LM78XX is integrated linear positive regulator with three

terminals. The LM78XX offer several fixed output voltages making them useful in

wide range of applications. When used as a zener diode/resistor combination

replacement, the LM78XX usually results in an effective output impedance

improvement of two orders of magnitude, lower quiescent current. The LM78XX is

available in the TO-252, TO-220 & TO-263packages,

Features:

• Output Current of 1.5A

• Output Voltage Tolerance of 5%

• Internal thermal overload protection

• Internal Short-Circuit Limited

• Output Voltage 5.0V, 6V, 8V, 9V, 10V, 12V, 15V, 18V, 24V.

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APR 9600 RE-Recording Voice IC

Single-chip Voice Recording & Playback Device

60- Second Duration

1 Features:

Single-chip, high-quality voice recording & playback solution

No external ICs required

Minimum external components

Non-volatile Flash memory technology

No battery backup required

User-Selectable messaging options

Random access of multiple fixed-duration messages

Sequential access of multiple variable-duration messages

User-friendly, easy-to-use operation

Programming & development systems not required

Level-activated recording & edge-activated play back switches

Low power consumption

Operating current: 25 mA typical

Standby current: 1 uA typical

Automatic power-down

Chip Enable pin for simple message expansion

2 General Description:

The APR9600 device offers true single-chip voice recording, non-volatile

storage, and playback capability for 40 to 60 seconds. The device supports both

random and sequential access of multiple messages. Sample rates are user- selectable,

allowing designers to customize their design for unique quality and storage time

needs. Integrated output amplifier, microphone amplifier, and AGC circuits greatly

simplify system design. the device is ideal for use in portable voice recorders, toys,

and many other consumer and industrial applications.

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APLUS integrated achieves these high levels of storage capability by using its

proprietary analog/multilevel storage technology implemented in an advanced Flash

non-volatile memory process, where each memory cell can store 256 voltage levels.

This technology enables the APR9600 device to reproduce voice signals in their

natural form. It eliminates the need for encoding and compression, which often

introduce distortion.

Fig 12: The APR9600 DIP & SOP

3 Functional Description:

APR9600 block diagram is included in order to describe the device's internal

architecture. At the left hand side of the diagram are the analog inputs. A differential

microphone amplifier, including integrated AGC, is included on-chip for applications

requiring use. The amplified microphone signals fed into the device by connecting the

ANA_OUT pin to the ANA_IN pin through an external DC blocking capacitor.

Recording can be fed directly into the ANA_IN pin through a DC blocking capacitor,

however, the connection between ANA_IN andANA OUT is still required for

playback. The next block encountered by the input signal is the internal anti-aliasing

filter. The filter automatically adjusts its response According to the sampling

frequency selected so Shannon’s Sampling Theorem is satisfied. After anti-aliasing

filtering is accomplished the signal is ready to be clocked into the memory array. This

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storage is accomplished through a combination of the Sample and Hold circuit and the

Analog Write/Read circuit. Either the Internal Oscillator or an external clock source

clocks these circuits. When playback is desired the previously stored recording is

retrieved from memory, low pass filtered, and amplified as shown on the right hand

side of the diagram. The signal can be heard by connecting a speaker to the SP+ and

SP- pins. Chip-wide management is accomplished through the device control block

shown in the upper right hand corner. Message management is provided through the

message control block represented in the lower center of the block diagram. More

detail on actual device application can be found in the Sample Application section.

More detail on sampling control can be found in the Sample Rate and Voice Quality

section. More detail on Message management and device control can be found in the

Message Management section.

Fig 13: APR9600 Block Diagram

Keypad Section:

There are 7 keys are used in this project. The keys used in this project are a linear

keypad. This is having two pins. One end of the keys is connected to ground and the

other end is connected to one of the port of the micro controller. The controlling

action will be done through the micro controller. If any key is pressed, the

corresponding key scan will be done with help of controller.

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EEPROM 24C02

The project ‘Smart Card based Library Management System’ makes use of smart card

technology to provide authentication. The Smart card is taken as a means of

authentication with the details like student name, id of book being taken by the

student etc stored on it. But in order to give id s to all the books available a memory is

required. This requirement is fulfilled by making use of EEPROM.

The EEPROM used in the project is 24C02.

FEATURES:

1. Serial 2k (256 X 8) EEPROM

2. Single Supply Voltage

3. 3V to 5.5V

4. Two Wire Serial Interface, Fully I2C bus compatible

5. Automatic Address Incrementing

PIN DESCRIPION:

The memories are compatible with the I2C standard, two wire serial interfaces

which uses a bi-directional data bus and serial clock. The memories carry a built-in 4

bit, unique device identification code (1010) corresponding to the I2C bus definition.

This is used together with 3 chip enable inputs (E2, E1, and E0) so that up to 8 x 2K

devices may be attached to the I2C bus and selected individually.

The memories behave as a slave device in the I2C protocol with all memory

operations synchronized by the serial clock. Read and write operations are initiated by

a START condition generated by the bus master. The START condition is followed

by a stream of 7 bits (identification code 1010), plus one read/write bit and terminated

by an acknowledge bit.

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PIN DEFINITION:

Serial Clock (SCL)” The SCL input pin is used to synchronize all data in and out of

the memory. A resistor can be connected from the SCL line to VCC to act as a pull

up.

Serial Data (SDA): The SDA pin is bi-directional and is used to transfer data in or

out of the memory. It is an open drain output that may be wire-OR’ed with other open

drain or open collector signals on the bus. A resistor must be connected from the SDA

bus line to VCC to act as pull up.

Chip Enable (E2 - E0): These chip enable inputs are used to set the 3 least

significant bits (b3, b2, b1) of the 7 bit device select code. These inputs may be driven

dynamically or tied to VCC or VSS to establish the device select code.

Mode (MODE): The MODE input is available on pin 7 and may be driven

dynamically. It must be at VIL or VIH for the Byte Write mode, VIH for Multi-byte

Write mode or VIL for Page Write mode. When unconnected, the MODE input is

internally read as a VIH (Multi-byte Write mode).

Write Control (WC): A hardware Write Control feature (WC) is offered only for

T24W02 and ST25W02 versions on pin 7. This feature is useful to protect the

contents of the memory from any erroneous erase/write cycle. The Write Control

signal is used to enable (WC = VIH) or disable (WC = VIL) the internal write

protection. When unconnected, the WC input is internally read as VIL and the

memory area is not write-protected.

I2C BUS OPERATION

The ST24/25x02 supports the I2C protocol. This protocol defines any device that

sends data onto the bus as a transmitter and any device that reads the data as a

receiver. The device that controls the data transfer is known as the master and the

other as the slave. The master will always initiate a data transfer and will provide the

serial clock for synchronization. The ST24C02 is always slave devices in all

communications.

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Start Condition: START is identified by a high to low transition of the SDA line

while the clock SCL is stable in the high state. A START condition must precede any

command for data transfer. Except during a programming cycle, the ST24/25x02

continuously monitor the SDA and SCL signals for a START condition and will not

respond unless one is given.

Stop Condition: STOP is identified by a low to high transition of the SDA line while

the lock SCL is stable in the high state. A STOP condition terminates communication

between the ST24/25x02 and the bus master. A STOP condition at the end of a Read

command, after and only after a No Acknowledge, forces the standby state. A STOP

condition at the end of a Write command triggers the internal EEPROM write cycle.

Acknowledge Bit (ACK): An acknowledge signal is used to indicate a successful

data transfer. The bus transmitter, either master or slave, will release the SDA bus

after sending 8 bits of data. During the 9th clock pulse period the receiver pulls the

SDA bus low to acknowledge the receipt of the 8 bits of data.

Data Input: During data input the ST24C02 sample the SDA bus signal on the rising

edge of the clock SCL. Note that for correct device operation the SDA signal must be

stable during the clock low to high transition and the data must change ONLY when

the SCL line is low.

Memory Addressing: To start communication between the bus master and the slave

ST24/25x02, the master must initiate a START condition. Following this, the master

sends onto the SDA bus line 8 bits (MSB first) corresponding to the device select

code (7 bits) and a READ or WRITE bit.

The 4 most significant bits of the device select code are the device type

identifier, corresponding to the I2C bus definition. For these memories the 4 bits are

fixed as 1010b. The following 3 bits identify the specific memory on the bus. They

are matched to the chip enable signals E2, E1, E0. Thus up to 8 x 2K memories can be

connected on the same bus giving a memory capacity total of 16K bits. After a

START condition any memory on the bus will identify the device code and compare

the following 3 bits to its chip enable inputs E2, E1, E0. The 8th bit sent is the read or

write bit (RW), this bit is set to ’1’ for read and ’0’ for write operations. If a match is

found, the corresponding memory will acknowledge the identification on the SDA bus

during the 9th bit time.

As mentioned in the above procedure, we are going to communicate with the

EEPROM and can perform write / read operations with the microcontroller.

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Liquid Crystal Display

Introduction to LCD:

In recent years the LCD is finding widespread use replacing LED s (seven-segment

LED or other multi segment LED s). This is due to the following reasons:

1. The declining prices of LCD s.

2. The ability to display numbers, characters and graphics. This is in

contract to LED s, which are limited to numbers and a few characters.

3. Incorporation of a refreshing controller into the LCD, there by relieving the

CPU of the task of refreshing the LCD. In the contrast, the LED must be

refreshed by the CPU to keep displaying the data.

4. Ease of programming for characters and graphics.

USES:

The LCD s used exclusively in watches, calculators and measuring

instruments is the simple seven-segment displays, having a limited amount of numeric

data. The recent advances in technology have resulted in better legibility, more

information displaying capability and a wider temperature range. These have resulted

in the LCD s being extensively used in telecommunications and entertainment

electronics. The LCD s has even started replacing the cathode ray tubes (CRTs) used

for the display of text and graphics, and also in small TV applications.

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S p e c i f i c a t i o n s

Number of Characters: 16 characters x 2 Lines

Character Table: English-European (RS in Datasheet)

Module dimension: 80.0mm x 36.0mm x 13.2mm(MAX)

View area: 66.0 x 16.0 mm

Active area: 56.2 x 11.5 mm

Dot size: 0.56 x 0.66 mm

Dot pitch: 0.60 x 0.70 mm

Character size: 2.96 x 5.46 mm

Character pitch: 3.55 x 5.94 mm

LCD type: STN, Positive, Transflective, Yellow/Green

Duty: 1/16

View direction: Wide viewing angle

Backlight Type: yellow/green LED

RoHS Compliant: lead free

Operating Temperature: -20°C to + 70°C

LCD PIN DIAGRAM:

LCD pin description

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The LCD discussed in this section has 14 pins. The function of each pin is given in

table.

TABLE 1: Pin description for LCD:

Pin symbol I/O Description

1 Vss -- Ground

2 Vcc -- +5V power supply

3 VEE -- Power supply to control contrast

4 RS I RS=0 to select command register

RS=1 to select

data register

5 R/W I R/W=0 for write

R/W=1 for read

6 E I/O Enable

7 DB0 I/O The 8-bit data bus

8 DB1 I/O The 8-bit data bus

9 DB2 I/O The 8-bit data bus

10 DB3 I/O The 8-bit data bus

11 DB4 I/O The 8-bit data bus

12 DB5 I/O The 8-bit data bus

13 DB6 I/O The 8-bit data bus

14 DB7 I/O The 8-bit data bus

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LCD INTERFACING

Sending commands and data to LCDs with a time delay:

To send any command from table 2 to the LCD, make pin RS=0. For data, make

RS=1.Then place a high to low pulse on the E pin to enable the internal latch of the

LCD.

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No. Instruction Hex Decimal

1 Function Set: 8-bit, 1 Line, 5x7 Dots 0x30 48

2 Function Set: 8-bit, 2 Line, 5x7 Dots 0x38 56

3 Function Set: 4-bit, 1 Line, 5x7 Dots 0x20 32

4 Function Set: 4-bit, 2 Line, 5x7 Dots 0x28 40

5 Entry Mode 0x06 6

6Display off Cursor off(clearing display without clearing DDRAM content)

0x08 8

7 Display on Cursor on 0x0E 14

8 Display on Cursor off 0x0C 12

9 Display on Cursor blinking 0x0F 15

10 Shift entire display left 0x18 24

12 Shift entire display right 0x1C 30

13 Move cursor left by one character 0x10 16

14 Move cursor right by one character 0x14 20

15 Clear Display (also clear DDRAM content) 0x01 1

16Set DDRAM address or coursor position on display

0x80+add* 128+add*

17Set CGRAM address or set pointer to CGRAM location

0x40+add** 64+add**

CIRCUIT DESCRIPTION:

This project is basically aimed to build a system to get a attendance details of

the student . This system consists of DTMF decoder, voice IC, keypad, eeprom, micro

controller,

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Whenever student wants to get the details, he needs to call the mobile which is

already interfaced with DTMF decoder and voice IC. Here user keeps the mobile in

auto-answer mode, which automatically lifts the call and user is able to listen voice

instructions based on password of the students

DTMF decoder is used to decode the frequencies from the mobile and voice

IC is used to store the voice instructions. Micro controller plays major role in

directing the data to respective appliances.

This project is designed around a micro controller, which forms the control

unit of the project. According to this project, the system being designed is to be

placed in colleges to get the details of attendance. The person who wants to gets the

details needs to call to a mobile being connected to designed embedded system. After

connection establishment, the user is asked to press password of students to get a

student attendance in voice announcement. DTMF decoder an interface between

mobile phone and micro controller. In the Voice processing unit, two voice IC chip

we are using to select the voice IC we need to make low to the CE pin of the voice

IC. The student details of attendance stored in the eeprom and keypad interfacing

with microcontroller to change the attendance details of the students.

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SOFTWARE Components

ABOUT SOFTWARE

Software used is:

*Keil software for C programming

*Express PCB for lay out design

*Express SCH for schematic design

KEIL µVision3

What's New in µVision3?

µVision3 adds many new features to the Editor like Text Templates, Quick

Function Navigation, and Syntax Coloring with brace high lighting Configuration

Wizard for dialog based startup and debugger setup. µVision3 is fully compatible to

µVision2 and can be used in parallel with µVision2.

What is µVision3?

µVision3 is an IDE (Integrated Development Environment) that helps you

write, compile, and debug embedded programs. It encapsulates the following

components:

A project manager.

A make facility.

Tool configuration.

Editor.

A powerful debugger.

Express PCB

Express PCB is a Circuit Design Software and PCB manufacturing service.

One can learn almost everything you need to know about Express PCB from the help

topics included with the programs given.

Details:

Express PCB, Version 5.6.0

Express SCH

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The Express SCH schematic design program is very easy to use. This software

enables the user to draw the Schematics with drag and drop options.

A Quick Start Guide is provided by which the user can learn how to use it.

Details:

Express SCH, Version 5.6.0

EMBEDDED C:

The programming Language used here in this project is an Embedded C

Language. This Embedded C Language is different from the generic C language in

few things like

a) Data types

b) Access over the architecture addresses.

The Embedded C Programming Language forms the user friendly language

with access over Port addresses, SFR Register addresses etc.

Embedded C Data types:

Data Types Size in Bits Data Range/Usage

unsigned char 8-bit 0-255

signed char 8-bit -128 to +127

unsigned int 16-bit 0 to 65535

signed int 16-bit -32,768 to +32,767

sbit 1-bit SFR bit addressable only

bit 1-bit RAM bit addressable only

sfr 8-bit RAM addresses 80-FFH only

Signed char:

o Used to represent the – or + values.

o As a result, we have only 7 bits for the magnitude of the signed number,

giving us values from -128 to +127.

SOFTWARE

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µVision3

µVision3 is an IDE (Integrated Development Environment) that helps you write,

compile, and debug embedded programs. It encapsulates the following components:

A project manager.

A make facility.

Tool configuration.

Editor.

A powerful debugger.

To help you get started, several example programs (located in the \C51\Examples, \

C251\Examples, \C166\Examples, and \ARM\...\Examples) are provided.

HELLO is a simple program that prints the string "Hello World" using the

Serial Interface.

Building an Application in µVision2

To build (compile, assemble, and link) an application in µVision2, you must:

1. Select Project - (for example, 166\EXAMPLES\HELLO\HELLO.UV2).

2. Select Project - Rebuild all target files or Build target.

µVision2 compiles, assembles, and links the files in your project.

Creating Your Own Application in µVision2

To create a new project in µVision2, you must:

1. Select Project - New Project.

2. Select a directory and enter the name of the project file.

3. Select Project - Select Device and select an 8051, 251, or C16x/ST10 device

from the Device Database™.

4. Create source files to add to the project.

5. Select Project - Targets, Groups, Files, Add/Files, select Source Group1, and

add the source files to the project.

6. Select Project - Options and set the tool options. Note when you select the

target device from the Device Database™ all special options are set

automatically. You typically only need to configure the memory map of your

target hardware. Default memory model settings are optimal for most

applications.

7. Select Project - Rebuild all target files or Build target.

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Debugging an Application in µVision2

To debug an application created using µVision2, you must:

1. Select Debug - Start/Stop Debug Session.

2. Use the Step toolbar buttons to single-step through your program. You may

enter G, main in the Output Window to execute to the main C function.

3. Open the Serial Window using the Serial #1 button on the toolbar.

Debug your program using standard options like Step, Go, Break, and so on.

Starting µVision2 and creating a Project

µVision2 is a standard Windows application and started by clicking on the

program icon. To create a new project file select from the µVision2 menu

Project – New Project…. This opens a standard Windows dialog that asks you for the

new project file name.

We suggest that you use a separate folder for each project. You can simply use

the icon Create New Folder in this dialog to get a new empty folder. Then select this

folder and enter the file name for the new project, i.e. Project1.

µVision2 creates a new project file with the name PROJECT1.UV2 which

contains a default target and file group name. You can see these names in the Project

Window – Files.

Now use from the menu Project – Select Device for Target and select a CPU

for your project. The Select Device dialog box shows the µVision2 device database.

Just select the microcontroller you use. We are using for our examples the Philips

80C51RD+ CPU. This selection sets necessary tool options for the 80C51RD+ device

and simplifies in this way the tool Configuration

Building Projects and Creating a HEX Files

Typical, the tool settings under Options – Target are all you need to start a

new application. You may translate all source files and line the application with a

click on the Build Target toolbar icon. When you build an application with syntax

errors, µVision2 will display errors and warning messages in the Output

Window – Build page. A double click on a message line opens the source file on the

correct location in a µVision2 editor window.

Once you have successfully generated your application you can start debugging.

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After you have tested your application, it is required to create an Intel HEX

file to download the software into an EPROM programmer or simulator. µVision2

creates HEX files with each build process when Create HEX files under Options for

Target – Output is enabled. You may start your PROM programming utility after the

make process when you specify the program under the option Run User Program #1.

CPU Simulation

µVision2 simulates up to 16 Mbytes of memory from which areas can be

mapped for read, write, or code execution access. The µVision2 simulator traps and

reports illegal memory accesses being done.

In addition to memory mapping, the simulator also provides support for the integrated

peripherals of the various 8051 derivatives. The on-chip peripherals of the CPU you

have selected are configured from the Device

Database selection

You have made when you create your project target. Refer to page 58 for more

Information about selecting a device. You may select and display the on-chip

peripheral components using the Debug menu. You can also change the aspects of

each peripheral using the controls in the dialog boxes.

Start Debugging

You start the debug mode of µVision2 with the Debug – Start/Stop Debug

Session command. Depending on the Options for Target – Debug Configuration,

µVision2 will load the application program and run the startup code µVision2 saves

the editor screen layout and restores the screen layout of the last debug session. If the

program execution stops, µVision2 opens an editor window with the source text or

shows CPU instructions in the disassembly window. The next executable statement is

marked with a yellow arrow. During debugging, most editor features are still

available.

For example, you can use the find command or correct program errors.

Program source text of your application is shown in the same windows. The µVision2

debug mode differs from the edit mode in the following aspects:

_ The “Debug Menu and Debug Commands” described on page 28 are Available. The

additional debug windows are discussed in the following.

_ The project structure or tool parameters cannot be modified. All build Commands

are disabled.

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Disassembly Window

The Disassembly window shows your target program as mixed source and

assembly program or just assembly code. A trace history of previously executed

instructions may be displayed with Debug – View Trace Records. To enable the trace

history, set Debug – Enable/Disable Trace Recording.

If you select the Disassembly Window as the active window all program step

commands work on CPU instruction level rather than program source lines. You can

select a text line and set or modify code breakpoints using toolbar buttons or the

context menu commands.

You may use the dialog Debug – Inline Assembly… to modify the CPU

instructions. That allows you to correct mistakes or to make temporary changes to the

target program you are debugging.

SOURCE CODE

1. Click on the Keil uVision Icon on Desktop

2. The following fig will appear

3. Click on the Project menu from the title bar

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4. Then Click on New Project

5. Save the Project by typing suitable project name with no extension in u r own folder sited in either C:\ or D:\

6. Then Click on save button above.

7. Select the component for u r project. i.e. Atmel……

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8. Click on the + Symbol beside of Atmel

9. Select AT89C51 as shown below

10. Then Click on “OK”

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11. The Following fig will appear

12. Then Click either YES or NO………mostly “NO”

13. Now your project is ready to USE

14. Now double click on the Target1, you would get another option “Source

group 1” as shown in next page.

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15. Click on the file option from menu bar and select “new”

16. The next screen will be as shown in next page, and just maximize it by

double clicking on its blue boarder.

17. Now start writing program in either in “C” or “ASM”

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18. For a program written in Assembly, then save it with extension “. asm”

and for “C” based program save it with extension “ .C”

19. Now right click on Source group 1 and click on “Add files to Group Source”

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20. Now you will get another window, on which by default “C” files will appear.

21. Now select as per your file extension given while saving the file

22. Click only one time on option “ADD”

23. Now Press function key F7 to compile. Any error will appear if so happen.

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24. If the file contains no error, then press Control+F5 simultaneously.

25. The new window is as follows

26. Then Click “OK”

27. Now Click on the Peripherals from menu bar, and check your required port

as shown in fig below

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Drag the port a side and click in the program file.

28. Now keep Pressing function key “F11” slowly and observe.

29. You are running your program successfully

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CONCLUSION

The project “Interactive Voice Response System (IVRS) for attendance

management” has been successfully designed and tested. Integrating features of all the

hardware components used have developed it. Presence of every module has been

reasoned out and placed carefully thus contributing to the best working of the unit.

Secondly, using highly advanced IC’s and with the help of growing

technology the project has been successfully implemented.

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FUTURE ASPECTS

In this project, there is a voice processing unit in which we can record and

playback the voice for a minimum duration of 60 seconds only. So we can replace

this unit with more voice storage device so that we can utilize for a wide range of

applications in industries, colleges etc. Just like controlling the devices in a industry

and as well as marks announcement in colleges etc.

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BIBLIOGRAPHY

NAME OF THE SITES

1. WWW.MICROCONTROLLER.COM

2. WWW.ALL DATASHEETS.COM

3. WWW.KEIL.COM

REFERENCES

1. 8051-MICROCONTROLLER AND EMBEDDED SYSTEM.

Mohd. Mazidi.