[ieee annual reliability and maintainability symposium - philadelphia, pa, usa (13-16 jan. 1997)]...

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Quantitative FMEA Automation Thomas A. Montgomery 0 Ford Motor Company Dearborn Kenneth A. Marko 0 Ford Motor Company 0 Dearborn Key Words: Automated FMEA, FMEA, qualitative analysis, quantitative analysis, simulation, simulation model. SUMMARY & CONCLUSIONS By providing a structured approach for considering potential failures and their effects, Failure Mode and Effects Analysis (FMEA) is an important process applied to the development of reliable and maintainable products (Refs. 2, 4). FMEA reports are used by design, test and diagnostic engineers, impacting products throughout their life cycle. FMEA automation promises to streamline the traditional (brainstorming) approach to performing an FMEA by aiding the FMEA reasoning process, helping to produce a report that is more timely, complete and consistent. Most of the published approaches to automating FMEA rely on qualitative simulators and produce a report that is most relevant early in the design cycle (Refs. 1, 5, 7). The software described here uses a quantitative simulator, producing results that are not only more accurate for designers, but are also more useful to test and diagnostics engineers. The result is a contribution to concurrent engineering efforts in the design, manufacture, and support of analog electronics that is not possible with tools based on qualitative simulators. 1. INTRODUCTION This abstract presents a software tool called FMEA Streamlining that is based on a commercial analog circuit simulator, Analogy’s Saber. We describe the primary features of the tool, how it is used, the requirements placed on the tool by the different types of users, and some lessons learned in pilot applications. 2. DESCRIPTION FMEA Streamlining, like other simulation-based FMEA automation tools, contains at its core a simulation loop in which each potential fault (or failure mode) of the circuit under design is simulated. As is standard in performing FMEAs manually, a single fault assumption is employed in its insertion of faults into the circuit model. Fault options include short circuits and open circuits (as in Ref. 3), as well as a variety of custom faults which allow changes to be made to component parameters, component types and connectivity. Thus a wide variety of manufacturing and operational faults can be modeled such as reversing the orientation of a diode, shorting two wires together, replacing a resistor with a capacitor, or changing a resistor’s resistance by an order of magnitude. In addition, faults can be made to appear at specified times during the simulation. Users can select either individual faults or whole classes of faults to analyze. Configuration files save the lists of faults selected and the simulation commands, allowing the same set of faults to be applied to multiple design iterations. The user can interrupt the simulations and start up again later, even adding new faults to the list, without losing prior results. Results are presented in a concise report that filters much of the raw simulation data by displaying data from only those signals that have changed. The tool also offers access to the raw data through Saber Scope, plotting the nominal results and those from selected failure modes on the same graph for easy comparison. 3. USAGE One of the keys to the acceptance of this technology is its integration into the existing circuit design process. FMEA Streamlining takes advantage of the increasing use of analog simulation by using the same models developed to understand nominal operation for understanding failure modes. Thus, an engineer who has developed a realistic simulation model to document or better understand its operation can use the same model in FMEA Streamlining without modification. The only caveat is that the model must be realistic, though not necessarily completely accurate. For example, modeling a battery as an ideal voltage source is not realistic since shorting an ideal source does not reduce the voltage it applies to the rest of circuit. To be realistic, a battery model must at a minimum have an internal series resistor. However complete accuracy, such as modeling a battery’s surface capacitance, is often unnecessary and merely contributes to the simulation time required. FMEA Streamlining is applied in an iterative design process in which simulation models are created at varying levels of detail as the design progresses. (A qualitative FMEA automation tool that supports incremental FMEA (Ref. 6) is being developed in parallel by the University of Wales under the sponsorship of Ford UK and Jaguar Cars Ltd. and is intended for use earlier in the design process (Ref. 8).) At each level of detail, many design iterations are possible as the design and its model are refined. Generally, an engineer will create a model, verify its nominal operation, then pass it through FMEA Streamlining with just a few representative 226 0-7803-3783-2/97/$5.00 0 1997 lEEE 1997 PROCEEDINGS Annual RELIABILITY and MAINTAINABILITY Symposium

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Page 1: [IEEE Annual Reliability and Maintainability Symposium - Philadelphia, PA, USA (13-16 Jan. 1997)] Annual Reliability and Maintainability Symposium - Quantitative FMEA automation

Quantitative FMEA Automation

Thomas A. Montgomery 0 Ford Motor Company Dearborn Kenneth A. Marko 0 Ford Motor Company 0 Dearborn

Key Words: Automated FMEA, FMEA, qualitative analysis, quantitative analysis, simulation, simulation model.

SUMMARY & CONCLUSIONS By providing a structured approach for considering

potential failures and their effects, Failure Mode and Effects Analysis (FMEA) is an important process applied to the development of reliable and maintainable products (Refs. 2, 4). FMEA reports are used by design, test and diagnostic engineers, impacting products throughout their life cycle.

FMEA automation promises to streamline the traditional (brainstorming) approach to performing an FMEA by aiding the FMEA reasoning process, helping to produce a report that is more timely, complete and consistent. Most of the published approaches to automating FMEA rely on qualitative simulators and produce a report that is most relevant early in the design cycle (Refs. 1, 5 , 7). The software described here uses a quantitative simulator, producing results that are not only more accurate for designers, but are also more useful to test and diagnostics engineers. The result is a contribution to concurrent engineering efforts in the design, manufacture, and support of analog electronics that is not possible with tools based on qualitative simulators.

1. INTRODUCTION This abstract presents a software tool called FMEA

Streamlining that is based on a commercial analog circuit simulator, Analogy’s Saber. We describe the primary features of the tool, how it is used, the requirements placed on the tool by the different types of users, and some lessons learned in pilot applications.

2 . DESCRIPTION FMEA Streamlining, like other simulation-based FMEA

automation tools, contains at its core a simulation loop in which each potential fault (or failure mode) of the circuit under design is simulated. As is standard in performing FMEAs manually, a single fault assumption is employed in its insertion of faults into the circuit model. Fault options include short circuits and open circuits (as in Ref. 3), as well as a variety of custom faults which allow changes to be made to component parameters, component types and connectivity. Thus a wide variety of manufacturing and operational faults can be modeled such as reversing the orientation of a diode, shorting two wires together, replacing a resistor with a capacitor, or changing a resistor’s resistance by an order of

magnitude. In addition, faults can be made to appear at specified times during the simulation.

Users can select either individual faults or whole classes of faults to analyze. Configuration files save the lists of faults selected and the simulation commands, allowing the same set of faults to be applied to multiple design iterations. The user can interrupt the simulations and start up again later, even adding new faults to the list, without losing prior results.

Results are presented in a concise report that filters much of the raw simulation data by displaying data from only those signals that have changed. The tool also offers access to the raw data through Saber Scope, plotting the nominal results and those from selected failure modes on the same graph for easy comparison.

3. USAGE One of the keys to the acceptance of this technology is its

integration into the existing circuit design process. FMEA Streamlining takes advantage of the increasing use of analog simulation by using the same models developed to understand nominal operation for understanding failure modes. Thus, an engineer who has developed a realistic simulation model to document or better understand its operation can use the same model in FMEA Streamlining without modification. The only caveat is that the model must be realistic, though not necessarily completely accurate. For example, modeling a battery as an ideal voltage source is not realistic since shorting an ideal source does not reduce the voltage it applies to the rest of circuit. To be realistic, a battery model must at a minimum have an internal series resistor. However complete accuracy, such as modeling a battery’s surface capacitance, is often unnecessary and merely contributes to the simulation time required.

FMEA Streamlining is applied in an iterative design process in which simulation models are created at varying levels of detail as the design progresses. (A qualitative FMEA automation tool that supports incremental FMEA (Ref. 6) is being developed in parallel by the University of Wales under the sponsorship of Ford UK and Jaguar Cars Ltd. and is intended for use earlier in the design process (Ref. 8).) At each level of detail, many design iterations are possible as the design and its model are refined. Generally, an engineer will create a model, verify its nominal operation, then pass it through FMEA Streamlining with just a few representative

226 0-7803-3783-2/97/$5.00 0 1997 lEEE

1997 PROCEEDINGS Annual RELIABILITY and MAINTAINABILITY Symposium

Page 2: [IEEE Annual Reliability and Maintainability Symposium - Philadelphia, PA, USA (13-16 Jan. 1997)] Annual Reliability and Maintainability Symposium - Quantitative FMEA automation

faults. These few faults allow rapid feedback in identifying unrealistic modeling assumptions. Once the circuit model works well for these few faults, all faults can be selected and simulated (perhaps letting it run Overnight). The engineer then interprets the results from the report generated, filling in the remainder of the FMEA form including risk priority numbers and recommended actions. Faults that are difficult to interpret may then be selectively re-simulated for an in depth analysis.

4. REQUIREMENTS OF DIFFERENT USERS There are three primary communities of users of the

information generated by FMEA Streamlining: design, test and diagnostic engineers. Each place their own requirements on the software, while their combined use produces a concurrent engineering synergy.

4.1 Design Engineers Designers use FMEAs to focus their design efforts on the

highest priority failure modes of their circuits (those that have the most severe effects, are the most likely to occur, and are the least detectable). Because design changes are less expensive to make earlier in the design process, the primary need that is addressed by this software is to reduce the amount of time it takes to complete an FMEA and provide timely input for design decisions. One common objection is that the computer simulation time can be considerable for a complex circuit. However that computer simulation (done off line, overnight) should be compared to the alternative of the mental simulation of the circuit by a team of engineers over an often long-term series of meetings.

When used later in the design cycle (when most design decisions have been made) FMEA Streamlining can be used for design verification, helping to avoid potential costly repairs in the field.

Design engineers considering the potential failure modes of a product generally assume that the product will be manufactured to specification, therefore operational faults are of greatest concern. The most common operational faults of analog circuits are open circuits and short circuits. All possible single point opens and shorts can be simulated in FMEA Streamlining at the push of a button.

4.2 Test Engineers Test engineers have the task of determining how to detect

manufacturing defects quickly and easily. Tests must be quick so as not to slow the manufacturing process, and non- intrusive, probing only easily accessible signals. Distinguishing between faults is less of a concern than covering (detecting) the largest number of faults. FMEA Streamlining can be used in the search for a short test sequence that provides the greatest possible fault coverage. In particular, the test engineer can choose to include in the report only those signals that are easily accessible in the factory, and search (currently through trial and error) for the circuit input sequence that gives the best coverage. Furthermore, since

FMEA Streamlining only includes those signals in its report that are “significantly different” (the default definition being greater than 10 percent of the nominal), significance can be customized to match the capabilities of the test hardware used. This capability, essential to test engineers, requires a quantitative simulator.

In contrast to design engineers, test engineers place a greater emphasis on manufacturing faults. The custom fault capability of FMEA Streamlining allows a variety of manufacturing faults to be simulated such as placing the wrong component on a board, or reversing a component’s orientation. Some faults, such as using a resistor with the wrong resistance, again can only be simulated with a quantitative simulator.

4.3 Diagnostic Engineers Diagnostic engineers can assume that the device they are

testing has a fault, therefore they are less concerned with detecting its presence than with identifiing which fault it is. To achieve their goal, they are willing to use a larger test vector than test engineers. Like test engineers, they benefit from the quantitative nature of FMEA Streamlining and its ability to produce accurate results. Diagnostic engineers can use the results of FMEA Streamlining to answer questions related to which inputs produce fault identifying detectable differences in output signals. They can also compare fault signatures to determine which faults are indistinguishable given their choice of input sequences and probe points.

4.4 Synergy Though design, test and diagnostic engineers each have

their own perspective when using the FMEA Streamlining tool, a synergy arises by their combined use. The simulation model is created by the design engineer who has the most intimate knowledge of the design. This knowledge, embedded into the simulation model, is transferred to what are traditionally downstream activities quickly and accurately. Thus, from a concurrent engineering standpoint, test engineers and diagnostic engineers can bring their manufacturing and support perspectives to the design early in the process when design changes are less expensive to make.

5 . LESSONS LEARNED Many of the lessons learned in developing and beta testing

this software have been mentioned above, but some deserve more attention. The importance of realistic simulation models applies equally to those employed by the users of the tool, and those templates used to model faults by the tool itself. In particular, as discussed in Ref. 3, short circuits and open circuits should not be modeled as ideal shorts or opens but rather as finite resistance values. For example, an ideal open can partition a circuit causing part of it to have no reference to ground, a situation that keeps the Saber simui.ator from converging on a solution. Therefore, to avoid such simulation problems, shorts and opens should be modeled realistically, as small and large resistances respectively.

227 1997 PROCEEDINGS Annual RELIABILITY and MAINTAINABILITY Symposium

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Computer simulation, in addition to improving the timeliness of an FMEA, offers advantages of consistency and completeness. Consistency is improved since a single set of design assumptions is embodied in the simulation model. Completeness is improved since the generation of all possible shorts and opens is automated. In our trial use, engineers have even discovered results that were surprising to them initially, and proved to be correct on closer examination.

ACKNOWLEDGMENTS We would like to thank all those at Ford Motor Company

and Jaguar Cars Ltd. who have been involved in the development and pilot applications of FMEA Streamlining, as well as our colleagues at the University of Wales whose considerable success in qualitative FMEA automation has been a continual source of inspiration.

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REFERENCES D. Bell, L. Cox, S. Jackson, and P. Schaefer. Using causal reasoning for automated failure modes & effects analysis (FMEA). In Proc. Ann. Reliability & Maintainability Symp., pp 343-353. IEEE Press, 1992. SAE Intemational. Potential failure mode and effects analysis in design (design FMEA) and potential failure mode and effects analysis in manufacturing and assembly processes (process FMEA) reference manual. Technical Report J1739, 1994. J. E. Jagodnik and M. S. Wolfson. Systematic fault simulation in an analog circuit simulator. IEEE Trans. Circuits and Systems, CAS-

W. E. Jordan. Failure modes, effects and criticality analyses. Proc. Ann. Reliability & Maintainability Symp., pp 30-37. IEEE Press, 1972. Lee and Ormsby. Qualitative modeling of the effects of electrical circuit faults. Artijkial Intelligence in Engineering, 8:293-300, 1993. C. J. Price. Effortless incremental design FMEA. In Proc. Ann. Reliability & Maintainability Symp. IEEE Press, 1996. C. J. Price, D. R. Pugh, M. S. Wilson, and N. Snooke. The flame system: Automating electrical failure mode & effects analysis (FMEA). In Proc. Ann. Reliability & Maintainability Symp., pp 90-95. IEEE Press, 1995. T. A. Montgomery, D. R. Pugh, S. T. Leedham, S. Twitchett. FMEA automation for the complete design process. In Proc. Ann. Reliability & Maintainability Symp., pp 30-36. IEEE Press, 1996.

26(7):549-554, July 1979.

BIOGRAPHIES Thomas A. Montgomery Ford Motor Company MD 1170 SRL P.O. Box 2053 Dearbom, MI 48121-2053 USA Intemet (e-mail): [email protected]

Tom Montgomery received his BS in Physics, and MS and PhD in Computer Engineering at the University of Michigan. His research interests include concurrent engineering and distributed artificial intelligence. A technical specialist in the Ford Research Laboratory, he is investigating the application of computer simulation to Failure Mode and Effects Analysis (FMEA) and diagnostics development. Publications include papers in IEEE Transactions on Systems, Man and Cybemetics, Reliability and Maintainability Symposium, Group Decision and Negotiation, AAAI, IEEE Tools for Artificial Intelligence, and the Intemational Distributed AI Workshop.

Kenneth A. Mako Ford Motor Company MD 1170 SRL P.O. Box 2053 Dearbom, MI 48121-2053 USA

Intemet (e-mail): [email protected]

Ken Marko received his BS in Physics at MIT in 1968, and PhD in Physics at the university of Michigan in 1974. Projects in the Physics Department at Ford Motor Company involved applied research in non-linear optics (Coherent Anti-Stikes Raman Spectroscopy (CARS)) and fluid dynamics to support understanding of chemical reactions and hydrodynamic influences in turbulent combustion. Ken is currently project leader and principal research scientist involved in work on diagnostics and applied artificial intelligence related to service bay and on-board vehicle diagnostics. He has published over 50 papers, holds 8 patents and has won the Henry Ford Technology Award twice for work on applications of diagnostics to manufacturing and vehicle emissions analysis.

228 1997 PROCEEDINGS Annual RELIABILITY and MAINTAINABILITY Symposium