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Spring 2014 Honor Seminar ECE 494.016 Final Report Modeling, Simulation and Implementation of Memristors Juan J Faria Briceno Center for High Technology Materials The University of New Mexico Advisor: Dr. Marek Osinski

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Page 1: Honor Seminar ECE 494 Final Report

Spring 2014 Honor Seminar ECE 494.016 Final Report

Modeling, Simulation and Implementation of Memristors

Juan J Faria Briceno

Center for High Technology Materials

The University of New Mexico

Advisor: Dr. Marek Osinski

May 13, 2013

Page 2: Honor Seminar ECE 494 Final Report

Table of Contents

1 Introduction............................................................................................................................................3

2 Emulator for Memristor circuit Applications........................................................................................4

3 Modeling and Implementing of Oxide Memristors for Neuromorphic Applications..........................11

4 Conclusions..........................................................................................................................................13

5 Personal Comments.............................................................................................................................14

6 Cited Page............................................................................................................................................16

Page 3: Honor Seminar ECE 494 Final Report

1-IntroductionSince three semesters ago, a deep investigation on Memristors has been done with the objective

of having a better understanding. This same purpose has been crucial of finding new data on

what Memristors are. In this report we will focus in different article that cover the simulation,

modeling, and implementation that other researcher have done in order to see this device

working properly.

Memristors have been defined as a circuit in different ways. While some researchers use

amplifier, resistors, capacitors and current source to simulate them, other researcher have built

then using digital and analog circuit mixed. Also, other researchers have use just analog

technology to create a circuit that can simulate them.

Some facts and data that we can consider in order to evaluate them would be I-V curves,

Memristance, output voltage- time, input current –time, and memristance- input voltage. These

facts will be used to compare all three different configurations to provide an analysis of how they

benefit or affect the final goal.

In this final report we will cover, Soft 3D Retinal Implants with Diamond electrode a way for

focal stimulation, article of new technology of retinal implants that have been developed in

France. In previous semester we have research it, but this has been involving not just the retinal.

This new implants, also, involve the connection with the optic nerve which will open new doors

in the science of the Memristors.

Also in this report, we will cover the benefits of the different circuits develop for Memristors and

how they can benefit other researcher to implement them with real simulation. Some circuits can

create be harder to simulate due to the structure that now in these days we do not use in our

software.

Finally, we will analyze all the information explains. The analysis will cover the overall

information investigated and will conclude with the personal comments of how Memristors can

be futuristic or not in reality.

Page 4: Honor Seminar ECE 494 Final Report

2- Emulator for Memristors Circuit Applications

The first research paper use to be analyzed is written by Hyongsuk Kim, Maheshwar,

Chang ju Yang n Seongik Cho at all which title is Memristors Emulator for Memristors Circuit

Applications. This paper covers the emulator and result from the real fabrication of a Memristors

and simulation PSPICE. First, they created a basic structure of a Memristors by using two

resistors and one OPAMP, which is:

Figure #1: Describe the basic

input resistance of the Memristors

Emulator and the equivalent circuit.

Then they defined the incremental and decremental Memristors with the only difference

of the analog inverter in the end of the multiplier.

Figure #2: Represent the incremental Figure #3: Represent the decremental

Memristors and the circuit symbol. Memristors and the circuit Symbol.

They perform one simulation and creation of one complete decremental Memristors by

circuit using: 4 n type MOSFET transistors, 4 p type MOSFET transistors, 4 OPAMP, One

Page 5: Honor Seminar ECE 494 Final Report

Analog Multiplier, Capacitor, Resistors and tact switch. This decremental Memristors emulator

with expandable nonvolatile architecture is:

Figure #4:

A full schematic of the decremental Memristors emulator with nonvolatile architecture.

The result gotten from the circuit creates were Oscilloscope I-V, different measures in different

nodes of the circuit and Memristance.

This circuit is integrated by many interesting parts. First the currents mirrors create with the

transistors PMOS and NMOS. Both of them need to be on in order to on indoor to the

Multiplexer to come and execute an action. The multiplexer is really interesting due to the fact

that the output is equal to 0. Therefore, the signal coming from both of the capacitor and the

resistors have to be negative.

Page 6: Honor Seminar ECE 494 Final Report

The parts

presented in this

box are the parts

that are used in the

previous circuit

(figure 4). These

part have some

interesting

properties that

make the circuit work.

In continuation, I will explain each of the parts used in order to have an idea of their parameters.

First, I will start with the N type and P Type Metal Oxide Semiconductor Field Effect

Transistors. The Model as shown in the box used is ALD116 and ALD1117. There are designed

for precision analog applications. They have high input impedance and negative current

temperature coefficient. The voltage that this transistors rage is between “+2V and +12V systems

where low input bias current, low input capacitance and fast switching speed desired” (ALD 1).

One interesting property is that they offer very large current gain in low frequency. Obviously,

both of them are designed to be used in really precise analog circuits.

Both of them range in a threshold voltage of (-) 0.4 V to (-) 0.7 with a max of 1.0 V. The IDS(on)

is (-) 1.3 A. and all this values are in a temperature of 25 C. The total volume of the chip will be

around 27 mm3.

Figure 5: 8 pin plastic package of the ALD1116 and ALD1117, N type and P type transistors.

Page 7: Honor Seminar ECE 494 Final Report

In the other hand we have the OPAMP (TL082CP) that we will explain. It is an operational

amplifier that has been designed to offer a wider selection of operations. There are JFET types

and they incorporate, “well matched, high voltage JFET and bipolar transistors in a monolithic

integrated circuit. The device feature high slew rates, low input bias and offset currents, and low

offset-voltage temperature coefficient. Offset adjustment and external

compensation options […]” (Texas Instrument Data sheet 2).

Figure #6: Top view of the OPAMP TL082CP

Figure #7:

Structural picture

of the package

with sizes of top

view, lateral view,

and bottom view.

The approximate

volume of the chip

is around 10.72

mm3.

The last part explained in detail form the circuit will be the analog multiplier. This analog

multiplier is a 4 quadrant, low cost, 8 lead package. According to the Analog Devices Data

Sheet, “The AD633 is a functionally complete, four quadrants, analog multiplier. It includes high

impedance, differential X and Y inputs, and a high impedances swimming input (Z)” (1). Also,

the output voltage is a nominal 10 V full scale (low impedance output). It is really accurate

device that is calibrated by laser. Its accuracy is around 2% of full scale which makes this device

good to use in precise analog devices. This is a simple device at a low cost. The chip does not

require any kind of calibration and power supply voltage can range between (-) 8 V to (-) 18 V.

Page 8: Honor Seminar ECE 494 Final Report

The overall transfer function of this multiplier is

This device can be well use with application that

are related to modulation and demodulation,

automatic gain control, power measures, voltage

amplifiers, and frequency doublers.

Figure #8 & 9: Represent the basic multiplier

connection schematic for the 8-lead AD633 multiplier.

The rest of the electronic devices used are well known in the market and does not have anything

that can identify them as different that the regular used in the market. However, all of them are

represented by a max power of 0.25 W.

Page 9: Honor Seminar ECE 494 Final Report

The result simulated from this circuit created from Kim at all are provided in the following

pictures and figures:

Figure 10: Picture of the Oscilloscope hysteresis loop of

the Memristors Emulator at 100 Hz.

Figure 11: Picture of voltages measure in different points of the circuit.

Also, they create expandable model of

Memristors Emulators which can connect in series, in parallel, and hybrid connections. In all of

three different expandable models, they use the same configuration of the Memristors simple

emulator.

In series configuration, according to Kim, “The voltage of the Memristors when they are

connected in series is sum of each of the

Memristors” (2425), which formula is written

as:

Formula #1 represents the voltage addition of the

Memristors in series where Vmk and vm

k are voltage corresponding to the fixed part (Kim 2425).

Figure 12: Incremental configuration of Figure 13: Decremental configuration of

The expandable Memristors. The expandable Memristors

Page 10: Honor Seminar ECE 494 Final Report

In parallel connection configuration, Kim

explained the configuration in parallel with

opposite polarities which currents are defined by

the formulas:

Formula #2: represent the formula

of the current in parallel where the M1 and M2 are the values of the meristance.

Figure #9: Parrallel connection of two Memristors with opposite polarities

The result shown due to the simulation of the Single, parallel and series configuration of the Memristors in the research document written by Kim are:

Figure #14: Representation of the hysteresis loops of the Memristors in a single, serial, parrallel connections when a voltage of Vpp= 2V and the frecuency is equal to 100Hz. Rs= 16KOhms, C=0.1uF, Rt= 4kohms.

Figure #15: Simulation Values of the Memristance in all three different cases of single, series, and parallel configurations.

Page 11: Honor Seminar ECE 494 Final Report

Figure #16: different values of the Memristance when the value of the input voltage is changed to 0.1 V amplitude and 5ms width in a single, serial, and parallel configuration.

Figure #17: Voltage- current cure of two Memristors circuit connected in series, or in parallel with opposite polarities.

3- Modeling and Implementing of Oxide Memristors

In this document Ting Chang, Patrick Sheridan and Wei Lu at all, which title is modeling and

Implementation of Oxide Memristors for Neuromorphic Application, report fabrication, model

and implement Memristors devices for neuromorphic applications. They used PSPICE modeling

which help them to accurately find data like short term memory and memory enhancement in the

device.

According to Ting, “Memristors are two terminals solid state devices with adjustable resistance

that depends not only on the external inputs but also on past history. The properties of the

Memristors make it possible to build artificial neural networks with desired connectivity,

network density, power consumption, and adjustable weights with memory” (1).

The device fabrication was consisted with top palladium electrode, a tungsten oxide switching

layer and a bottom tungsten electrode. According to Ting, “The fabrication process began with a

Page 12: Honor Seminar ECE 494 Final Report

thermally oxidized silicon substrate, followed by 60nm thick tungsten deposition by sputtering at

room temperature. […] tungsten film was patterned by e-beam lithography and reactive ion

etching to form the nanowire bottom electrodes and contact pad” (1). The top palladium

nanowire electrode was formed by same process of e-beam lithography and lit off.

Figure #18: The picture (a) and (c) represent the image and schematic of the device. A Memristors is formed at each cross point (Ting 1). Then (b) and (d) represent cross section of the material.

The Switching Characteristics is one of the most important data of this document since it shows

the pinched hysteresis behavior of the I-V. In figure #15 we can see these curve of how they

overlap between the I-V during the positive voltage sweeps, however, this does not happen in the

negative side. This overlap according to Ting was verified to be the retention of the behavior of

the Memristors device which is similar to the human memory loss behavior. Also in the

retention curve, “The vertical axis is normalized such that 1 refer to the initial memductance at

the beginning of the retention test while 0 refers to the lowest memductance at rest” (1).

Page 13: Honor Seminar ECE 494 Final Report

Figure #19: (a) positive behavior of the I-V sweeps showing the pinched hysteresis behavior. (b) Negative behavior of the I-V sweeps showing the pinched hysteresis behavior. (c) Retention curve of the Memristors. (d) Forgetting Curve of the Memristors.

The modeling of this research project is described by a couple of equations shown in the article.

i=G(w,v)v and w=f(w,v). The equation one is the normal I-V equation resistive device, where w

is an internal state variable. In the other hand equation 2, is the equation of dynamic that

governor w. In the model that they are using this is WOx Memristors, w is regarded as the

conducting region are within the junction area, and is normalized such as w=0 (w=1) refer to the

least (most) conducting state (p.1). Ting said, “[…] concentration of oxygen inside the WOx

film act as dopant, so the region with the higher concentration of V0 leads to a more conductive

region and vice versa. The equation used is: where

the Greek letters are positive valued fitting

parameters” (2).

Overall, the WOx based Memristors was proven that was successful to emulate the synaptic

functions of the synaptic plasticity. Also, the intrinsic conductance decay is a simulation of the

Page 14: Honor Seminar ECE 494 Final Report

memory decay, memory enhancement, and rate depend plasticity which are application of

neuromorphic application using Memristors.

4- Conclusions

The topic in Memristors has been a real challenge, but also a positive topic. The challenges are

involved with knowing information that my level as student is limited. However, it has lead us to

the point where we are understanding what they are, how they work, what king of Memristors

are, how do they behave and other questions that no a lot of people has been knowing.

Nicely, Memristors is a topic that will be in the market for a while; even though it has not

exploited yet. Memristors is the pending topic to be the new revolution due to the multiple

applications that can be applied to neuromorphic applications. In the end, this topic helps the

academia to expand ideas and also increase the practice experience with different software.

The emulator for Memristors Circuits Applications is a great example of how critical these

devices are to practice different field in the electrical engineering field. The used of circuit

analysis, with the addition of electronics increases the area of learning of these devices. Analog

and Digital are both correlated to make this work.

This is why I focus in this semester in two main topics. One was the emulator circuit device and

the other the modulation, implementation in a neuromorphic application. Both of these subtopics

show the importance and relevance that Memristors are having in the technology. Nicely, in the

future, we will use Memristors for more application that can help the society.

Lately, a bionic eye has been published, executed and tested in human being in France. This kind

of bionic eye is similar to what we cover in previous reports. However, this bionic eye connects

straight to the optic nerve. They have one source going to the retina and another to the optic

nerve. The signal connected to the optic nerve is completely related to the synapse of the brain

with the first neurons from the vision.

The overall point of all these ideas is to come back to our final goal (bionic eye). The use of

image processing involved with the abilities of the Memristors to simulate neuron connections

Page 15: Honor Seminar ECE 494 Final Report

could lead us to the maximum goal. We might still be far away, but progress is going thru and

eventually will click in place.

5- Personal comments This semester I started with the idea of simulating the Memristors Emulator for Memristors

Circuit Applications, but multiple things changed my decisions of doing it. The first reason was

the missing of information on the circuit devices that are used on it. Even thought, I was aware of

what each part of the circuit does in the circuit, I was not prepared to know why those parts are

being used. The second reason was the software itself. PSPICE and Multisim are software that

requires full attention and are expensive. The third reason was the fact of no clarification in the

article itself of how to simulate the circuit. In the next paragraph I will elaborate more the three

reasons and how the decision of waiting for the simulation helped me to increase the level of

success in this project.

In all application and circuits design, there are minimum details that can affect the overall result.

Early in this semester, I tried to simulate a circuit Memristors emulator that the software was not

100% loaded to deal with it. The electronic device used was not part of the software; therefore,

when I tried to simulate it, I was not able to get accurate results. Also, in all circuit design, there

is a reason why we use some electronics device instead of other. The main deal of using those

device affect the overall output result. The pieces used in the Emulator had a reason, but I was

not aware of what they were.

In order to attack this problem I got a deep evaluation of each resistor, capacitor, transistor,

multiplier and other in order to understand why they were using them. Ended being that all those

device was precise, accurate and some of them low in the cost. After knowing them in their

properties and characteristics, I can have a higher knowledge on what to use; because these

devices are precise and unique in characteristics, the software did not contain them.

Software in general was a problem for me in order to do the simulation. As mention in the

previous paragraph, the software was not capacitated to simulate these N type transistors and P

type transistor and even the multiplier. The version that has all this parts is the completed

Page 16: Honor Seminar ECE 494 Final Report

versions and they are expensive. Therefore, I focus in understanding the circuit in deep to

understand it better.

The Multisim and PSPICE are software that requires full attention when a high task is required.

Even thought, these software are complicated and hard to deal with, I learn enough to build what

I need in the following semester. Obviously, the right software full loaded is required to

complete the task efficiently.

One of my professors told me, there is not simulation without modulation when a new subject is

being researched. This was one of the strongest argument why I concentrated to work in the

knowledge require to work in the future than rather losing time. Why should I simulate

something that I do not modulate? The fabrication and physical application of knowledge is the

best way of learning.

For all these reasons, I create a deep understanding of the Emulator, how does it work; in order

to be prepared to create the actual circuit with a multiplier by using an OPAMP in the

multiplication mode which will execute the multiplication of the two signals coming from the

capacitor and the resistor of the Emulator. In the end, if I can perform the hardware and software

simulation in the same time, it would be easier to complete the task faster.

6-Cited Page[1] Carrasco, Sandro. “Memristors: A new Age in electronics for Sensors and

Memories”. Moscow, Russia. Laboratoire des Systemes Integres. PPP. September 12, 2012.

[2] Chang, Ting. “ Modeling and Implementation of Oxide Memristors for Neuromorphic Applications. University of Michigan, USA. DARPA. 2012.

[3 ]Kim, Hyongsuk; Sah, Maheshwar; Yang, Chagju. “Memristors Emulator for Memristor Circuit Applications”. VOL. 59. Number 10. October, 2012.

[4]Shin, Sangho. “Compact Circuit Model and Hardware Emulation for Floating Memristor Device”. University of California. May 22, 2013.

Page 17: Honor Seminar ECE 494 Final Report

Data Sheets Cited:

Texas Instrument. TL082CP JFET Operational Amplifier. Advance Linear Device, Inc. ADL1116 N type Transistors Advance Linear Device, Inc. ADL1117 P type Transistors Analog Devices. AD633 Low Cost Analog Multiplier.