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Page 1: Fetch-execute Cycle
Page 2: Fetch-execute Cycle

The Fetch-Execute CycleTo execute a program you must first load the program and any relevant data in to the computer’s memory (RAM) from disk.

The program and data is stored in memory until needed by the processor (the stored program concept).

Main Memory10101010111010000011000110100010111000000000100010100010111100111111100000110000

Address

Processor

11000000 0000000011000000 0000000111000000 0000001011000000 0000001111000000 0000010011000000 0000010111000000 0000011011000000 00000111

11000000 0000100111000000 00001001

Page 3: Fetch-execute Cycle

The Fetch-Execute CycleA program may contain thousands of instructions but the processor can only execute one instruction at a time.

•The first instruction is fetched from memory in to the processor where it is decoded and executed.

•Then the second instruction is fetched and then executed and so on until the program ends.

This is known as the FETCH – EXECUTE CYCLE.

LDA #B5

Processor

Page 4: Fetch-execute Cycle

Memory Read Operation

ALU ControlUnit

MemoryDataRegister

MemoryAddressRegisterOther

Registers

Processor

Main Memory

Address

00000000000000010000001000000011000001000000010100000110000001110000100000001001

Address Bus

Data Bus

Control Bus

1. The processor sets up the address bus with the required memory address by placing it in the MAR

Page 5: Fetch-execute Cycle

Memory Read Operation

ALU ControlUnit

MemoryDataRegister

MemoryAddressRegisterOther

Registers

Processor

Main Memory

Address

00000000000000010000001000000011000001000000010100000110000001110000100000001001

Address Bus

Data Bus

Control Bus

2. The control unit activates the read line on the control bus

Page 6: Fetch-execute Cycle

Memory Read Operation

ALU ControlUnit

MemoryDataRegister

MemoryAddressRegisterOther

Registers

Processor Main Memory

Address

00000000000000010000001000000011000001000000010100000110000001110000100000001001

Address Bus

Data Bus

Control Bus

3. The address bus opens the relevant memory location at that address

11110011

Page 7: Fetch-execute Cycle

Memory Read Operation

ALU ControlUnit

MemoryDataRegister

MemoryAddressRegisterOther

Registers

Processor Main Memory

Address

00000000000000010000001000000011000001000000010100000110000001110000100000001001

Address Bus

Data Bus

Control Bus

4. The contents of the memory location are released, sent along the data bus and into the MDR

11110011

Page 8: Fetch-execute Cycle

Memory Read Operation

ALU ControlUnit

MemoryDataRegister

MemoryAddressRegisterOther

Registers

Processor

Main Memory

Address

00000000000000010000001000000011000001000000010100000110000001110000100000001001

Address Bus

Data Bus

Control Bus

5. The data is then decoded and executed

Page 9: Fetch-execute Cycle

Memory Write Operation

ALU ControlUnit

MemoryDataRegister

MemoryAddressRegisterOther

Registers

Processor Main Memory

Address

00000000000000010000001000000011000001000000010100000110000001110000100000001001

Address Bus

Data Bus

Control Bus

1. The processor sets up the address bus with the required memory address by placing it in the MAR

Page 10: Fetch-execute Cycle

Memory Write Operation

ALU ControlUnit

MemoryDataRegister

MemoryAddressRegisterOther

Registers

Processor Main Memory

Address

00000000000000010000001000000011000001000000010100000110000001110000100000001001

Address Bus

Data Bus

Control Bus

2. The processor sets up the data bus with the value to be stored in memory by placing it in the MDR

Page 11: Fetch-execute Cycle

Memory Write Operation

ALU ControlUnit

MemoryDataRegister

MemoryAddressRegisterOther

Registers

Processor Main Memory

Address

00000000000000010000001000000011000001000000010100000110000001110000100000001001

Address Bus

Data Bus

Control Bus

3. The control unit activates the write line on the control bus

Page 12: Fetch-execute Cycle

Memory Write Operation

ALU ControlUnit

MemoryDataRegister

MemoryAddressRegisterOther

Registers

Processor Main Memory

Address

00000000000000010000001000000011000001000000010100000110000001110000100000001001

Address Bus

Data Bus

Control Bus

4. The address bus opens the relevant memory location at that address

Page 13: Fetch-execute Cycle

Memory Write Operation

ALU ControlUnit

MemoryDataRegister

MemoryAddressRegisterOther

Registers

Processor Main Memory

Address

00000000000000010000001000000011000001000000010100000110000001110000100000001001

Address Bus

Data Bus

Control Bus

5. The contents of the memory data register are released, sent along the data bus and into the memory location

11000111


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