Electronics The ninth and tenth lectures

Ninth weekهـ 1437/ 1/ 8 - 5

السلمي / سمر أ

Outline for todayOhmic Contact

Metal–Oxide–Semiconductor Contact (MOS) Structure , Effect of voltageEnergy levels forms in MOS in different bias

Solving second homework Chapter Three: Bipolar junction transistor Transistor(Concept, mission, types)

Bipolar junction transistorStructureContact methods for BJT’s CircuitsCurrents and voltage and symbols in circles BJTBand Energy Description of BJT at (equilibrium and non equilibrium

Conditions) to npn & pnpModes of Operation for BJT

Wednesday from 2 to 3, the other time is not specified yet

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I will sent any announcement or apology by email, so please check your (I need

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Time of Periodic Exams The first periodic exam in

1312هـ - 1437 / 1 / , Please everyone attend In her group

Office Hours

Metal–Oxide–Semiconductor Contact (MOS)

structure

In this contact, a thin layer of oxide is put on the surface of a semiconductor n-

type or p-type. Then, pole metallic (metal) is put above the surface of the oxide

layer . We should choose a good electrical insulation of oxide which has a large

energy gap and isolates the metal from the semiconductor which no passing

electrical current between them.

In thermal equilibrium condition

In the absence of application of the electric

field or the voltage, the Fermi and connection

and valence levels are horizontal and flat.

 When applying an electric field, there is

a bending in energy levels

Metal–Oxide–Semiconductor Contact (MOS)

Effect of voltage bias

According to the applied voltage on this contact, it will consist three different

situations such as what is shown in figure .

1- depletion 2- inversion 3- accumulation

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Metal–Oxide–Semiconductor Contact (MOS)

Effect of voltage bias (metal and n-type contact)

1 - Depletion :

When applying negative bias voltage at the surface of metal, a small amount of

negative charges is made. Then, the oxide layer prevent electric current from

passage to semiconductor . However, the electrons in substrate of semiconductor

n-type will be affected by these negative charges and moved away from the area

located under oxide and created the depletion region in semiconductor similar to

those that created in pn Junction

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Metal–Oxide–Semiconductor Contact (MOS)

Effect of voltage bias (metal and n-type contact)

2 - Inversion

When increasing a negative bias voltage on surface of metal, Instead of

expanding more of depletion region within the semiconductor, inversion status is

formed which holes gather next to the surface of the oxide. Those holes is the

minority carriers in the semiconductor n-type.

3 - Accumulation

When applying positive bias voltage at the surface of metal, negative majority

carriers attract and accumulate at the surface of the oxide in semiconductor n-

type.

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Metal–Oxide–Semiconductor Contact (MOS)

Energy levels forms in MOS in different bias (metal and p-type contact)

1- Depletion :

When applying positive bias voltage, Fermi level move down from its first

location in thermal equilibrium condition. Also,

straight bend at the energy level in oxide

and energy levels of the semiconductor p-type

move down near the interface of oxide.

In addition, electrons drop down in potential

well. We notice that the distribution of carriers

density of per unit area in semiconductor p-type

equal in the metal

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Metal–Oxide–Semiconductor Contact (MOS)

Energy levels forms in MOS in different bias (metal and p-type contact) 2 - Inversion When increasing positive bias voltage more than threshold voltage VT ; the semiconductor inverse and electrons occupyinversion layer. Fermi level move more down from its first location in thermal equilibrium condition. Also, straight bend at the energylevel in oxide and energy levels of semiconductor p-type move more down near interface of oxide. In addition, electrons dropmore down in potential well. We notice that thedistribution of carriers density of per unit area in semiconductor p-type for maximum depletion region Wmax in addition to carrier of inversion layer Qn equal in the metal

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Metal–Oxide–Semiconductor Contact (MOS)

Energy levels forms in MOS in different bias (metal and p-type contact)

3- Accumulation

When applying negative bias voltage, Fermi level move up from its first location

in thermal equilibrium condition. Also,

straight bend at the energy level in oxide

and energy levels of the semiconductor p-type

move up near the interface of oxide.

In addition, holes climb up in potential

well. We notice that the distribution of carriers

density of per unit area in semiconductor p-type

equal in the metal

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Solving Second Homework

Transistor Brief its history

The discovery of the transistor in year 1947 in Bell Lab’s in United States of

America. Since then, this discovery is one of the most important discoveries and

that the performance of a global revolution in technology.

the first transistor in 1947 Now

TransistorIn the third chapter we studied and we focused on two types of contacts :

PN Junction: ( semiconductor of n-type & p-type ) which enters in the

structure of bipolar junction transistor and Junction gate field-effect transistor

(JFET)

MOS contact: (Metal, Oxide, Semiconductor of n-type or p-type) which enters

in the structure of metal–oxide–semiconductor field-effect transistor (MOSFET)

Concept of transistor

It is a piece of three parts and as PN Junction this parts contain extrinsic

semiconductor N-type & p-type

Transistor mission

1. Works as amplifier in electrical signals

2. works as switch in integrated circuits

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Transistor’s types

The most important types of transistor two types are:

Bipolar junction transistor (BJT):

Will be studied in detail in this chapter (Chapter four)

Field-effect transistor (FET) :

Will be studied in detail in (Chapter five)

Diffusion transistor

Unijunction transistors

Single-electron transistors

Nanofluidic transistor,

Transistor’s types

There are special types classified within provirus types which Within bipolar junction transistorHeterojunction bipolar transistor Schottky transistor Avalanche transistor Darlington transistors. Insulated-gate bipolar Photo transistorMultiple-emitter transistor Multiple-base transistor

Within field effect transistorCarbon nanotube field-effect transistor (CNFET)Junction gate field-effect transistor (JFET) metal–semiconductor field-effect transistor (MESFET (metal–oxide–semiconductor field-effect transistor (MOSFET)metal–Insulator–semiconductor field-effect transistor (MISFET)Organic field-effect transistor Ballistic transistor Floating-gate transistor etc…

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Bipolar junction transistorBJT structure

The Bipolar junction transistor contains

of npn or pnp

Which is distributed in three parts

Emitter, Base & Collector

emitter and collector contain from the same semiconductor type either n-type or p-type; but often emitter has moreimpurities. Therefore n+p n or p+n p

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Bipolar junction transistor

BJT structure

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Bipolar junction transistor

BJT structure

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Contact methods for BJT’s Circuits

The electronic circuits often have a signal or voltage inside and another outside,

and here in a BJT part of the three parts involved in each of the entrance and exit

thus

common emitter configuration base common configuration common collector configuration

The figure for (npn) type, however for the other type (pnp) just reverse the arrow

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Currents and voltage and symbols in circles BJT

IB Base current IE Emitter current IC Collector current

Always gather those three by relationship IE = IB + IC

VBE voltage between base & emitter VBC voltage between base & collector

VCE voltage between emitter & collector

Distribution in the two types npn و pnp

W1 The length of the first depletion region between base and emitter

W2 The length of the second depletion region between base and collector

WB The length of the base region

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Currents and voltage and symbols in circles BJT

IB Base current IE Emitter current IC Collector current

Always gather those three by relationship IE = IB + IC

VBE voltage between base & emitter VBC voltage between base & collector

VCE voltage between emitter & collector

Distribution in the two types npn و pnp

In electronic circuits for system method for contact transistor we need to know

Vin Input voltage Vout Output voltage

Rin Input resistance Rout Output resistance (often called load resistance RL )

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Band Energy Description of BJT at non equilibrium Conditions to npn & pnp

In the first figure

in equilibrium condition for npn,

the second figure for pnp

In two figures, we noticeFermi level stability alongacross emitter, base & collector.

It must be recalled that the contactpotential between emitter and basejunction higher than the contact potential between , base andcollector junction .This is because impurities in emitter higher than impurities in base and collector.

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Ec

Ev

Ef

P+ P

n

E CB

P

n+ n

Band Energy Description of BJT at non equilibrium Conditions

to npn & pnpIn the first figure in equilibrium condition for npn,the second figure for pnp

In two figures, we noticeFermi level variable alongacross emitter, base & Collector duo to forwardand reverse bias.

We will see in detail what is happening in the diffusion of electrons and holes and also the recombination process in BJT in the next topics.

=

Ef

P+

P

n

Ec

EvEC

B

P

n+

n

forward bias reverse bias

Modes of Operation for BJTWe saw that in equilibrium condition there will be two case of the forward and reverse bias. thus there will be four modes of operation BJT (we will only mention now)

Active mode :

The forward bias in base & emitter junction. The reverse bias in base & collector

junction.( which often we will take about)

Saturation mode : The forward bias in two junctions. the transistor in this case be a maximum connection status and operates as if it is closed switch in a circle

Cut – off mode : The reverse bias in two junctions. the transistor in this case is not leaking any current and operates as if it is open switch in a circle

Inverted mode :The reverse bias in base & emitter junction. The forward bias in base & collector junction