Editors:HDL Design

•Captures circuit connectivity (text)•Captures circuit connectivity (text)•Libraries of components (subroutines)

Schematic Editori i i i ( hi l)•Capture circuitry connectivity (graphical)

•Libraries of components (Cells)Layout Editory

•Capture physical structure•Libraries of components (Cells)

Procedural layout: The designer expresses the design in aProcedural layout: The designer expresses the design in aprogramming language with procedural calls to make graphicalobjects.

Mode Editor:

Modeless Editor:

Schematic Editor:

Schematic View:•Schematic view define the connectivity of modules (cells) in termsof other cellsof other cells.•Schematic view show how larger functional units are defined interms of smaller functional units.

i f f ll i b i l•It consist of following basic elements:Cell instances appear as symbolsWires connect cell instances to one anotherPorts/pinsAnnotation Objects (for documentation) Node labels Node labels

Symbol View:

•A symbol defines the appearance of the cell when instanced in aschematic.U th b l li i l d t t l t t ll•Uses the box, polygon, line circle, and comment tools to create cell

graphic-representation.

Property Tool:•It specify how the cell is to describe in the output netlist.L,W, AD, AS, PS, PDL,W, AD, AS, PS, PDPin names for other symbols

The different views of a cell can be edited by opening different views.

Library of circuit elements: schematic editor has a library of circuitelements. A cell is the basic design object.A Cell contains:Primitives: Geometrical objects created with the drawing tools.Instances: Copies of cells linked to their originals.s ces: Cop es o ce s ed o e o g s.

End Points:

Terminals: Input and output of logic functions are called terminalsNet: Any wire which connects two or more terminals will be called a

tnet.Connector end points can be identified when instanced in higherlevel.

Netlist: Unique format or language for representing connectivity information of logic elementsinformation of logic elements.

Why to flatten netlist?

(1) For layout generation(1) For layout generation(2) For Simulation

h i hi i fl h i b kOnce the entire thing is flatten there is no way to get back.Hierarchies are made for assistance of designer.

Composite schematic:Composite schematic:Drawing schematic by picking elements from a library.

Derived schematic:Schematic generated from a netlistSchematic generated from a netlist.

GRIDS:

•The elements are placed in workspace.•The workspace is divided into grids to help the designer tovisualize schematic bettervisualize schematic better.•These grids are useful for alignment.

Level of gates:

Gates closure to primary inputs are level 1 gatesGates closure to primary inputs are level 1 gates.

Application:d f i•Order of storing,

•Static timing analysis.

A schematic editor needs following commands for various jobs.(A) File oriented commands( )•Load a design from a file.•Save a design to a file.•Exit•Exit (save and terminate)

•Quit (d ' d i ) (don't save and terminate)

•Flatten, DRC•Import/Exportp p•Plot/print

(B) Display oriented commands: Transformations•Grid ON/OFF•Set Grid•Zoom-in and Zoom-out•Pan•Pan•Snapping or smooth cursor type

(C) Drawing related commands:C i d•Creating new record

•Pick/place•Wires•Port/pins•Instance

(D) Edit related commands:• Modifying existing recordU d f / lti l l l•Undo of one/multiple level

•Redo•Delete•Move/dragging•Modify/Change/Rename•OrientationOrientation•Cut & paste, copy & paste

Data structure:

Arrays: Collection of similar elements stored in adjacent locations.int num[ ]= {23 34 12 44 56 17}int num[ ]= {23, 34, 12, 44, 56, 17}

Linked list:(1) Linked list is a most common data structure used to store( )similar data in memory.(2)Linked list s a collection of elements called 'nodes', each ofwhich stores two items of informationwhich stores two items of information.

•An element of list (Data)•A link i.e. pointer or address of next node.

Each node contains a single client data element and a pointer to the next node in the listnext node in the list.

struct node{{

int data;

struct node* next; st uct ode e t;};

struct node* build_123()

{struct node* head=NULL;struct node* second=NULL;struct node* third=NULL;

head =(struct node*)malloc(sizeof (struct node));second=(struct node*)malloc (sizeof ( struct node));third =(struct node*)malloc (sizeof (struct node));third =(struct node*)malloc (sizeof (struct node));

head->data=1;head->next=second;head >next second;

second->data=2;second->next=third;

third->data=3;third->next=NULL;return head;

}

main(){

struct node *abc= build_123();

i tf(" Add f h d i t %d\ " b )printf(" Address of head integer %d\n", abc );printf(" Address of head in hexadecimal %x\n", abc );printf("Head_data %d\n", abc->data);return 0;return 0;

}

Record for library element:

Layout Editor:Cell View: LayoutCell View: Layout•Layout editor allows a user to specify graphically the shapes thatdefines his/her chip.G hi l h i l d•Graphical shape includes:box (rectangles)circle,arcs,polygon.

(A) File oriented commands•Load a design from a file.•Save a design to a file.Save a design to a file.•Exit (save and terminate)•Quit (don't save and terminate)•Flatten DRCFlatten, DRC•Import/Export•Plot/Print

(B) Display oriented commands:(B) Display oriented commands:•Grid ON/OFF•Set GridMajor spacingMajor spacingMinor spacingX–snap spacingY snap spacingY–snap spacing

•Zoom-in and Zoom-out•Panl ON/OFF•layer ON/OFF

•Snapping or smooth cursor type

(c) Drawing related commands•Box Polygon Arc CircleBox, Polygon, Arc, Circle•Select layer• Stretch/ rubber banding•Instance•Instance•Mirror/Flip (Vertical, Horizontal)•Wire

(D) Edit related commands(D) Edit related commands•Undo of one/multiple level•Redo•D l t•Delete•Move/dragging•Modify/Change/RenameO i t ti•Orientation

•Cut & paste, copy & paste•Merge (two adjacent geometries on same layer)

Bounding box:Bounding box of a cell layout view is the smallest rectangle alignedBounding box of a cell layout view is the smallest rectangle alignedon the x-y axes that includes all layout information.

Data structures :

B i ffi i f IC l d i•Box type geometry is sufficient for IC layout design. •The data structure for layout (assuming only box type geometries):

Using array of layers: Switching off layers would be easier.

Data structure queries•A “pick” operation: Given (x,y), tell me what I touch

•A “region query” operation: Given a bounding box, tell me what’sA region query operation: Given a bounding box, tell me what s inside it.

Uses•Checking DRC-type layout interactionsChecking DRC type layout interactions• Printing masks.• Extracting electrical circuits from layout.

S hi th i hb h d f i d i i it• Searching the neighborhood of a given device or circuit.•No inserting or deleting data is done -- just asking where things are

Adding & Deleting geometry• Inserting or removing rectangles from the data collection.g g g

Uses•Interactive layout editing:•Interactive layout editing: Cadence Virtuoso MAGICIC S iIC StationL-edit

• Global and detailed routing.g• Local rip-up and reroute.• Placement “legalization”

Linked List

•‘Pick' operation: Entire list must be examined at each search.•Region search:gAny node whose rectangle intersects the region are recordedAt the end of the pass through list, a list of all rectangles foundintersecting the given region is availableintersecting the given region is available.

Complexity:Time:Time:

• Find O(N)

• Insert O(N)

• Delete O(N)

Memory:• O(N) one link for each data item• O(N) - one link for each data item.

Bins

Di id f f h hi i l bi ( l ll d•Divide up surface of the chip into rectangular bins (also called buckets)• Inside each bin, you have a linked list of all the rectangles you , y g ytouch.

Queries• Pick: go to the bin with the (x y) you want look at all the rectanglesPick: go to the bin with the (x,y) you want, look at all the rectangles• Region query: go to all the bins that touch the region, look at all the rectangles

How does it really work•Need a pointer to a “rectangle object” from every bin it touches.p g j y• May have to walk thru lots of bins to insert/delete a big rectangle

How big should the bins be?•Let A = average object size and A = bin size•Let, Ao = average object size and Ab = bin size.

If you have many, small bins...If you have many, small bins...• Memory use is large, insert and delete times are long.• But “pick” operations are really fast (few objects per bin)• Need to be careful to tune bin granularity to problem• Need to be careful to tune bin granularity to problem

Summary• Good for evenly distributed objects of similar sizeGood for evenly distributed objects of similar size.

Complexity

Time:•Find O(1)•Insert O(1)•Delete O(1)

Memory:Memory:• O(N)-- - if number of bins is < number of objects

small linked list per bin--- small linked list per bin

Quad Tree Tree data structure with four children

ULURURLLLR

Objects that hit either of the bisector lines…• These cannot be entirely inside the UL, UR, LL, LR regions• So they go on the ‘bisector list” at the top• So, they go on the bisector list at the top.

Objects that don’t hit either of bisector lines•These live entirely inside one of the UL, UR, LL, LR regions• So, they get passed down to the quad tree for that regionSo, ey ge p ssed dow o e qu d ee o eg o• Just repeat this recursion

Quad Tree Example

Perfect quad tree: bisect till number of rectangle in a region is one.

Pick:Just walk down the treeJust walk down the tree...• Going into the region that holds your x,y, till the tree ends• Look at the rectangles you find

Region Query:•Assume your region box hits a bisectory g•Look on bisector list first for all rectangles there•Then, chop up region box into (at most 4 pieces) and pass 4 newregions down tree ie recursively call region query 4 times onregions down tree, ie, recursively call region query 4 times onchild trees

Insert and deleteInsert:Insert:Walk down tree to find appropriate quad.Create child if necessary.

D l tDelete:Remove object from the list and child from tree if necessary.

•Perfect quad tree: O lOne rectangle

•Adaptive quad tree:Not less than K rectanglegWe don’t do quad division if number of geometries are less than K.Smaller trees but lists may be longSmaller trees but lists may be long.

•Not less than area A. W d ’t d d di i i if i i t llWe don’t do quad division if region is too small;Use linked list of objects at leaves.Another adaptive sort of a tree.Smaller trees but lists may be long.

Use these ideas to tune the tree to the problemUse these ideas to tune the tree to the problem

Problem with the basic quad tree

D b kDrawback:If there are a few spots of fine detail those areas suffer from the sameslow search problems as with bins.p

Summaryy•Good for non-uniformly distributed data.

Complexity:Complexity:•Time:Find :

(l )•O(log N) Insert

•O(log N)( g ) Delete

•O(log N)

Memory:O(N)