Download - CS2420_lec1

Transcript
Page 1: CS2420_lec1

CS 2420: DIGITAL LOGIC

Lecture 1: Course Description

Instructor: Dr. Yijuan (Lucy) Lu

Page 2: CS2420_lec1

WELCOME TO CS2420: DIGITAL LOGIC Instructor: Dr. Yijuan (Lucy) Lu Nueces building (office# 270) Tel: 512-245-6580 E-mail: [email protected] WWW: http://www.cs.txstate.edu/Personnel/yl12

My research field: Multimedia Information Retrieval Machine Learning and Data Mining Statistical Learning Pattern Recognition Computer Vision Bioinformatics

Page 3: CS2420_lec1

MY GOALS FOR YOU

To understand logic and gates

To understand combinational logic design

To understand sequential logic design

To understand basic computer components

To understand basic computer architecture

Page 4: CS2420_lec1

HOW WILL THESE GOALS BE ACHIEVED?

Of course lectures and homework

Implementation labs and projects

Attendance is strongly recommended.

Office hours: Tu, Th, 1:00 3:30 pm After the class or other time-by

appointments Nueces building (office# 270)

Page 5: CS2420_lec1

COURSE TEXT M. Morris Mano and Charles R. Kime, Logic and

Computer Design Fundamentals, 4th edition, Prentice Hall, 2008.

Digital Design, 4th edition M. Morris Mano and Michael D. Ciletti, Pearson

Prentice Hall, 2007

Class Notes

Page 6: CS2420_lec1

COURSE CONTENT Digital circuit basics Number systems Boolean logic and logic gates Logic function optimization Arithmetic circuits Combinational logic circuits Sequential logic concepts and circuits Synchronous sequential logic design Finite state machine design Arithmetic state machine design Memory circuits Arithmetic logic unit (ALU) Basic computer architectures

Page 7: CS2420_lec1

LEARNING OBJECTIVES Basic understanding of electricity [HS physics level]

Rudimentary information. On semiconductors and CMOS technology. Relation to digital logic.

Introduction to digital logic design: logic and gates, combinational logic design, sequential logic design, FSMs, registers (counters and shift registers), PLA-type devices, what clock does, basic computer components and basic computer architecture

Communications concept: parallel & serial transmission, asynchronous and synchronous communication, rudiments of information theory

Page 8: CS2420_lec1

GRADING POLICY

Homework 25%

Quiz 5%

Midterm 20%

Final 20%

Lab 30%

Page 9: CS2420_lec1

HOMEWORK

One homework every two weeks: You may discuss these among yourselves but you must do your own homework

Clarity of exposition of the solutions is required

Late homework will not be graded for credit.

Page 10: CS2420_lec1

LAB AND PROJECT

Nine labs and one project

Must attend a designated lab (Counts 30% of your grade).

For details on the labs, go to the department web site www.cs.txstate.edu and follow the “Lab” links for more information, as the lab schedules begin.

Lab instructor: Conrad Miller ([email protected]) Sheetal Gampa ([email protected])

Page 11: CS2420_lec1

TESTS

Two exams (in-class) One midterm to be held during class hours One final during final week

Tests will be open-note close-book

Tests will be based on reading assignments, homework, and project

Without prior arrangements, missed exam results in a grade of zero.

Page 12: CS2420_lec1

OTHERS

All detailed information is put on the Tracs: https://tracs.txstate.edu/portal/login

Check the announcement, assignment, resources, messages and calendar on the Trancs and also your email.


Top Related