digital clock using jk flip flop

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PROJECT REPORT 24 HOUR DIGITAL CLOCK STUDENT NAME SAQIB ASLAM 3881 ROOM NUMBER

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Page 1: Digital Clock Using Jk Flip Flop

S T U D E N T N A M E

SAQIB ASLAM 3881

Page 2: Digital Clock Using Jk Flip Flop

Background

For the last 3 months we have been designing and building 24 hour digital clock based upon logic gates. In this course on Digital System we wanted to do something different about digital clock, but developing a 24 hour digital clock would have been very expensive and hard in the electronic aspects. So we decided to work as team member and distribute our work to each member which is cheaper and in some way easier.

Acknowledgement

Our project on “Digital Clock” is mainly concerned with designing of the circuit and implementing it on the bread board. All this has been possible for the generous effort of Sir Kashif Bashier (Karachi institute of Economic & Technology) who teaches the course Digital System. Our heartiest thanks go to Sir Kashif Bashier under whose guidance the entire project was being conducted.

Mr.Ameer and Mr.Mujtaba tahir, who have helped us in various manners and besides we would like to thank to both of them.

Abstract

The clock consists of three sections—seconds, minutes, hours and after reading the time 23 hours 59 mins 59 secs it resets back to 00.00.00, better referred to as the 0thhour.

Keywords

To develop DIGITAL CLOCK using 7 segment display. It show hours minute and second. Make it by using discrete components.

a. Using IC 7408, 7400, 7447 & 74107.

b. Designed Block Diagram, Logic diagram and Circuit Diagram

c. Component Description and Working.

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Introduction

We know that 60 seconds equal to 1 minute and 60 minutes equal to 1 hour. Hence the minute section is derived by second section and hour section derived by the minute section. Each of the minute and second section has been designed to give a count from 00 to 59 after which it resets to 00. And the hour section to give a count from 00 to 24 hours after which it resets to 00. For each cycle of 00 to 59 in second section the minute section increases its count by 1. Similarly for each cycle of 00 to 59 in minute section the hour section increases its count by 1. In this way when the clock reaches 23hrs. 59mins. 59secs.each of the section resets to 00 giving us a display 00.00.00 popularly known as the 0thhour. Now, without wasting any time we straightaway move into the discussion with our project with emphasis on different sections considering the modules.

Working

The entire project has been divided into four modules. They are as follows:

555 IC Timer Section:

The 555 Timer IC is an integrated circuit (chip) used in a variety of timer, pulse generation and oscillator applications. The 555 timer which give one Hz frequency to JK FLIPFLOP.

Second section

We used total four JK FLIP FLOP IC (74107) and one single IC contains two flip flops. We use three flip flop which give 0 to 7 outputs and remaining other 4 flip flop give 0 to 15. But we know digital clock always display 5 & 9 in Second, instead of it we required 0 to 5 output in single seven segment display so we connect the NAND gate which gives low logic to flip flop and not allow it to exceeding from 5 digit number which is our requirement on single seven segment display. On the other hand the remaining four flip flops which give 0 to 15 but our requirement that it should only display 0 to 9 count not to exceeding from it so we also here need NAND gate to stop it and give us our prerequisite which is 0 to 9 counting on single seven segment display. When the circuit will Display Successfully 5 & 9 in each seven segments display with the help of driver IC 7447 then it gives pulse to minute section.

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Minute section

Repeating the same circuit operation which we had previously used for the second section but this portion activates when second section more than from 5&9 second display. We used total four JK FLIP FLOP IC (74107) and one single IC contains two flip flops. We use three flip flop which give 0 to 7 count output and remaining other 4 flip flop give 0 to 15. But we know digital clock always display 5 & 9 in minute but instead of it we required 0 to 5 count output in single seven segment display so we connect the NAND gate which give low logic to flip flop and not allow it to exceeding from 5 digit number which is our requirement on single seven segment display. On the other hand the remaining four flip flops which want to give 0 to15 but our requirement that it should display 0 to 9 count not to exceeding from it so we also here need NAND gate to stop it and give us our prerequisite which is 0 to 9 count. When the circuits will Display Successfully 5&9 in each seven segments display with the help of driver IC 7447 then it gives pulse to hour section.

Hour section

Designing the circuit in such a way so that the output resets to 0 0 0 automatically displaying 11.59.59 .The counting proceeds with a frequency of one pulse per hour coming from minute section. We used three J-K flip flop IC (74107) and in a single J-K FLIP FLOP IC it contain two flip flop. We know that hour would show 2&4 in each seven segment display not great than that number. So we need 0 to 2 displays count on first segment and 0 to 4 counts on other segment. In hour section same as previous section we used J-k Flip flop to connect all needy component we need 0 to 2 display on single seven segment due to prevent it from exceeding we similarly as usual used NAND gate to clear the two flip flop which they want to show 0 to 4 count but our requirement is to only want to display 0 to 2. On other hand remaining flip flop contain which is four out of six which would like to show 0 to 15 but our required to display only 0 to 9 count on single seven segment display so we connect same as previous we had done used NAND gate to clear when it want to increase but our target display only 0 to 2 and 0 to 4 on each seven segment only, not above than that.

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COMPONENT USED

Material Quantity

IC 7408 ------------------------------------------ 5(2 for min & sec and 1 for hrs)

IC 7400------------------------------------------ 3(1 for each section)

IC 7447------------------------------------------ 6(2 for each section)

IC 74107----------------------------------------- 11(4 for sec & min 3 for hrs)

IC 555 -------------------------------------------1

7-segment display (Anode Type) -------- 6(2 for each section)

Resistances 180Ω, 10k Ω, 22k Ω ---------42, 1, 1

Capacitor 10uf, 100uf-----------------------1, 1

JK – flip-flop

In our design, Jk-flipflop and JK-flip-flop with reset function are the most important basic block used to create counters. We briefly introduce the implementation of JK-flip-flop and JK flip-flop with reset function in the next section.

The JK flip-flop augments the behavior of the SR flip-flop (J=SET, K=RESET) by interpreting the S=R=1 condition as “flip” or toggle command. Specifically, the combination J=1, k=0 is a command to set the flip-flop; the combination J=K=1 is a command to toggle the flip-flop i.e. change its output to the logical complement of its current value. The flip flop is negative edge triggered (falling clock pulse).

Page 8: Digital Clock Using Jk Flip Flop

0-5 Counter

Here, a 0-5 acts as a digital output for ten’s digit of minute. The basic idea of implementation of 0-5 counter is based on JK- flip flop to ripple the digits. Digit starts from 00 when it reaches to 5 and then returns to 00. The truth table of 0-5 counter is shown below.

The schematic and layout of 0-5 counter are shown in Figure, in this design; we used 3 JK flip flops, Inverters, and NAND gates.

0-9 counter

0-9 counter is a larger version of 0-5 counter. Here, 0-9 counter acts as a digital output for units of minute. The basic idea of implementation of 0-9 counter is also based on JK flipflop to ripple the digits. Digits start from 00, when they reach 9 in decimal and then return to 00. The truth table of 0-9 counter is shown below.

Page 9: Digital Clock Using Jk Flip Flop

Seven Segment Decoder

Here, a six 7 segment Decoder is used for output binary digits of Second Minutes and Hours in LEDs display. Normally, LEDs Display has the function as follows, and we usually use the previous 10 output from 0 to 9.

Page 10: Digital Clock Using Jk Flip Flop

To implement this function, we generate the truth table for a four Seven Segment decoder as above and get its corresponding seven segment output and annotate them in decimal.

Calculation 555 timer IC

F = 1.44

(R1+2R2)C R1=10k Ώ , R2=2.2k Ώ

F = 1.44

(10+4.4 )∗100 C=100 μF

F = 1.44

(14.4 )∗100

F = 1.441440F= 0.001 KHz

F= 1 Hz

Page 11: Digital Clock Using Jk Flip Flop

Assembling the three sections

Now the circuit designing part is more or less complete the hard work is over and we assemble the three sections (seconds, minute and hour) to get the “Digital Clock”. With the supply connected we operate the clock to check the output. The clock was found to operate smoothly.

Conclusion

The Circuit was purely designed with the basic knowledge on sequential circuit designing and with the components provided by the authority. The Clock is expected to operate normally with desired accuracy.

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Introduction …………………………………………………………………………………1

Working ……………………………………………………………………………………….1

555 IC Timer Section …………………………………………………………………….1

Second Section …………………………………………………………………………….1

Minute Section……………………………………………………………………………..2

Hour Section…………………………………………………………………………………2

Block Diagram ……………………………………………………………………………..3

Logic Diagram ………………………………………………………………………………4

Component Used …………………………………………………………………………5

JK – FLIP FLOP ………………………………………………………………………………5

0-5 Counter ………………………………………………………………………………….6

0-9 Counter ………………………………………………………………………………….6

Seven Segment Decoder ………………………………………………………………7

Calculation 555 IC ………………………………………………………………………. 8

Assembling the Three Section ………………………………………………………9

Conclusion ……………………………………………………………………………………9

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