Design for Manufacturability and Statistical Design A Constructive Approach

Series on Integrated Circuits and Systems

Series Editor: Anantha Chandrakasan Massachusetts Institute of Technology Cambridge, Massachusetts

Design for Manufacturability and Statistical Design: A Constructive Approach Michael Orshansky, Sani R. Nassif, and Duane Boning ISBN 978-0-387-30928-6

Low Power Methodology Manual: For System-on-Chip Design Michael Keating, David Flynn, Rob Aitken, Alan Gibbons, and Kaijian Shi ISBN 978-0-387-71818-7

Modern Circuit Placement: Best Practices and Results Gi-Joon Nam and Jason Cong ISBN 978-0-387-36837-5

CMOS Biotechnology Hakho Lee, Donhee Ham and Robert M. Westervelt ISBN 978-0-387-36836-8

SAT-Based Scalable Formal Verification Solutions Malay Ganai and Aarti Gupta ISBN 978-0-387-69166-4, 2007

Ultra-Low Voltage Nano-Scale Memories Kiyoo Itoh, Masashi Horiguchi and Hitoshi Tanaka ISBN 978-0-387-33398-4, 2007

Routing Congestion in VLSI Circuits: Estimation and Optimization Prashant Saxena, Rupesh S. Shelar, Sachin Sapatnekar ISBN 978-0-387-30037-5, 2007

Ultra-Low Power Wireless Technologies for Sensor Networks Brian Otis and Jan Rabaey ISBN 978-0-387-30930-9, 2007

Sub-Threshold Design for Ultra Low-Power Systems Alice Wang, Benton H. Calhoun and Anantha Chandrakasan ISBN 978-0-387-33515-5, 2006

High Performance Energy Efficient Microprocessor Design Vojin Oklibdzija and Ram Krishnamurthy (Eds.) ISBN 978-0-387-28594-8, 2006

Abstraction Refinement for Large Scale Model Checking Chao Wang, Gary D. Hachtel, and Fabio Somenzi ISBN 978-0-387-28594-2, 2006

A Practical Introduction to PSL Cindy Eisner and Dana Fisman ISBN 978-0-387-35313-5, 2006

Thermal and Power Management of Integrated Systems Arman Vassighi and Manoj Sachdev ISBN 978-0-387-25762-4, 2006

Leakage in Nanometer CMOS Technologies Siva G. Narendra and Anantha Chandrakasan ISBN 978-0-387-25737-2, 2005

Continued after index

Michael Orshansky • Sani R. Nassif • Duane Boning

Design for Manufacturability and Statistical Design

A Constructive Approach

ABC

Michael Orshansky Sani R. Nassif The University of Texas at Austin IBM Research Laboratories Austin, TX Austin, TX USA USA Duane Boning Massachusetts Institute of Technology Cambridge, MA USA Series Editor: Anantha Chandrakasan Department of Electrical Engineering and Computer Science Massachusetts Institute of Technology Cambridge, MA 02139 USA

Library of Congress Control Number: 2007933405 ISBN 978-0-387-30928-6 e-ISBN 978-0-387-69011-7

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To Leo, Mariya, Boris, Yana and ZhenyaMichael

To Cosette, Julie, Victoria and KamalSani

To my familyDuane

Preface

Progress in microelectronics over the last several decades has been intimatelylinked to our ability to accurately measure, model, and predict the physicalproperties of solid-state electronic devices. This ability is currently endan-gered by the manufacturing and fundamental limitations of nanometer scaletechnology, that result in increasing unpredictability in the physical proper-ties of semiconductor devices. Recent years have seen an explosion of interestin Design for Manufacturability (DFM) and in statistical design techniques.This interest is directly attributed to the difficulties of manufacturing of in-tegrated circuits in nanometer scale CMOS technologies with high functionaland parametric yield.

The scaling of CMOS technologies brought about the increasing magni-tude of variability of key parameters affecting the performance of integratedcircuits. The large variation can be attributed to several factors. The first isthe rise of multiple systematic sources of parameter variability caused by theinteraction between the manufacturing process and the design attributes. Forexample, optical proximity effects cause polysilicon feature sizes to vary de-pending on the local layout surroundings, while copper wire thickness stronglydepends on the local wire density because of chemical-mechanical polishing.The second is that while technology scaling reduces the nominal values ofkey process parameters, such as effective channel length, our ability to corre-spondingly improve manufacturing tolerances, such as mask fabrication errorsand mask overlay control, is limited. This results in an increase in the rela-tive amount of variations observed. The third, and most profound, reason forthe future increase in parametric variability is that technology is approachingthe regime of fundamental randomness in the behavior of silicon structures.For example, the shrinking volume of silicon that forms the channel of theMOS transistor will soon contain a small countable number of dopant atoms.Because the placement of these dopant atoms is random, the final number ofatoms that end up in the channel of each transistor is a random variable. Thus,the threshold voltage of the transistor, which is determined by the number

VIII Preface

of dopant atoms, will also exhibit significant variation, eventually leading tovariation in circuit-level performances, such as delay and power.

This book presents an overview of the methods that need to be mastered inunderstanding state-of-the-art Design for Manufacturability (DFM) and Sta-tistical Design (SD) methodologies. Broadly, design for manufacturability is aset of techniques that attempt to fix the systematic sources of variability, suchas those due to photolithography and CMP. Statistical design, on the otherhand, deals with the random sources of variability. Both paradigms must op-erate within a common framework, and their joint understanding is one ofthe objectives of this book. The areas of design for manufacturability andstatistical design are still being actively developed and the established canonof methods and principles does not yet exist. This book attempts to providea constructive treatment of the causes of variability, the methods for statis-tical data characterization, and the techniques for modeling, analysis, andoptimization of integrated circuits to improve yield. The objective of such aconstructive approach is to formulate a consistent set of methods and prin-ciples that allow rigorous statistical design and design for manufacturabilityfrom device physics to large-scale circuit optimization.

Writing about relatively new areas like design for manufacturability andstatistical design presents its difficulties. The subjects span a wide area be-tween design and manufacturing making it impossible to do justice to thewhole area in this one volume. We also limit our discussion to problems di-rectly related to variability, with the realization that the term DFM may beunderstood to refer to topics that we do not address in this book. Thus, wedo not discuss topics related to catastrophic yield modeling due to randomdefects and particles, and the accompanying issues of critical area, via dou-bling, wire spreading, and other layout optimization strategies for randomyield improvement. These topics have been researched extensively, and thereare excellent books on the subject, notably [89] and [204].

Also, with the rapid continuous progress occurring at the time of thiswriting, it is the authors’ sincere hope that many of the issues and problemsoutlined in this book will shortly be irrelevant solved problems. We assumethat the reader has had a thorough introduction to integrated circuits designand manufacturing, and that the basics of how one creates an IC from thehigh level system-oriented view down to the behavior of a single MOSFETare well understood. For a refresher, we would recommend [75] and [5].

The book is organized in four major parts. The first part on SourcesofVariability contains the three chapters of the book that deal with threemajor sources of variability: front-end variability impacting devices (Chapter2), back-end variability impacting metal interconnect (Chapter 3), and envi-ronmental variability (Chapter 4). The second part on Variability Character-ization and Analysis contains two chapters. Chapter 5 discusses the designof test structures for variability characterization. Chapter 6 deals with thestatistically sound analysis of the results of measurements that are needed tocreate rigorous models of variability. The third part is on Design Techniques

Preface IX

for Systematic Manufacturability Problems, and deals with techniques of de-sign for manufacturability. Chapter 7 describes the interaction of the designand the lithographic flow, and methods for improving printability. Chapter 8is devoted to a description of techniques for metal fill required to ensure goodplanarity of multi-level interconnect structures. The final part on StatisticalCircuit Design is devoted to statistical design techniques proper: it containsfour chapters dealing with the prediction and mitigation of the impact ofvariability on circuits. Chapter 9 presents strategies for statistical circuit sim-ulation. Chapter 10 discusses the methods for system-level statistical timinganalysis using static timing analysis techniques. In Chapter 11, the impact ofvariability on leakage power consumption is discussed. The final chapter of thebook, Chapter 12, is devoted to statistical and robust optimization techniquesfor improving parametric yield.

This book would not be possible without the generous help and supportof a lot of people: our colleagues and graduate students. Several individualshave been kind enough to read through the entire manuscript or its parts,and give the authors essential feedback. Their comments and suggestions havehelped us to make this book better. We would like to specifically thank AseemAgarwal, Shayak Banerjee, Puneet Gupta, Nagib Hakim, Yehea Ismail, MurariMani, Dejan Markovic, Alessandra Nardi, Ashish Singh, Ashish Srivastava,Brian Stine, Wei-Shen Wang, Bin Zhang, and Vladimir Zolotov. We wantto particularly thank Wojciech Maly and Lou Scheffer for reading the entiremanuscript and giving us invaluable advice. We thank Denis Gudovskiy forhis help with typesetting. Carl Harris, our publisher at Springer, has been asource of encouragement throughout the process of writing. And, of course,this book owes an enormous debt to our families.

Michael Orshansky, Austin, Texas

Sani Nassif, Austin, Texas

Duane Boning, Boston, Massachusetts

July 2007

Contents

1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.1 RISE OF LAYOUT CONTEXT DEPENDENCE . . . . . . . . . . . . 21.2 VARIABILITY AND UNCERTAINTY. . . . . . . . . . . . . . . . . . . . . 31.3 CHARACTERIZATION VS. MODELING . . . . . . . . . . . . . . . . . . 51.4 MODEL TO HARDWARE MATCHING . . . . . . . . . . . . . . . . . . . 61.5 DESIGN FOR MANUFACTURABILITY

VS. STATISTICAL DESIGN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Part I Sources of Variability

2 FRONT END VARIABILITY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112.2 VARIABILITY OF GATE LENGTH . . . . . . . . . . . . . . . . . . . . . . 15

2.2.1 Gate Length Variability: Overview . . . . . . . . . . . . . . . . . . . 152.2.2 Contributions of Photolithography . . . . . . . . . . . . . . . . . . 162.2.3 Impact of Etch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 202.2.4 Line Edge Roughness . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 222.2.5 Models of Lgate Spatial Correlation . . . . . . . . . . . . . . . . . . 24

2.3 GATE WIDTH VARIABILITY . . . . . . . . . . . . . . . . . . . . . . . . . . . 262.4 THRESHOLD VOLTAGE VARIABILITY . . . . . . . . . . . . . . . . . . 272.5 THIN FILM THICKNESS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 322.6 LATTICE STRESS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 352.7 VARIABILITY IN EMERGING DEVICES . . . . . . . . . . . . . . . . . 372.8 PHYSICAL VARIATIONS DUE TO AGING

AND WEAROUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 392.9 SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

3 BACK END VARIABILITY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 433.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 433.2 COPPER CMP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 443.3 COPPER ELECTROPLATING . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

XII Contents

3.4 MULTILEVEL COPPER INTERCONNECT VARIATION . . . 503.5 INTERCONNECT LITHOGRAPHY AND ETCH

VARIATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 523.6 DIELECTRIC VARIATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 543.7 BARRIER METAL DEPOSITION . . . . . . . . . . . . . . . . . . . . . . . . 543.8 COPPER AND VIA RESISTIVITY . . . . . . . . . . . . . . . . . . . . . . . 553.9 COPPER LINE EDGE ROUGHNESS . . . . . . . . . . . . . . . . . . . . . 563.10 CARBON NANOTUBE INTERCONNECTS . . . . . . . . . . . . . . . 573.11 SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

4 ENVIRONMENTAL VARIABILITY . . . . . . . . . . . . . . . . . . . . . . 594.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 594.2 IMPACT OF ENVIRONMENTAL VARIABILITY . . . . . . . . . . 604.3 ANALYSIS OF VOLTAGE VARIABILITY . . . . . . . . . . . . . . . . . 66

4.3.1 Power Grid Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 674.3.2 Estimation of Power Variability . . . . . . . . . . . . . . . . . . . . . 71

4.4 SYSTEMATIC ANALYSIS OF TEMPERATUREVARIABILITY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

4.5 OTHER SOURCES OF VARIABILITY . . . . . . . . . . . . . . . . . . . . 824.6 SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82

Part II Variability Characterization and Analysis

5 TEST STRUCTURES FOR VARIABILITY . . . . . . . . . . . . . . . 855.1 TEST STRUCTURES: CLASSIFICATION AND FIGURES

OF MERIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 855.2 CHARACTERIZATION USING SHORT LOOP FLOWS . . . . 875.3 TRANSISTOR TEST STRUCTURES . . . . . . . . . . . . . . . . . . . . . 925.4 DIGITAL TEST STRUCTURES . . . . . . . . . . . . . . . . . . . . . . . . . . 945.5 SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98

6 STATISTICAL FOUNDATIONS OF DATA ANALYSISAND MODELING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1016.1 A BRIEF PROBABILITY PRIMER . . . . . . . . . . . . . . . . . . . . . . . 1026.2 EMPIRICAL MOMENT ESTIMATION . . . . . . . . . . . . . . . . . . . 1046.3 ANALYSIS OF VARIANCE AND ADDITIVE MODELS. . . . . 1066.4 CASE STUDIES: ANOVA FOR GATE LENGTH

VARIABILITY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1096.5 DECOMPOSITION OF VARIANCE INTO SPATIAL

SIGNATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1136.6 SPATIAL STATISTICS: DATA ANALYSIS

AND MODELING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1186.6.1 Measurements and Data Analysis . . . . . . . . . . . . . . . . . . . . 1186.6.2 Modeling of Spatial Variability . . . . . . . . . . . . . . . . . . . . . . 119

6.7 SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122

Contents XIII

Part III Design Techniques for Systematic ManufacturabilityProblems

7 LITHOGRAPHY ENHANCEMENT TECHNIQUES . . . . . . 1277.1 FUNDAMENTALS OF LITHOGRAPHY . . . . . . . . . . . . . . . . . . 128

7.1.1 Optical Resolution Limit . . . . . . . . . . . . . . . . . . . . . . . . . . . 1287.2 PROCESS WINDOW ANALYSIS . . . . . . . . . . . . . . . . . . . . . . . . 1347.3 OPTICAL PROXIMITY CORRECTION AND SRAFS . . . . . 1377.4 SUBRESOLUTION ASSIST FEATURES . . . . . . . . . . . . . . . . . . 1407.5 PHASE SHIFT MASKING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1437.6 NON-CONVENTIONAL ILLUMINATION AND IMPACT

ON DESIGN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1497.7 NOMINAL AND ACROSS PROCESS WINDOW HOT

SPOT ANALYSIS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1507.8 TIMING ANALYSIS UNDER SYSTEMATIC

VARIABILITY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1527.9 SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154

8 ENSURING INTERCONNECT PLANARITY . . . . . . . . . . . . 1558.1 OVERVIEW OF DUMMY FILL . . . . . . . . . . . . . . . . . . . . . . . . . . 1578.2 DUMMY FILL CONCEPT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1588.3 ALGORITHMS FOR METAL FILL . . . . . . . . . . . . . . . . . . . . . . . 1608.4 DUMMY FILL FOR STI CMP AND OTHER PROCESSES . . 1638.5 SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164

Part IV Statistical Circuit Design

9 STATISTICAL CIRCUIT ANALYSIS . . . . . . . . . . . . . . . . . . . . . 1679.1 CIRCUIT PARAMETERIZATION AND SIMULATION . . . . . 167

9.1.1 Introduction to Circuit Simulation . . . . . . . . . . . . . . . . . . . 1679.1.2 MOSFET Devices and Models . . . . . . . . . . . . . . . . . . . . . . 1699.1.3 MOSFET Device Characterization . . . . . . . . . . . . . . . . . . . 1719.1.4 Statistical Device Characterization . . . . . . . . . . . . . . . . . . 1739.1.5 Principal Component Analysis . . . . . . . . . . . . . . . . . . . . . . 177

9.2 WORST CASE ANALYSIS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1809.2.1 Worst Case Analysis for Unbounded Parameters . . . . . . . 1819.2.2 Worst Case Analysis Algorithm . . . . . . . . . . . . . . . . . . . . . 1829.2.3 Corner-Based Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . 1839.2.4 Worst Case Analysis Example . . . . . . . . . . . . . . . . . . . . . . . 185

9.3 STATISTICAL CIRCUIT ANALYSIS . . . . . . . . . . . . . . . . . . . . . . 1909.3.1 A Brief SRAM Tutorial . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1909.3.2 Monte-Carlo Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 192

XIV Contents

9.3.3 Response-Surface Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . 1949.3.4 Variance Reduction and Stratified Sampling Analysis . . 197

9.4 SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 199

10 STATISTICAL STATIC TIMING ANALYSIS . . . . . . . . . . . . . 20110.1 BASICS OF STATIC TIMING ANALYSIS . . . . . . . . . . . . . . . . . 20210.2 IMPACT OF VARIABILITY ON TRADITIONAL STATIC

TIMING VERIFICATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20510.2.1 Increased Design Conservatism . . . . . . . . . . . . . . . . . . . . . . 20510.2.2 Cost of Full Coverage and Danger of Missing Timing

Violations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20710.3 STATISTICAL TIMING EVALUATION . . . . . . . . . . . . . . . . . . . 211

10.3.1 Problem Formulation and Challenges of SSTA . . . . . . . . 21110.3.2 Block-Based Timing Algorithms . . . . . . . . . . . . . . . . . . . . . 21310.3.3 Path-Based Timing Algorithms . . . . . . . . . . . . . . . . . . . . . 22110.3.4 Parameter Space Techniques . . . . . . . . . . . . . . . . . . . . . . . . 22710.3.5 Monte Carlo SSTA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 230

10.4 STATISTICAL GATE LIBRARY CHARACTERIZATION . . . 23410.5 SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 237

11 LEAKAGE VARIABILITY AND JOINT PARAMETRICYIELD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23911.1 LEAKAGE VARIABILITY MODELING . . . . . . . . . . . . . . . . . . . 23911.2 JOINT POWER AND TIMING PARAMETRIC YIELD

ESTIMATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24311.3 SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 249

12 PARAMETRIC YIELD OPTIMIZATION . . . . . . . . . . . . . . . . . 25112.1 LIMITATIONS OF TRADITIONAL OPTIMIZATION

FOR YIELD IMPROVEMENT . . . . . . . . . . . . . . . . . . . . . . . . . . . 25112.2 STATISTICAL TIMING YIELD OPTIMIZATION . . . . . . . . . . 257

12.2.1 Statistical Circuit Tuning: Introduction . . . . . . . . . . . . . . 25712.2.2 Linear Programming under Uncertainty . . . . . . . . . . . . . . 263

12.3 TECHNIQUES FOR TIMING AND POWER YIELDIMPROVEMENT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 268

12.4 SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 277

13 CONCLUSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 279

A APPENDIX: PROJECTING VARIABILITY . . . . . . . . . . . . . . 281

References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 291

Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 309