D. De Venuto, Politecnico di Bari1

Data Converter

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(b) Input signal waveform.

(c) sampling signal (control signal

for the switch). (d) Output signal (to be fed to the A/D converter).

Digital Signal Processing

(a) Sample-and-hold (S/H) circuit. The switch closes seconds every period.

Process of periodically sampling an analog signal.(b)

(c)

(d)

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A/D and D/A Converter

A/DconvertervA

123:N

D/Aconverter

vA

123:N

The A/D and the D/A converters as circuit blocks: N-bit digital word.

D. De Venuto, Politecnico di Bari4

An N-bit D/A converter using a binary-weighted resistive ladder network.

D/A Converter: Binary-Weighted Resistor configuration

⎟⎠

⎞⎜⎝

⎛+++=+++= − N

NrefNN

refrefrefo

bbb

R

Vb

R

Vb

R

Vb

R

Vi

2...

22

2

2...

2 22

11

121

ofo iRv −=

ofo iRv −=

D. De Venuto, Politecnico di Bari5

Basic circuit configurations of a DAC utilizing an R-2R ladder network.

DAC: R-2R ladder network

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A practical circuit implementation of a DAC utilizing an R-2R ladder network.

DAC: Practical implementation

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The dual-slope A/D conversion method. Note that vA is assumed to be negative.

A/D Converter: Dual-slope

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Charge-distribution A/D converter suitable for CMOS implementation. (a) Sample phase; (b) hold phase; and (c) charge-redistribution phase.

The Charge-Redistribution A/D converter

D. De Venuto, Politecnico di Bari9

Sigma-Delta A/D converter

a -1 b

g f

IN

SUM

CLK

VR1

c -1 -1d

e

-1-1