counit1workbook

Upload: ramya-krishna

Post on 09-Apr-2018

218 views

Category:

Documents


0 download

TRANSCRIPT

  • 8/7/2019 COUNIT1Workbook

    1/15

    Q1. Describe with the help of a block diagram the top level functional units ofthe computer and their main function at a high level? Describe the basicprogram execution model on a Von-Newmann architecture machine with a

    block diagram?

    Answer: A digital computer is a machine that takes a solution to a problem (Infinite number of unambiguous steps) and applies the solution on a given inputand gives the resultant output. The solution that can be understood by acomputer is in binary notation and it is a practice for users to write theirsolutions in a more friendly English-like yet precise language called high levelprogramming language that is than converted by the appropriate translatorsoftware to equivalent binary solution. This solution is called the program. Adigital computer can at a very high level be described as a system that has 5major components to execute the given programs.

    The 5 major components of a computer are:

    Arithmetic Logic Unit

    Control Unit

    Memory

    Input

    Output

  • 8/7/2019 COUNIT1Workbook

    2/15

    The Arithmetic Logic Unit (commonly referred to as ALU) and Control Unittogether is usually called the processor because in modern desktops they cometogether on one mother board. The input and output units combined are calledthe I/O unit.

  • 8/7/2019 COUNIT1Workbook

    3/15

    Arithmetic Logic Unit (ALU):ALU is the main execution engine of the computer where the actual executionof the operations takes place. The ALU usually is a hardware combinationalcircuit that can perform simple data manipulation & data transfer operations

    and a collection of high speed storage elements called registers to hold datathat can be used as input to the combinational circuit to execute the desiredoperation. The combinational circuit supports to a minimal level the followingbasic operations.

    Data Transfer Operations (Moving Data from one register to another)

    Data Manipulation Operationso Arithmetic Operations (ADD, SUBTRACT, INCREMENT, DECREMENT

    and so forth)

    o Logical Operations (AND, OR, XOR, COM and so forth)

    o Shift Operations (LOGICAL, AIRHTMETIC, CIRCULAR left & right

    shifts)

    Control Unit:Control Unit is effectively the nervous system of the computer. It coordinatesall activities in the computer. It takes the steps in your solution from memory,understands what action needs to be taken and than generate signals for allparts of the computer to do the activities that would in effect execute theaction in the given step. It is responsible to not only facilitate all sub-actionsneeded to be done to complete an action but also make sure they are done inthe prescribed order.

    Memory:Memory refers to the electronic memory which works as the primary storagedevice for a computer to store all the running programs (code, data, andtemporary stack storage). The processor contacts the memory under thecontrol of the control unit to get the instructions of the currently executingprogram. The processor also contacts the memory to get the data(operands)needed to execute an instruction and also uses memory as a storage to storeoutput data coming from the instruction execution. Memory is usuallyimplement using RAM technology.

    Input:Input components refers to all the input devices and the interface devices thatallow all the input devices connected to a computer to communicate with theprocessor and memory to get data from external environment. No meaningfulprogram can be written without getting some input from the user and similarlythere has to be a way for inputting a given program to the computer forexecution. All these activities are achieved with the help of Input unit of a

  • 8/7/2019 COUNIT1Workbook

    4/15

    computer. The input unit is designed in such a way that we can connect manynumber of different input devices to the computer through which inputstimulus can be given to the running programs as and when they ask for it orare expecting it.

    Output:This is similar to input unit except that this unit helps coordinate computersconnection with external environment to give out results/output. A number ofoutput devices can be connected to the computer using the output unit. Somedevices can act as both input and output devices and hence are part of boththe input and output unit.

    Basic program execution using Von-Newmann architecture:

    Von-Newmann architecture is also referred to as stored program architecture.

    This is the most popular and widely used model for building computers. As thename implies, in this model, the computer takes the program to be executedfrom the memory one instruction at a time, decodes/understands theinstructions and than executes the instruction, the steps of which will dependon what the instruction is. The algorithm for program execution in Von-Newmann architecture is:

    While (there are unprocessed instructions in the program){

    1. Get the next instruction to be executed from memory.2. Decode the instruction.

    3. Get the operands needed for the instruction from memory if any.4. Execute the steps in ALU.

    }

    The typical computer designed using Von-Newmann architecture can be seenbelow:

    The key to program execution is a few special purpose registers that will haveinformation on the memory location where the next instruction can be located,current instruction, last memory word read, etc.

    Special Purpose Registers:PC (Program Counter): Will have the address of the next instruction.IR (Instruction Register): Will have the current instruction executed.MAR (Memory Address Register): Having the address of the memory location wewant to read from or write to.MDR (Memory Data Register): A buffer register which have the data read frommemory or data to be written to memory location identified by MAR.

  • 8/7/2019 COUNIT1Workbook

    5/15

    General Purpose Registers:Named using convention like R1, R2, etc, there registers will be used to storeactively used data so they are available quickly to the ALU as needed.

    Given these components, the algorithm for program execution given above can

    be made more specific as below:

    1. Operating System will put the address of the first instruction of theprogram in PC.

    2. The computer does the following.a. Moves the contents of PC to MAR.b. Reads the memory word in location pointed by MAR to MDR. At

    the same time, PC is incremented by 1, so PC will have theaddress of the next instruction.

    c. Moves MDR contents to IR.d. Control unit looks at IR to decode the instruction.

    e. To read any operands needed, the address of the operand ismoved to MAR, operand read and stored in a general purposeregister.

    f. The instruction is executed by ALU.g. Go back to step a.

    Key words/Phrases: [For ease of recollection]

    ALU

    Control Unit

    Memory (read & write)

    Registers Input

    Output

    Von-Neumann Architecture

    Stored Program computer

    PC, MAR, MDR, IR

    Q2. Discuss the factors influencing the executing time of a given program.Develop a performance equation for execution time based on the said factors,

    and explain in detail some of the techniques that can be used to improve theexecution time of the program by decreasing or increasing the above discussedperformance factors?

    Answer. The executing time of a given program for a given input dependsroughly on the following factors assuming that is the only program running onthe computer and there are no other competing processes competing for theshared resources.

  • 8/7/2019 COUNIT1Workbook

    6/15

    Clock Rate ( R ): The clock rate can be defined as number of small instructionscan be executed by a computer in one second. Clock rate is really number ofclock cycles per second, where each clock cycle is equal to the time taken toexecute one micro-operation. Clock Rate is a measure of the speed of the

    underlying hardware in executing the micro-operations as a part of programexecution. This is usually measured in Hertz.

    Average steps (Micro-operations) in an instruction (S): Step is a micro-operation that can be executed in one clock cycle. S is actually going to theaverage number of steps in all the executable instructions of a given programfor a given input. This parameter gives an indication as to how many clockcycles are needed on an average per executing instruction for a given program.

    Number of executing instructions (N): N is the total number of executinginstructions in a given program for a given input. This is the count of executed

    instruction, not the lines in the program. Example: If an instruction is executedtwice, it is counted as 2 executed instructions.

    The above 3 parameters play a role in determining the execution time of agiven program for a certain input. The execution time equation (PerformanceEquation) would be:

    T = (S X N)/R

    Where:

    T: Execution timeS: Average number of steps in an executed instructionN: Total executed instructionsR: Clock Rate

    As we can see from above, to improve the execution time (decrease the timetaken to execute the program), we should look for either:

    Reducing S X N

    Increasing R

    Increasing R: If we can reduce the time taken to execute a micro-operation, the clock

    rate to be increased. To reduce the time taken to execute the micro-operations:

    o Hardware advances are coming every day to reduce the

    propagation delays in the combinational circuits.

    Reducing S X N:

  • 8/7/2019 COUNIT1Workbook

    7/15

    There are two different schools of thought to reduce the values of S X N.RISC: In this architecture, the idea is that the computer only supports only a

    small set of simple instructions. The assumption is, this will reduce the numberof sub-steps (micro-operations) in an instruction. Though, this might cause anincrease in N (given that we only have simple instruction, number of

    instructions needed to state a solution would be more), the idea is that simpleinstructions support would automatically means optimizations like pipeliningcan be implemented much more easily and efficiently leading to reducing theoverall time taken to execute all the instructions.

    CISC: In this architecture, the idea is that the computer supports a largenumber of instructions ranging from simple to complex. The assumption is, thiswill reduce the number of instructions needed in the program. Though, thismight cause an increase in S (Complex instructions have more number of sub-steps), the idea is that overall S X N will decrease.

    What is pipelining: Pipelining is a technique by which we enable the computerto work on more than one instruction at a time effectively reducing the timetaken to execute program (throughput) while still taking the same time foreach instruction. Most modern computers now support pipelining, allowing tofinish more number of instructions in a given time, therefore reducing theexecution time of a program.

    Multiprocessors: The execution time of a program can also be reduced byhaving more than one processor enabling us to execute more than oneinstruction at a time in parallel. This is distinct from pipelining where we arenot talking about having more than one processor. Using Multiprocessors,

    though in theory we can get linear improvement in performance proportionalto the number of processors, in practice we get sub-linear improvement vowingto communication and distribution overhead. We can achieve super-linearperformance if we combine pipelining with Multiprocessors.

    Key words/Phrases: [For ease of recollection]

    Execution Time

    Average Number of Steps (S)

    Number of executed instructions (N)

    Clock Rate

    T = S X N / R

    RISC

    CISC

    Pipeline & Multiprocessors

    Q3. Compare and contrast between multi-processors and multi-computers?

  • 8/7/2019 COUNIT1Workbook

    8/15

    Answer: In the quest to improve throughput (the number ofinstructions/programs that can be executed) and response time for programs,the developments have lead two different architecture models.

    Multi-processors:

    Multi-processors are those computers that employ more than one main-lineprocessors to increase the number of things that can be done in parallel. Theidea is that the more the number of processors, the more numbers of thingscan be done in parallel, increasing the throughput and response time forprograms.

    Main Characteristics:

    All processors are connected to a shared memory that is used fordifferent processors to communicate with each other.

    The complexity of the computer design is high because of the increasednumber of connections.

    The communication is parallel in nature because parallel connectinglines will be there between each processor and memory enablingtransfer of multiple bytes of information in one go.

    More costly because of additional complexity involved.

    Because of shared-memory, multi-processors are also commonly referredto as shared-memory multi-processors.

    More suitable for tightly coupled processes.

    Advantages:

    For processes that communicate a lot, multi-processors systems offer agreat advantage in terms of speed because:

    o They communicate using shared memory.

    o The communication is parallel

    Disadvantages:

    Very costly & complicated.

    Scalability low because the complexity and cost grow many fold forevery unit increase in number of processors and consequently computingpower.

    Low flexibility.

    Multi-computers:Multi-computers is actually a collection of simple computers connected in anetwork to be used as a group for parallel processing. The connection is serialin nature.

    Main characteristics:

    Each mode in the collection is an independent computer.

  • 8/7/2019 COUNIT1Workbook

    9/15

    The different processes running on different computers cancommunicate if needed using serial communications through the LAN,causing communication to be slow but low cost.

    More suitable for loosely-coupled processes that need very little or nocommunication.

    No shared memory and communication is done using message passingthrough the network. This architecture therefore is also referred to asmessage-passing multi-computers.

    Advantages:

    Scalable.

    Flexible.

    Low cost.

    Disadvantages:

    Communication slow.

    Key words/Phrases: [For ease of recollection]

    Multiprocessoro Shared Memory

    o Parallel communication

    o Fast

    o Complex

    o Less scalable

    o Tightly coupled

    Multi-computers

    o Message passingo Serial communication

    o Slow in communication

    o Less complex

    o Scalable

    o Loosely coupled.

    Q4. Describe (r 1)s complement and ( r )s complement of a given number inbase r. Describe algorithm for unsigned number subtraction using (r 1) and/orrs complement. Perform (1011) base 2 (011) base 2 using 8 bit registersunsigned arithmetic.

    Answer.(r- 1)s complement: (r -1)s complement for a number x in base r can bedefined as:

    y = ((r) power n ) 1 x;

  • 8/7/2019 COUNIT1Workbook

    10/15

    Where: x is the number for which we want (r 1) complement,r is the radix of the number in which x is represented,

    n is the number of letters (bits in case of binary and digits in case ofdecimal)

    y is the (r 1)s complement.

    The definition can also be written as:x + y = ((r) power n) - 1

    (r 1)s complement is 1s complement in binary (r = 2). (r 1)s complement is9s (r=10) complement in decimal number system.

    Example: compute 1s complement for (101) base 2.

    n = 3; r = 2; x = 101;

    y = (2**3 1) base 10 (101) base 2;y = 111 101y = 010

    (r)s complement: (r)s complement for a number x in base r can be definedas:

    y = ((r) power n ) x;

    Where: x is the number for which we want (r)s complement,

    y is the radix of the number in which x is represented,n is the number of letters (bits in case of binary and digits in case of

    decimal)y is the (r)s complement.

    The definition can also be written as:x + y = ((r) power n)

    (r)s complement is 2s complement in binary (r = 2). (r )s complement is 10s(r = 10) complement in decimal number system.

    Example: compute 2s complement for (101) base 2.

    n = 3; r = 2; x = 101;

    y = (2**3) base 10 (101) base 2;y = 1000 101y = 011

  • 8/7/2019 COUNIT1Workbook

    11/15

    Algorithm for unsigned binary subtraction of unsigned numbers:

    Problem: M N, where both M & N are binary unsigned numbers.

    Algorithm:

    Step 1: Take 1s complement of N. [We get 2**n 1 N]Step 2: Add 1 to the result from step 1. [We get 2**n N]Step 3: Add result from step 2 to M. [We get M + 2**n N]Step 4: The result from step 3, should be analyzed on 2 conditions. When M >=N (result will be positive) or when N > M (result will be negative).Step 5: If M >= N, we can see the result in Step 3 as, (M N) + 2**n. the 2**nwill manifest itself as additional carry, which can be ignored because we areonly interested in computing M N. After ignoring the additional carry, the restof the result is M N. The fact that there is additional carry indicates that M >=N. So, when that happens as a result of Step 3, ignore the carry and the resultis your result.

    Step 6: If N > M, we can see the result in Step 3 as, 2**n (N M). Since theresult would be negative, and we are only representing unsigned numbers, onlythe magnitude of the result can be obtained. We know that the result isnegative from the fact that step 3 does not result in additional carry. To getthe magnitude, we have to do step 7 & step 8.Step 7: Take 1s complement of result from Step 3. [(2**n 1) 2**n + N M = N M 1]Step 8: Add 1 to the result from Step 8. [N M 1 + 1 = N M]. So we got themagnitude of the result, which is a negative number.

    (1011) base 2 (011) base 2:

    M = (00001011) base 2N = (00000011) base 2

    Step 1: Take 1s complement of N. Do this by reversing 0s to 1s and 1s to 0s.N = (11111100) base 2

    Step 2: Get 2s complement of N. Add 1 to 1s complement.2s complement of N = (11111101) base 2.

    Step 3: Do M + 2s complement of N.

    0000101111111101-----------

    1 00001000

  • 8/7/2019 COUNIT1Workbook

    12/15

    Step 4: There is a carry coming in Step 3. That indicates M > N. In that case,ignore the carry and the rest is the result.

    Step 5: the result is (00001000) base 2 = (2**3*1) base 10 = 8

    Key words/Phrases: [For ease of recollection] r 1 complement definition

    r complement definition

    M >= N condition

    N > M condition

    Result in 2s complement form.

    Q5. Describe different representation forms for positive and negative binarynumbers. Describe an algorithm that can be used to perform signed binaryarithmetic when negative numbers are stored in 2s complement form?

    Describe overflow and how it can be detected in signed arithmetic? Perform(100000) base 2 + (100000) base 2 using signed arithmetic in 8 bit registers.Perform (100000) base 2 (10) base 2 using signed arithmetic in 8-bit registers.

    Answer.

    Positive Binary Numbers:Positive binary numbers are always represented in a computer using signedmagnitude representation. Positive in represented as 0. The most significantbit in the register will be used to represent the sign and the other bits are usedto represent magnitude in signed magnitude form.

    For example: In an 8-bit register +10 as binary is represented as:0 0001010S MagnitudeThe 0 to the extreme-left indicates it is a positive number and the remainingbits indicate 10 which is the magnitude of the number.

    Negative Binary Numbers:Negative binary numbers can be represented using 3 different representationforms. The 3 different forms are:

    Signed magnitude representation

    1s complement representation

    2s complement representation.

    Signed magnitude representation (For negative numbers): This is similar topositive numbers except that the sign bit (the bit to the extreme left) will be 1indicating that the sign of the number is negative.

  • 8/7/2019 COUNIT1Workbook

    13/15

    For example: In an 8-bit register -10 as binary is represented (using signedmagnitude representation) as:1 0001010S Magnitude

    The 1 to the extreme-left indicates it is a negative number and the remainingbits indicate 10 which is the magnitude of the number.

    1s complement representation (for negative numbers): In thisrepresentation form, the corresponding positive number is taken in signedmagnitude representation and 1s complement of that number is taken alongwith sign bit to indicate the corresponding negative number.

    For example: In an 8-bit register -10 as binary is represented (using 1scomplement representation) as:11110101

    This is obtained as follows:Take +10 in signed magnitude form: 00001010Take 1s complement of this: 11110101 [This is -10 in 1s complement form]

    Note: The 1 to the extreme-left indicates it is a negative number.

    2s complement representation (for negative numbers): In thisrepresentation form, the corresponding positive number is taken in signedmagnitude representation and 2s complement of that number is taken alongwith sign bit to indicate the corresponding negative number.

    For example: In an 8-bit register -10 as binary is represented (using 2scomplement representation) as:11110110

    This is obtained as follows:Take +10 in signed magnitude form: 00001010Take 1s complement of this: 11110101 [This is -10 in 1s complement form]Add 1 to get 2s complement: 11110110 [This is -10 in 2s complement form]

    Note: The 1 to the extreme-left indicates it is a negative number.

    Most common representation for negative numbers:

    Problems with signed magnitude and 1s complement forms:

    Both Signed magnitude and 1s complement representation forms fornegative numbers have different representations for +0 and -0 which isconfusing since both are mathematically the same.

  • 8/7/2019 COUNIT1Workbook

    14/15

    Since both signed magnitude and 1s complement forms use differentforms for -0 and +0, the range of numbers we get is -2**(n 1) 1 to2**(n -1) 1.

    To prevent the above problems, 2s complement notation is the preferred form

    for representing negative binary numbers, because in that -0 and +0 have thesame representation and the range of numbers in 1 higher: -2**(n 1) to 2**(n 1) 1.

    Binary Arithmetic (Addition/Subtraction) when negative numbers are in 2scomplement form:

    Both addition & subtraction are the similar because A B can be written as A +(-B).

    A + B:

    Do binary addition. Note the carry into sign-bit (Cin)

    Note the carry out of sign bit. (Cout)

    If (Cin XOR Cout) = 1, there is overflow, result is not valid. Otherwise,ignore the carry and the rest is the result.

    A B:

    Take 2s complement of B. Let that be H. Do A + H by following theabove algorithm.

    Overflow:

    When we do addition or subtraction of signed numbers there is every chancethat the result (when the magnitude is bigger than operands which willhappened when both the operands are of same sign in case of addition anddifferent signs in case of subtraction) is so big that it cannot be fit in the givensize register. This scenario is called overflow. This is not a problem using paperand pen because there are no size limitations but is a problem in computersgiven finite size of registers.

    (100000) base 2 + (100000) base 2:

    M = 00100000N = 00100000

    M + N = 01000000

    Carry into sign bit = 0, carry out of sign bit = 0. Exclusive or both of these = 0.So there is no overflow. The result is valid and is (01000000) base 2.

    (100000) base 2 (10) base 2:

  • 8/7/2019 COUNIT1Workbook

    15/15

    M = 00100000

    N = 000000101s of N = 11111101

    2s of N = 11111110+ M = 00100000

    M + 2s N + 1 = 1 00011110

    Carry into sign bit = 1, carry out of sign bit = 1; Exclusive or of both = 0. Sothere is no overflow. Ignore any carry and the result is (00011110) base 2 = (30)base 10.

    Key words/Phrases: [For ease of recollection]

    Signed Magnitude representation

    1s complement representation 2s complement representation

    Range of numbers

    Overflow

    Checking for overflow

    Getting magnitude of the number from 2s complement representationof negative numbers.