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Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

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Page 1: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

Computer Architecture and Hardware

Introduction and revision

Slides heavily based on Adrian Shaw’s material

Page 2: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

CS25410

• Semester 1

• 75% Examination + 25% Assignment

• Assignment - Assembly Language Program

• LC-3 Virtual Computer – 16 bit

2

Page 3: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

What do we cover?• Arithmetic review

• Logic and Logic Circuit Review

• CPU/Memory/Bus

• Multiplexers, Address decoders

• Machine code

• Assembly Language/Assembler/Simulator

• I/O

• Basic Electricity and Power Storage3

Page 4: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

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Recommended Texts

• Tocci & Ambrosio: Microprocessors & Microcomputers– Physical Sciences Library: QA76.5.T6 – Note 6th edition is out, but is a lot more

expensive. 5th edition is fine

• Patt & Patel: Introduction to Computing Systems – McGraw Hill

Page 5: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

Let’s talk about numbers

5

Page 6: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

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The Digital Computer

• Computers (as we know them) work on 1’s and 0’s– Nothing else

• All commands to the CPU are just strings of these

• All output from the CPU is in strings of these

Page 7: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

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So we need to understand binary?

• Yes. To understand how a computer works, you have to understand how it uses numbers.

• You should be able to:– Convert from binary to decimal, and vice-versa– Do simple sums in binary

• Can you do this already? You should be able to! Quick revision….

Page 8: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

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Binary

• Otherwise known as base 2• Each 1 or 0 is called a bit• We can string bits together to form a byte• A byte is (normally) 8 bits• e.g. 10011101• We are not good at reading binary - we like to

read numbers as decimal• But to understand the computer, we need to

understand binary

Page 9: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

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Binary to Decimal

Taking our example: 10011101

←Most significant bit …….. Least significant bit→

1 0 0 1 1 1 0 1

128s 64s 32s 16s 8s 4s 2s 1s

1×128 0×64 0×32 1×16 1×8 1×4 0×2 1x1

128+16+8+4+1 = 157

Page 10: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

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Decimal to Binary

• e.g. 201201 -128 Yes 1

73 -64 Yes 1

9 -32 No 0

9 -16 No 0

9 -8 Yes 1

1 -4 No 0

1 -2 No 0

1 -1 Yes 1

Page 11: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

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Why these numbers?Binary Decimal Power of 2

10000000 128 27

1000000 64 26

100000 32 25

10000 16 24

1000 8 23

100 4 22

10 2 21

1 1 20

Page 12: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

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It’s the same method as in Decimal!

Decimal Power of 10

1000 103

100 102

10 101

1 100

Page 13: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

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But Decimal is clumsy

• 8 bits (1 byte) we can represent 28 - 256 - different numbers

• So we often use hexadecimal (hex for short)

• Hexadecimal is base 16

Page 14: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

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Hexadecimal

• But there are only ten symbols to represent numbers, how can we manage to represent numbers from 10 to 15 with a single digit?

• We use the letters A to F

• So our counting goes…

0 1 2 3 4 5 6 7 8 9 A B C D E F

Page 15: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

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Hexadecimal

Hex Decimal Power of 16

10000 65536 164

1000 4096 163

100 256 162

10 16 161

1 1 160

Page 16: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

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Why is Hex better?

• One byte = 8 bits• 256 = 28 = 162 = 102.40824

• 16 = 24

• This means each four bits can be represented by one hex digit

• e.g. 101100102 = B216

Binary 1011 0010

Hex B 2

Note use of subscript to denote base

Page 17: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

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Arithmetic in other bases

• It’s just like in Decimal, except you have to remember to ‘carry’ at the right point

1 0

+ 1 1

1 0 1

1 0 1

– 1 1

1 0

3 F

+ 8 4

C 3

4 3

– 2 E

1 5

Binary Hexadecimal

Page 18: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

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Arithmetic in other bases (2)

• If you find that too confusing, you can always:– Convert the numbers to decimal– Do the sums– Convert the answer back to the original base

• But you might not notice if a carry or a borrow happened; this becomes important later (though there are other ways you can tell)

Page 19: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

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Bases - Summary

• Make sure you can… – Convert between binary, decimal and hex

(without a calculator!)– Do simple sums in binary and hex (just addition

and subtraction)

• Tip: Learn to recognise the powers of 2 (2,4,8,16,32,64,128,256) and 16 (16,256) rather than having to work them out each time you need them

Page 20: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

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Do it now!

• I really can’t stress this enough…

• Don’t wait until revision time; stuff later in the course relies heavily on you knowing this.

• You may get lost if you don’t do it now.

Page 21: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

Digital Logic(Revision)

Page 22: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

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0’s and 1’s

• As we have already considered, a computer operates on 0’s and 1’s– Why? Because the power on a line can be either

off (0) or on (1). We do not consider in-between values!

• How does a computer carry out calculations on these 0’s and 1’s?– It uses logic

Page 23: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

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Logic

• By logic, we mean the process of testing the input on one or more input lines, to produce output on one or more output lines

• We use the terms AND, OR, NOT, NAND, NOR, and XOR

Page 24: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

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AND: Truth Table

• If A AND B are both TRUE – then result is also TRUE

A B A•B

0 0 0

0 1 0

1 0 0

1 1 1

Truth table for AND

Note • signifies AND

Page 25: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

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OR: Truth Table

• If either A OR B (or both) are TRUE– Then result is TRUE

A B A+B

0 0 0

0 1 1

1 0 1

1 1 1Note + signifies OR

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Exclusive OR!• Except, beware:• If A OR B are TRUE – but NOT both of them

– Then result is TRUE

• This is called the Exclusive OR (XOR)

A B AB

0 0 0

0 1 1

1 0 1

1 1 0

Page 27: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

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NOT

The simplest of all. It just inverts the input

A A

0 1

1 0

We signify NOT by a line over the corresponding letter(s)

Page 28: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

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NAND

This is simply the opposite of AND

A B A•B

0 0 0

0 1 0

1 0 0

1 1 1

A B A•B

0 0 1

0 1 1

1 0 1

1 1 0

Page 29: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

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NOR

Similarly, this is the opposite of OR

A B A+B

0 0 0

0 1 1

1 0 1

1 1 1

A B A+B

0 0 1

0 1 0

1 0 0

1 1 0

Page 30: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

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Logic Gates

• A logic gate is a device (e.g. on a chip) which takes one or more inputs, performs a logical operation on them (such as AND, OR, etc) and produces an output

• On a circuit diagram, we have special symbols for these

Page 31: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

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Logic Gates

AND NAND NOT

OR NOR XOR

Page 32: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

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Multiple Input Logic Gates

• All the logic gates on the previous slide, except the NOT gate, may have multiple inputs.

• What do you think the truth table would be for a three-input AND gate?

Page 33: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

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Revision

• Make sure you know what each gate symbol stands for

• Know the truth tables for each logic gate

• Learn the digital logic expressions for each gate

• Again, do it NOW! Don’t wait.

Page 34: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

Memory

How a computer stores information

(still revision)

Page 35: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

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Basic Computer Architecture

processor (CPU) memory

I/O devices

bus

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What is memory?

• A collection of individual storage cells

• These cells are known as locations

• Each location can store a fixed number of bits

• Each has a unique address

Page 37: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

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Memory exampleAddress (binary)

Address (hex)

Contents

00000000 00 01100101

00000001 01 10010110

00000010 02 01100010

00000011 03 01110111

00000100 04 11010110

00000101 05 00101110

Example data only

Page 38: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

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Hex address

• We tend to use Hex, it’s easier than binary to remember, and closer related to the binary than decimal is

• As an assembly language programmer, you will often have to refer to addresses.

• You will find this out for yourselves later in the course – so get used to it!

Page 39: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

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Jargon

• A byte is (usually) 8 bits of data, e.g. 00101101• For the purposes of this course, we will assume we

always mean 8 bits when we talk about a byte• Don’t get confused between bytes and bits – it’s

easily done.• e.g. we talk of a 256 megabyte memory chip, but a

56 kilobit modem or 8 megabit broadband. Remember this when estimating transfer times!!!

Page 40: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

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More confusion

• What is a kilobyte?• You’d think it would be 1000 bytes, right?• Wrong. Well, usually. A kilobyte is usually 1024

byte (210)• In 2000, the International Electrotechnical

Commission defined the terms kibi-, mibi- , gibi- and tebi- byte for 10241, 10242, 10243 and 10244 bytes (symbols KiB, MiB, GiB, TiB), but they certainly aren’t universally used

Page 41: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

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More jargon

• A word of memory is the contents of a single memory location

• So an n-bit word is a word comprising n bits of data, e.g. a 16-bit word, or a 32-bit word

• An n-bit machine is a processor designed to work mainly with n-bit words

• Operating systems – 16 bit, 32 bit, 64 bit…

Page 42: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

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Basic Memory Unit

1-bit memory

enable

read/write control

data in

data out

or a single data I/O line

Page 43: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

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Basic Memory Unit (2)

• But we deal with words of memory, and we read or write the whole word at a time

• So we only need one enable line and one read/write line for the whole word

• But we still need separate data I/O lines (why?)

Page 44: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

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One (4-bit) word of memory

1 bit 1 bit 1 bit 1 bit

common enable

common read/write control

data I/O

data I/O

data I/O

data I/O

Page 45: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

The Bus

A collection of wires which carry data between the CPU, memory and I/O devices

Page 46: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

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Components of the Bus

Address Buscarries memory address values from the CPU to the

memory and I/O

Data Buscarries all data, including machine codes, in all directions

Control Busa small number of wires carrying the read/write and

enable signals, and a few other “control” signals

Page 47: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

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Important Bus Parameters

Width of the address busDetermines the size of the address space – i.e. how many

locations can be addressed

Width of the data busDetermines how much data can be transferred in a single

data transfer cycle (thus affecting the speed). Usually the same as the machine (and memory) word size

Bus SpeedThe number of transfers possible per second

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Bus Width

• An address or data bus that contains n wires, or lines, is said to be n lines wide.

• Such a bus can carry an n-bit number in a single operation

• This does not apply to the control bus, as it only needs to carry simple control signals

Page 49: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

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Example 8-bit Bus

8 linesphysically…

but on a circuit diagram… 8

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Address Space

• An n bit address bus can carry any address that fits into an n bit binary number

• Therefore, it can carry 2n possible addresses

• These will be 0 to 2n-1

• e.g. an address bus with 16 lines can address 216 (=65536) locations; a 32 line address bus can address 232 (=4,294,967,296) locations

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Bus Cycles

Bus cycleA single data transfer operation over the bus. The speed

of this operation is governed by the bus speed, and affects the speed of the computer

Read cycleA bus cycle in which data is read by the CPU from

memory or an I/O device

Write cycleA bus cycle in which data is written by the CPU to

memory or an I/O device

Page 52: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

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Example: Bus Read Cycle

undefined

undefined

undefined

control bus lines

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Bus Read Cyclet1 CPU puts address on address bus and sets

R/W line to 1 (=read)

t2 CPU asserts Valid Address line on control bus

t3 memory responds by putting data on data bus

t4 CPU reads data from data bus, and stops asserting valid address.

Next cycle begins

Page 54: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

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Data Throughput

• The data throughput rate is the number of bytes (or bits) that can be transferred over the bus in one second.

• Therefore, it is the product of the bus speed (cycles per second) and the data bus width (bits per cycle)

Page 55: Computer Architecture and Hardware Introduction and revision Slides heavily based on Adrian Shaw’s material

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Data Throughput Example

• A 16-bit data bus running at 10 million cycles per second (10 Megahertz) has a data throughput rate of 20 million bytes (or 160 million bits) per second

• Data throughput rate is a major limitation on the speed of a computer. That is why powerful computers have very wide data buses

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Who Controls the Bus?

• In a simple system, always the CPU– but note DMAC later in this course

• For each bus cycle, the CPU must:– specify the address– select read or write– supply the data, if it’s a write

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Addressing I/O DevicesThe Problem

• all data traffic from the CPU has to go down the data bus

• all addressing has to go down the address bus– but memory uses this address space already

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Addressing I/O DevicesThe Solution

There are two common ways to solve this problem

1. Give I/O devices a separate address space (how?)

2. Allow I/O devices to share the same address space as memory

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Separate I/O address space

• Uses the control bus to specify whether we’re addressing memory or I/O

• Memory responds only if Memory Select is active; I/O only if I/O select is active

• This method requires the CPU to have separate machine codes for memory and I/O read and writes– Why?

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Same address space

• When I/O devices share the same address space as memory, it is known as Memory-Mapped I/O

• I/O devices are given specific addresses in the memory address space.

• Reads and writes to these addresses access I/O devices instead of memory

• This does not require separate machine codes, since the value of the address is sufficient to distinguish between I/O and memory

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Test Yourself!

1. What is the data throughput rate, in bytes, of a 32-bit data bus running at 20 Megahertz?

2. How many locations can an 8-bit address bus address?

3. True or false – all buses are bi-directional4. Can you draw a timing diagram for a bus read

cycle, identifying the lines, and the four key time points?

5. What is Memory-Mapped I/O?