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Chapter 3 MOS Transistor (MOSFET) CMOS Digital Integrated Circuits

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Chapter 3 MOS Transistor

(MOSFET)

CMOS Digital Integrated Circuits

Figure 3.5: Accumulation

3.2: MOS structure under external bias

Figure 3.6: Depletion

Figure 3.7: Inversion

3.3: Structure and Operation of MOS Transistor (MOSFET)

Find VT0

N-channel MOSFET

Substrate Na=1E16 cm-3

Poly-Si gate Nd=2E20 cm-3

Tox=50 nm

Oxide interface fixed charge density Nox=4E10 cm-3

3.4: MOSFET I-V Characteristics

3.5: MOSFET Scaling and Small-Geometry Effects

Full Scaling (Constant-Field Scaling)Quantity Before Scaling Full Scaling

Channel Length L 1/S

Channel Width W 1/S

Gate oxide thickness tox 1/S

Junction depth xj 1/S

Power supply voltage VDD 1/S

Threshold voltage VT0 1/S

Doping densities NA and ND S

Oxide capacitance Cox S

Drain current ID 1/S

Power dissipation P 1/S2

Power density P/area 1

Quantity Before Scaling Full Scaling Constant-V Scaling

Channel Length L 1/S 1/S

Channel Width W 1/S 1/S

Gate oxide thickness tox 1/S 1/S

Junction depth xj 1/S 1/S

Power supply voltage VDD 1/S 1

Threshold voltage VT0 1/S 1

Doping densities NA and ND S S

Oxide capacitance Cox S S

Drain current ID 1/S S

Power dissipation P 1/S2 S

Power density P/area 1 S3

Constant-Voltage Scaling

Full Scaling (Constant-Field Scaling)Quantity Before Scaling Full Scaling

Channel Length L 1/S

Channel Width W 1/S

Gate oxide thickness tox 1/S

Junction depth xj 1/S

Power supply voltage VDD 1/S

Threshold voltage VT0 1/S

Doping densities NA and ND S

Oxide capacitance Cox S

Drain current ID 1/S

Power dissipation P 1/S2

Power density P/area 1

Time delay tdelay

Capacitance ?Cox W L -> 1/S

DDIVC∆

Power = IDD VDD

Short Channel Effects

VT0 decreases

Why?How much?

Mobility degradation

Oxide breakdown becauseOf hot carrier effect

Hot-carrier induced oxide damage

3.6: MOSFET Capacitance

Oxide Capacitance

Junction Capacitance