cad-ip reuse via the bookshelf for fundamental vlsi cad algorithms

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DARPA DARPA CAD-IP Reuse via the Bookshelf CAD-IP Reuse via the Bookshelf for Fundamental VLSI CAD for Fundamental VLSI CAD Algorithms Algorithms Andrew E. Caldwell, Andrew E. Caldwell, Andrew B. Kahng Andrew B. Kahng and and Igor L. Markov Igor L. Markov

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CAD-IP Reuse via the Bookshelf for Fundamental VLSI CAD Algorithms. Andrew E. Caldwell, Andrew B. Kahng and Igor L. Markov. Outline. Sample problems in EDA industry lack of qualified VLSI CAD engineers time-to-market often, no feel for QOR Sample problems in academic research - PowerPoint PPT Presentation

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DARPADARPA

CAD-IP Reuse via the Bookshelf for CAD-IP Reuse via the Bookshelf for Fundamental VLSI CAD AlgorithmsFundamental VLSI CAD Algorithms

Andrew E. Caldwell, Andrew B. Kahng Andrew E. Caldwell, Andrew B. Kahng

andand Igor L. Markov Igor L. Markov

06/08/00

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OutlineOutline

Sample problems in EDA industrySample problems in EDA industry lack of qualified VLSI CAD engineerslack of qualified VLSI CAD engineers

time-to-markettime-to-market

often, no feel for QORoften, no feel for QOR

Sample problems in academic researchSample problems in academic research focus on isolated optimizations; no good evaluation of focus on isolated optimizations; no good evaluation of QOR QOR

potentially outdated understanding of design processespotentially outdated understanding of design processes

IP-based solution, a culture changeIP-based solution, a culture change Notion of CAD-IP (reuse), incentives for developing CAD-IP and reusing itNotion of CAD-IP (reuse), incentives for developing CAD-IP and reusing it

Need infrastructure for developing, cataloguing and distributing CAD-IPNeed infrastructure for developing, cataloguing and distributing CAD-IP

CAD-IP reuse via the MARCO/GSRC Bookshelf; current statusCAD-IP reuse via the MARCO/GSRC Bookshelf; current status

FuturesFutures

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Sample Problems in EDA industrySample Problems in EDA industry

LackLack (“insufficient supply”) (“insufficient supply”) of qualified VLSI CAD engineersof qualified VLSI CAD engineers100s of companies may re-implement 100s of companies may re-implement same algorithmssame algorithms

wasted resources compound the problem of insufficient supplywasted resources compound the problem of insufficient supply

Time to market Time to market ((5-7 year delay from publishing to first industrial use5-7 year delay from publishing to first industrial use))academic papers often lack empiricsacademic papers often lack empirics every user re-runs empirics every user re-runs empirics

tool integration (tool integration (academics tend to focus on isolated optimizationsacademics tend to focus on isolated optimizations))changes in technology and design processeschanges in technology and design processes

Qualify of result (QOR)Qualify of result (QOR)often often cannot becannot be evaluated in an isolated [optimization] context evaluated in an isolated [optimization] contextCAD engineers have no feel for QOR CAD engineers have no feel for QOR

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Sample Problems in Academic ResearchSample Problems in Academic Research

Focus on narrow optimizationsFocus on narrow optimizations sometimes sometimes no abilityno ability to evaluate QOR (in a relevant way) to evaluate QOR (in a relevant way) no feel for QORno feel for QOR impact of research severely limited impact of research severely limited

Potentially outdated understanding of design processesPotentially outdated understanding of design processes Example in placement: fixed-die reality vs. variable-die research Example in placement: fixed-die reality vs. variable-die research

(see paper (see paper 27.5 27.5 in in DAC ProceedingsDAC Proceedings))

““Lack of communication”Lack of communication” lack of communication with industry (see above)lack of communication with industry (see above) lack of communication with each otherlack of communication with each other

(a 1999 paper on partitioning ignored all partitioning literature of 1994-99)(a 1999 paper on partitioning ignored all partitioning literature of 1994-99) even “all-to-all communication” even “all-to-all communication” (everyone reads every paper) will fail(everyone reads every paper) will fail

solution: solution: more efficient evaluation, comparison and filteringmore efficient evaluation, comparison and filtering

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Solution by reuseSolution by reuse

What is to be re-used: “CAD-IP”What is to be re-used: “CAD-IP” Data models and benchmarksData models and benchmarks

context descriptions and use modelscontext descriptions and use models testcases and good solutionstestcases and good solutions

Algorithms and algorithm analysesAlgorithms and algorithm analyses mathematical formulationsmathematical formulations comparison and evaluation methodologies for algorithms comparison and evaluation methodologies for algorithms executables and source code of implementationsexecutables and source code of implementations leading-edge performance resultsleading-edge performance results

Traditional (paper-based) publications (6-page 2-column papers)Traditional (paper-based) publications (6-page 2-column papers)

Encourage reuse by crediting it: Encourage reuse by crediting it: culture changeculture change

Create and maintain infrastructure for reuseCreate and maintain infrastructure for reuse related: open-source culturerelated: open-source culture

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The GSRC Bookshelf for CAD-IPThe GSRC Bookshelf for CAD-IP

Bookshelf consists of slotsBookshelf consists of slots slots represent active research areas with “enough customers”slots represent active research areas with “enough customers” collectively, the slots cover the fieldcollectively, the slots cover the field

Who maintains slots?Who maintains slots? experts in each topic collaborate to produce them - experts in each topic collaborate to produce them - anyone can contributeanyone can contribute

Currently, over 15 active slotsCurrently, over 15 active slots SAT (U. Michigan, Sakallah)SAT (U. Michigan, Sakallah) Graph Coloring (UCLA, Potkonjak)Graph Coloring (UCLA, Potkonjak) Hypergraph Partitioning (UCLA, Kahng)Hypergraph Partitioning (UCLA, Kahng) Block Packing (UCSC, Dai)Block Packing (UCSC, Dai) Placement (UCLA, Kahng)Placement (UCLA, Kahng) Global Routing (SUNY Binghamton, Madden)Global Routing (SUNY Binghamton, Madden) Single Interconnect Tree Synthesis (UIC, Lillis and UCLA, Cong)Single Interconnect Tree Synthesis (UIC, Lillis and UCLA, Cong) Recent additions: Mathematical programming, BDDs, Clock Routing trees etc.Recent additions: Mathematical programming, BDDs, Clock Routing trees etc.

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What’s in a Slot? What’s in a Slot? Introduction Introduction

why this area is important and recent progresswhy this area is important and recent progress pointers to other resources (links, publications)pointers to other resources (links, publications)

Data formats used for benchmarksData formats used for benchmarks SAT, graph formats etc.SAT, graph formats etc. new XML-based formatsnew XML-based formats

Benchmarks, solutions, performance resultsBenchmarks, solutions, performance results including experimental methodology (e.g., runtime-quality Pareto curve)including experimental methodology (e.g., runtime-quality Pareto curve)

Binary utilitiesBinary utilities format converters, instance generators, solution evaluators, legality checkersformat converters, instance generators, solution evaluators, legality checkers optimizers and solversoptimizers and solvers executablesexecutables

Implementation source codeImplementation source code Other info relevant to algorithm research and implementationsOther info relevant to algorithm research and implementations

detailed algorithm descriptionsdetailed algorithm descriptions algorithm comparisonsalgorithm comparisons

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UCLA PD Tools release (June 2, 2000)UCLA PD Tools release (June 2, 2000) 118K lines in C++ under MIT open-source license118K lines in C++ under MIT open-source license

http://vlsicad.cs.ucla.edu/software/http://vlsicad.cs.ucla.edu/software/PDtoolsPDtools

Also:Also: openeda.org edacafe.com ASPs (toolwire.com) …openeda.org edacafe.com ASPs (toolwire.com) …

34 packages connected using shared libraries, ~3MB total34 packages connected using shared libraries, ~3MB totalCapo placer, MLPart partitioner, UCLA DB, parsers, support libsCapo placer, MLPart partitioner, UCLA DB, parsers, support libs

Installation script for Unix systems (Solaris, Linux etc.)Installation script for Unix systems (Solaris, Linux etc.)

No package version management (but the distribution itself No package version management (but the distribution itself

is versioned)is versioned)

MSVC++ configuration: more work neededMSVC++ configuration: more work needed

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Contributing to BookshelfContributing to Bookshelf Request membership in the Request membership in the bookshelfbookshelf group at group at http://www.gigascale.orghttp://www.gigascale.org

ask for "developer" membership (as applicable)ask for "developer" membership (as applicable) go over existing slots related to your researchgo over existing slots related to your research browse mail archivesbrowse mail archives

Are you creating a new bookshelf slot?Are you creating a new bookshelf slot? Yes (no existing slots are appropriate)Yes (no existing slots are appropriate)

use slot template from Web page (fill in the blanks)use slot template from Web page (fill in the blanks) write introwrite intro give references to relevant sites give references to relevant sites mail the URL (or the HTML) to bookshelf developersmail the URL (or the HTML) to bookshelf developers

No (contribution to an existing slot)No (contribution to an existing slot) agree with the maintainers of the slot about your contributionagree with the maintainers of the slot about your contribution

e.g., convert LaTeX tables from conference papers into HTML by tth

mail URL or your contributions to slot maintainersmail URL or your contributions to slot maintainers

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Future Directions: New Tool FlowsFuture Directions: New Tool Flows

Recent splash of interest to placement among researchersRecent splash of interest to placement among researchersAt least 6-7 academic groups have working placersAt least 6-7 academic groups have working placers

At least 3 placers support Bookshelf file formatAt least 3 placers support Bookshelf file format

Always need to evaluate results with a routerAlways need to evaluate results with a router

UCLA/ABKgroup assembled such a flow for plug-in placerUCLA/ABKgroup assembled such a flow for plug-in placer

Using Bookshelf formats (and converters to/from LEF/DEF)Using Bookshelf formats (and converters to/from LEF/DEF)can now test other academic placers with commercial routerscan now test other academic placers with commercial routers

can mix and match constructive and iteratively improving placerscan mix and match constructive and iteratively improving placers

can mix and match global and detailed placerscan mix and match global and detailed placers

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ConclusionsConclusions The Bookshelf is accepting contributionsThe Bookshelf is accepting contributions

The Bookshelf gets a lot of hits The Bookshelf gets a lot of hits

The Bookshelf helps doing researchThe Bookshelf helps doing researchhas clear problems formulationshas clear problems formulations

offers a catalogue of available implementationsoffers a catalogue of available implementations

facilitates comparisons and evaluations that may be hard OWfacilitates comparisons and evaluations that may be hard OW

The Bookshelf reduces waste by improving reuseThe Bookshelf reduces waste by improving reuse

The Bookshelf helps the EDA industryThe Bookshelf helps the EDA industryPoints out academic research “that actually works”Points out academic research “that actually works”

Gives access to more open-source codesGives access to more open-source codes

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http://vlsicad.cs.ucla.edu/GSRC/bookshelf/http://vlsicad.cs.ucla.edu/GSRC/bookshelf/