(assume

25
52 = offset 1000 word (4 bytes) ITEM = 1060 Operand Memory address updated [PC] = 1008 (a) Relative addressing mode 1000 200 = offset 1000 1200 Base register (b) Pre-indexed addressing mode 200 Offset register * * * * * * * * * * * * * * * LDR R1, ITEM 1004 1008 - - STR R3, [R5, R6] R5 R6 Figure 3.3. Examples of ARM memory addressing m Operand

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(Assume. top. of. stack. is. at. level. 1. b. elo. w.). Calling. program. LDR. R0,POINTER. Push. NUM1. –. STR. R0,[R13,#. 4]!. on. stack. LDR. R0,N. Push. n. –. STR. R0,[R13,#. 4]!. on. stack. BL. LIST. ADD. LDR. R0,[R13,#4]. Mo. v. e. the. sum. in. to. - PowerPoint PPT Presentation

TRANSCRIPT

Page 1: (Assume

52 = offset

1000

word (4 bytes)

ITEM = 1060 Operand

Memory address

updated [PC] = 1008

(a) Relative addressing mode

1000

200 = offset

1000

1200

Base register

(b) Pre-indexed addressing mode

200

Offset register

***

***

***

***

***

LDR R1, ITEM

1004

1008 -

-

STR R3, [R5, R6] R5

R6

Figure 3.3. Examples of ARM memory addressing modes.

Operand

Page 2: (Assume

100 = 25 x 4

1000

word (4 bytes)

(a) Post-indexed addressing with writeback

25

2008

Base register

(b) Pre-indexed addressing with writeback

2012

Base register (Stack pointer)

***

6

1100

R2

R0

Figure 3.4. ARM memory addressing modes involving writeback.

-17

***

3211200

100 = 25 x 4

1000

Offset register

R10

R5

2727

-2012

after execution of

Memoryaddress

Push instruction

Load instruction:

LDR R1,[R2],R10,LSL #2

Push instruction:

STR R0,[R5,#-4]!

Page 3: (Assume

(Assumetopofstackisatlevel1below.)

Callingprogram

LDR R0,POINTER PushNUM1STR R0,[R13,# 4]! onstack.LDR R0,N PushnSTR R0,[R13,# 4]! onstack.BL LISTADDLDR R0,[R13,#4] MovethesumintoSTR R0,SUM memorylocationSUM.ADD R13,R13,#8 Removeparametersfromstack....

Subroutine

LISTADD STMFD R13!,{R0 R3,R14} Saveregisters.LDR R1,[R13,#20] LoadparametersLDR R2,[R13,#24] fromstack.MOV R0,#0

LOOP LDR R3,[R2],#4ADD R0,R0,R3SUBS R1,R1,#1BGT LOOPSTR R0,[R13,#24] Placesumonstack.LDMFD R13!,{R0 R3,R15} Restoreregistersandreturn.

(a)Calling program and subroutine

[R0]

[R1]

[R2]

[R3]

ReturnAddress

n

NUM1

Level 3

Level2

Level 1

(b) Top of stack at various times

Figure 3.11. Program of Figure 3.7 written as an ARM subroutine; parameters passed on the stack.

Page 4: (Assume

Memorylocation Instructions Comments

Callingprogram...

2000 LDR R10,PARAM2 Placeparametersonstack.2004 STR R10,[SP,# 4]!2008 LDR R10,PARAM12012 STR R10,[SP,# 4]!2016 BL SUB12020 LDR R10,[SP] StoreSUB1result.2024 STR R10,RESULT2028 ADD SP, SP, #8 Removeparametersfromstack.2032 nextinstruction

...

Firstsubroutine

2100 SUB1 STMFD SP!,{R0 R3,FP, LR} Saveregisters.2104 ADD FP, SP,#16 Loadframepointer.2108 LDR R0,[FP,#8] Loadparameters.2112 LDR R1,[FP,#12]

...LDR R2,PARAM3 Placeparameteronstack.STR R2,[SP, # 4]!

2160 BL SUB22164 LDR R2,[SP],#4 Pop SUB2resultinto R2.

...STR R3,[FP, #8] Placeresultonstack.LDMFD SP!,{R0 R3,FP, PC} Restoreregistersandreturn.

Secondsubroutine

3000 SUB2 STMFD SP!,{R0,R1,FP,LR} Saveregisters.ADD FP,SP, #8 Loadframepointer.LDR R0,[FP, #8] Loadparameter....STR R1,[FP, #8] Placeresultonstack.LDMFD SP!,{R0,R1,FP,PC} Restoreregistersandreturn.

Figure 3.12. Nested subroutines in ARM assembly language.

Page 5: (Assume

Figure 3.13. ARM stack frames for Figure 3.12.

FP

FP

[FP] from SUB1

2164

Stackframe

forfirst

subroutine

[R3] from Main

param3

[R0] from Main

[R1] from Main

[R2] from Main

Old TOS

2020

[FP] from Main

param1

param2

[R1] from SUB1

[R0] from SUB1

Stackframe

forsecond

subroutine

Page 6: (Assume

for (j = n 1; j > 0; j = j 1){for ( k = j 1; k>= 0; k = k 1 )

{ if (LIST[k]> LIST[j] ){ TEMP = LIST[k];

LIST[k]= LIST[ j];LIST[ j]= TEMP;

}}

}

(a) C-language program for sorting

ADR R4,LIST Load list pointerregisterR4,LDR R10,N andinitializeouterloopbaseADD R2,R4,R10 registerR2to LIST + n.ADD R5,R4,#1 Load LIST +1 into R5.

OUTER LDRB R0,[R2,# 1]! Load LIST( j) into R0.MOV R3,R2 Initializeinner loopbaseregister

R3 to LIST + n 1.INNER LDRB R1,[R3,# 1]! Load LIST( k) into R1.

CMP R1,R0 Compare LIST(k) to LIST( j).STRGTB R1,[R2] If LIST( k) > LIST( j ), interchangeSTRGTB R0,[R3] LIST( k)and LIST( j ),andMOVGT R0,R1 move(new) LIST( j) into R0.CMP R3,R4 If k > 0,repeatBNE INNER inner loop.CMP R2,R5 If j > 1, repeatBNE OUTER outerloop.

(b) ARM program implementation

Figure 3.15. An ARM byte-sorting program.

––

–––

Page 7: (Assume

Figure 3.18. The 68000 register structure.

Word

15 13 10 8 4 0

Byte

Supervisor stack pointer

Long word

User stack pointer

SR

PC

31 15 7 0816

Program counter

Status register

CarryOverflowZeroNegativeExtend

Trace mode selectSupervisor mode select

Interrupt mask

pointersStack

registersData

registersAddress

D0

D1

D2

D3

D4

D5

D6

D7

A0

A1

A2

A3

A4

A5

A6

A7

-T-S

-I

-X

-Z-N

-V-C

Page 8: (Assume

D3

PC

9

D67C

i + 4

i + 2

i

(c) Consequences of the execution

(b) Encoding of the OP-code word

(a) Format of the OP-code word for an ADD instruction

CD 76Hex

Binary 00110 1 1 101101 1 0 1

src1011 dst 0

OP code

size

58111215 9 7 6 0

Beforeinstruction fetch

Afterinstruction execution

25 34

PC i i + 4

Immediate operand

OP-code word

Figure 3.21. The 68000 instruction ADD #9,D3.

D3

Page 9: (Assume

21510-

63910

Figure 3.22. A 68000 routine for

C = 202200

B = 201152

A = 201150

201210

20120E

20120C

20120A

201208

201206

201204

201200

201202

OP-code word

20

1150

2200

OP-code word

1152

20

OP-code word

20

MOVE A,D0

ADD B,D0

MOVE D0,C

After execution, [202200] = 42410

C A B + .

Page 10: (Assume

(Assumetopofstack isat level1 below.)

Callingprogram

MOVE.L #NUM1, (A7) Pushparametersontostack.MOVE.L N, (A7)BSR LISTADDMOVE.L 4(A7),SUM Saveresult.ADDI.L #8,A7 Restoretopofstack....

Subroutine

LISTADD MOVEM.L D0 D1/A2, (A7) SaveregistersD0,D1,and A2.MOVE.L 16(A7),D1 Initializecounterto n.SUBQ.L #1,D1 Adjustcount touseDBRA.MOVEA.L 20(A7),A2 Initializepointer tothelist.CLR.L D0 Initializesumto0.

LOOP ADD.W (A2)+,D0 Addentryfromlist.DBRA D1,LOOPMOVE.L D0,20(A7) Putresultonthestack.MOVEM.L (A7)+,D0 D1/A2 Restoreregisters.RTS

(a)Calling program and subroutine

[D0]

[D1]

[A2]

Returnaddress

n

NUM1

Lev

el

3

Level2

Level1

(b) Stack contents at different times

Figure 3.29. Program of Figure 3.26 written as a 68000 subroutine, parameters passed on the stack.

Page 11: (Assume

Memorylocation Instructions Comments

Callingprogram...

2000 MOVE.L PARAM2, (A7) Placeparametersonstack.2006 MOVE.L PARAM1, (A7)2012 BSR SUB12014 MOVE.L (A7),RESULT Storeresult.2020 ADDI.L #8,A7 Restorestack level.2024 nextinstruction

...

Firstsubroutine

2100 SUB1 LINK A6,#0 Setframepointer.2104 MOVEM.L D0 D2/A0, (A7) Saveregisters.

MOVEA.L 8(A6),A0 Loadparameters.MOVE.L 12(A6),D0...MOVE.L PARAM3, (A7) Placeaparameteronstack.

2160 BSR SUB22164 MOVE.L (A7)+,D1 PopresultfromSUB2 into D1.

...MOVE.L D2,8(A6) Placeresult onstack.MOVEM.L (A7)+,D0 D2/A0 Restoreregisters.UNLK A6 Restoreframepointer.RTS Return.

Secondsubroutine

3000 SUB2 LINK A6,#0 Setframepointer.MOVEM.L D0 D1, (A7) Saveregisters.MOVE.L 8(A6),D0 Loadparameter....MOVE.L D1,8(A6) Placeresult onstack.MOVEM.L (A7)+,D0 D1 Restoreregisters.UNLK A6 Restoreframepointer.RTS Return.

Figure 3.30. Nested subroutines in 68000 assembly language.

––

– –

– –

Page 12: (Assume

Figure 3.31. 68000 stack frames for Figure 3.30.

A6

A6

[A6] from SUB1

2164

Stackframe

forfirst

subroutine

[A0] from Main

param3

[D0] from Main

[D1] from Main

[D2] from Main

Old TOS

2014

[A6] from Main

param1

param2

[D1] from SUB1

[D0] from SUB1

Stackframe

forsecond

subroutine

Page 13: (Assume

for (j = n 1; j > 0; j = j 1){ for ( k = j 1; k >= 0; k= k 1 )

{ if (LIST[k]> LIST[j] ){ TEMP = LIST[k];

LIST[k]= LIST[ j];LIST[ j ] = TEMP;

}}

}

(a) C-language program for sorting

MOVEA.L #LIST,A1 Pointertothestartofthelist.MOVE N,D1 Initializeouter loopSUBQ #1,D1 indexj in D1.

OUTER MOVE D1,D2 InitializeinnerloopSUBQ #1,D2 indexk in D2.MOVE.B (A1,D1),D3 Current maximumvaluein D3.

INNER CMP.B D3,(A1,D2) If LIST(k) [D3],BLE NEXT donotexchange.MOVE.B (A1,D2),(A1,D1) InterchangeLIST(k)MOVE.B D3,(A1,D2) andLIST( j) andloadMOVE.B (A1,D1),D3 newmaximum into D3.

NEXT DBRA D2,INNER Decrementcounterskand jSUBQ #1,D1 andbranch backBGT OUTER if notfinished.

(b) 68000 program implementation

Figure 3.34. A 68000 byte-sorting program.

Page 14: (Assume

Figure 3.37. IA-32 register structure.

31 13 11 9 7 0

Instruction pointer

CF - CarryZF - ZeroSF - SignTF - Trap

IOPL - Input/Output

OF - Overflow

IF - Interrupt enable

R0

R1

31 0

R7

FP0

FP1

FP7

63 0

CS

16 0

SS

ES

FS

GS

DS

Code Segment

Stack Segment

Data Segments

31 0

Status register

12 8 6

privilege level

Generalpurposeregisters

8

Floating-pointregisters

8

Segmentregisters

6

Page 15: (Assume

31 15 7 0816

registersData

R0

R1

R2

R3

R4

R5

R6

R7

Figure 3.38. Compatibility of the IA-32 register structure

with earlier Intel processor register structures.

AH AL

AX

CH CL

CX

DH DL

DX

BH BL

BX

Generalpurposenaming

EAX

ECX

EDX

EBX

ESP

EBP

ESI

EDI

EIP

EFLAGS

SP

SI

BP

DI

IP

FLAGS

registersPointer

registersIndex

pointerInstruction

registerStatus

Figure 3.38. Compatibility of the IA-32 register structure with earlier Intelprocessor register structures.

Page 16: (Assume

1000

60 = displacement

1000

doubleword

1060 Operand

Figure 3.39. Examples of addressing modes in the IA-32 architecture.

Mainmemoryaddress

Base register EBP

Operand address (EA) = [EBP] + 60

(a) Base with displacement mode, expressed as [EBP + 60]

1000

200 = displacement

1000

1200

Operand

Base register EBP

Operand address (EA) = [EBP] + [ESI] 4 + 200

(b) Base with displacement and index mode, expressed as [EBP + ESI * 4 + 200]

1360

List of 4-byte (doubleword)

data items

40

Index register ESI

scale factor = 4

160 = [Index register] 4

***

***

***

***

***

***

***

***

***

***

Page 17: (Assume

LEA EBX,NUM1 Initializebase(EBX) andMOV ECX,N counter(ECX)registers.MOV EAX,0 Clearaccumulator(EAX)MOV EDI,0 andindex (EDI) registers.

STARTADD: ADD EAX,[EBX+EDI 4] Addnextnumber into EAX.INC EDI Incrementindexregister.DEC ECX Decrementcounter register.JG STARTADD Branch back if [ECX] > 0.MOV SUM,EAX Storesuminmemory.

(a) Straightforward approach

LEA EBX,NUM1 LoadbaseregisterEBX andSUB EBX,4 adjustto holdNUM1 4.MOV ECX,N Initializecounter/index(ECX).MOV EAX,0 Cleartheaccumulator (EAX).

STARTADD: ADD EAX,[EBX+ECX 4] Addnextnumber into EAX.LOOP STARTADD Decrement ECX andbranch

back if [ECX]> 0.MOV SUM,EAX Storesuminmemory.

(b) More compact program

Figure 3.40. IA-32 program for adding numbers.

*

*

Page 18: (Assume

Callingprogram...LEA EBX,NUM1 LoadparametersMOV ECX,N intoEBX,ECX.CALL LISTADD Branch tosubroutine.MOV SUM,EAX Storesumintomemory....

Subroutine

LISTADD: PUSH EDI SaveEDI.MOV EDI,0 UseEDI asindexregister.MOV EAX,0 UseEAX asaccumulator register.

STARTADD: ADD EAX, [EBX+EDI 4] Addnextnumber.INC EDI Increment index.DEC ECX Decrementcounter.JG STARTADD Branchback if [ECX]>0.POP EDI RestoreEDI.RET Branchback toCallingprogram.

(a) Calling program and subroutine

ESP [EDI]ReturnAddress

OldTOS

(b) Stack contents after saving EDI in subroutine

Figure 3.45. Program of Figure 3.40a written as an IA-32 subroutine;parameters passed through registers.

*

Page 19: (Assume

(Assumetopofstack isat level1below.)

Callingprogram

PUSH OFFSET NUM1 Pushparametersontothestack.PUSH NCALL LISTADD Branch tothesubroutine.ADD ESP,4 Removenfromthestack.POP SUM Popthesuminto SUM....

Subroutine

LISTADD: PUSH EDI Save EDIanduseMOV EDI,0 asindexregister.PUSH EAX Save EAXanduseasMOV EAX,0 accummulator register.PUSH EBX Save EBXandloadMOV EBX,[ESP+20] addressNUM1.PUSH ECX Save ECXandMOV ECX,[ESP+20] loadcountn.

STARTADD: ADD EAX,[EBX+EDI 4] Addnextnumber.INC EDI Incrementindex.DEC ECX Decrementcounter.JG STARTADD Branch back ifnotdone.MOV [ESP+24],EAX OverwriteNUM1 instackwithsum.POP ECX Restoreregisters.POP EBXPOP EAXPOP EDIRET Return.

(a) Calling program and subroutine

[ECX]

[EBX]

[EAX]

[EDI]

ReturnAddress

n

NUM1

Level3

Level2

Level1

(b) Stack contents at different times

Figure 3.46. Program of Figure 3.40a written as an IA-32 subroutine; parameters passed on the stack.

*

Page 20: (Assume

Address Instructions Comments

Callingprogram...2000 PUSH PARAM2 Placeparameters2006 PUSH PARAM1 onstack.2012 CALL SUB12017 POP RESULT Storeresult.

ADD ESP,4 Restorestack level....

Firstsubroutine

2100 SUB1: PUSH EBP Saveframepointerregister.MOV EBP,ESP Loadframepointer.PUSH EAX Saveregisters.PUSH EBXPUSH ECXPUSH EDXMOV EAX,[EBP+8] Getfirstparameter.MOV EBX,[EBP+12] Getsecondparameter....PUSH PARAM3 Placeparameteronstack.

2160 CALL SUB22165 POP ECX PopSUB2resultinto ECX.

...MOV [EBP+8],EDX Placeansweronstack.POP EDX Restoreregisters.POP ECXPOP EBXPOP EAXPOP EBP Restoreframepointerregister.RET ReturntoMainprogram.

Secondsubroutine

3000 SUB2: PUSH EBP Saveframepointerregister.MOV EBP,ESP Loadframepointer.PUSH EAX Saveregisters.PUSH EBXMOV EAX,[EBP+8] Getparameter....MOV [EBP+8],EBX PlaceSUB2resultonstack.POP EBX Restoreregisters.POP EAXPOP EBP Restoreframepointerregister.RET Returntofirstsubroutine.

Figure 3.47. Nested subroutines in IA-32 assembly language.

Page 21: (Assume

Figure 3.48. IA-32 stack frames for Figure 3.47.

EBP

EBP

[EBP] from SUB1

2165

Stackframe

forfirst

subroutine

[EAX] from Main

param3

[EDX] from Main

[ECX] from Main

[EBX] from Main

Old TOS

2017

[EBP] from Main

param1

param2

[EAX] from SUB1

[EBX] from SUB1

Stackframe

forsecond

subroutine

Page 22: (Assume

for (j = n 1; j > 0; j = j 1){for ( k = j 1; k >= 0; k= k 1 )

{ if (LIST[k]> LIST[j]){ TEMP = LIST[k];

LIST[k]= LIST[j];LIST[j] = TEMP;

}}

}

(a) C-language program for sorting

LEA EAX,LIST Loadlist pointerbaseMOV EDI,N register(EAX),andinitializeDEC EDI outer loopindexregister

(EDI) to j=n 1.OUTER: MOV ECX,EDI Initializeinnerloopindex

DEC ECX register(ECX) to k= j 1.MOV DL,[EAX+EDI] Load LIST(j) intoregisterDL.

INNER: CMP [EAX +ECX],DL CompareLIST(k) to LIST(j).JLE NEXT If LIST(k) LIST(j), goto

next lower kindexentry;XCHG [EAX+ECX],DL Otherwise,interchangeLIST(k)

and LIST(j), leavingMOV [EAX+EDI],DL newLIST(j) in DL.

NEXT: DEC ECX Decrement inner loopindexk.JGE INNER Repeatorterminateinner loop.DEC EDI Decrement outer loopindexj.JG OUTER Repeatorterminateouter loop.

(b) IA-32 program implementation

Figure 3.50. An IA-32 byte-sorting program using straight-selection sort.

– –––

Page 23: (Assume

TABLE 3.1ARM index addressing modes

Name Assemblersyntax Addressing function

With immediate offset:

Pre-indexed [Rn, #offset] EA= [Rn] + offset

Pre-indexedwith writeback [Rn, #offset]! EA= [Rn] + offset;

Rn [Rn] + offset

Post-indexed [Rn], #offset EA= [Rn];Rn [Rn] + offset

With offset magnitude in Rm:

Pre-indexed [Rn, Rm, shift] EA= [Rn] [Rm] shifted

Pre-indexedwith writeback [Rn, Rm, shift]! EA= [Rn] [Rm] shifted;

Rn [Rn] [Rm] shifted

Post-indexed [Rn], Rm, shift EA= [Rn];Rn [Rn] [Rm] shifted

Relative Location EA= Location(Pre-indexed with = [PC]+ offsetimmediate offset)

EA= effective addressoffset= a signed number contained in the instructionshift = direction #integer

where direction is LSL for left shift or LSR for right shift, andinteger is a 5-bit unsigned number specifying the shift amount

Rm= the offset magnitude in register Rm can be added to or subtracted from thecontents of base register Rn

Page 24: (Assume

Table3.268000 addressing modes

Name Assemblersyntax Addressingfunction

Immediate #Value Operand= Value

AbsoluteShort Value EA =SignExtendedWValue

AbsoluteLong Value EA = Value

Register Rn EA = Rn

that is, Operand= [Rn ]

RegisterIndirect (An) EA = [An ]

Autoincrement (An)+ EA = [An];Increment An

Autodecrement (An) Decrement An ;EA = [An ]

Indexedbasic WValue(An) EA = WValue+ [An]

Indexedfull BValue(An,Rk.S) EA = BValue+ [An]+[Rk ]

Relativebasic WValue(PC) EA = WValue+ [PC]or Label

Relativefull BValue(PC,Rk.S) EA = BValue+ [PC]+ [Rk ]or Label (Rk)

EA = effectiveaddressValue = anumbergiveneitherexplicitlyorrepresented by a labelBValue = an8-bit ValueWValue = a16-bit ValueAn = anaddressregisterRn = an addressor adataregisterS = asizeindicator:W forsign-extended16-bitword

and L for32-bitlongword

Page 25: (Assume

Table3.3IA-32 addressing modes

Name Assemblersyntax Addressingfunction

Immediate Value Operand= Value

Direct Location EA= Location

Register Reg EA =Regthatis,Operand=[Reg]

Registerindirect [Reg] EA = [Reg]

Basewith [Reg+Disp] EA = [Reg]+Dispdisplacement

Indexwith [Reg S + Disp] EA = [Reg] S +Dispdisplacement

Basewithindex [Reg1+Reg2 S] EA = [Reg1]+[Reg2] S

Basewithindex [Reg1+Reg2 S+Disp] EA = [Reg1]+[Reg2] S+Dispanddisplacement

Value = an 8-or32-bitsignednumberLocation = a32-bitaddressReg,Reg1,Reg2 = oneofthegeneralpurposeregistersEAX, EBX, ECX,

EDX, ESP, EBP, ESI, EDI, withtheexceptionthatESPcannotbeusedasanindexregister

Disp = an 8-or32-bitsignednumber,exceptthat intheIndexwithdisplacement modeit canonly be 32bits.

S = ascalefactor of 1, 2,4, or 8

*

*

*