arm cortex-m3 mikrocontroller -...

566

Stichwortverzeichnis

Numerisch7-Segment-Anzeige 223

AA/D-Wandler 54Acorn Computers 53Advanced RISC Machines 53Analog Comparator Controller (ACC) 425,

442CMSIS

ACC_Configure() 445ACC_GetComparisonResult() 446ACC_SetComparisonPair() 445

Analog Comparator Converter Controller (ACC)

ACC Analog Control Register (ACC_ACR) 443

ACC Control Register (ACC_CR) 443ACC Interrupt Disable Register

(ACC_IDR) 443ACC Interrupt Enable Register

(ACC_IER) 443ACC Interrupt Mask Register

(ACC_IMR) 443ACC Interrupt Status Register

(ACC_ISR) 443ACC Mode Register (ACC_MR) 443ACC Write Protect Mode Register

(ACC_WPMR) 443ACC Write Protect Status Register

(ACC_WPSR) 443Analog-to-Digital Converter (ADC) 425, 448

ADC Analog Control Register (ADC_ACR) 450, 457

ADC Analog Extended Mode Register (ADC_EMR) 451

ADC Channel Data Register (ADC_CDR) 450

ADC Channel Data Register (ADC_CDRx) 456

ADC Channel Disable Register (ADC_CHDR) 450, 454

ADC Channel Enable Register (ADC_CHER) 450, 454

ADC Channel Gain Register (ADC_CGR) 450

ADC Channel Last Converted Data Register (ADC_LCDR) 450

ADC Channel Offset Register (ADC_ADC_COR) 456

ADC Channel Offset Register (ADC_COR) 450

ADC Channel Sequence 1 Register (ADC_SEQR1) 450

ADC Channel Sequence 2 Register (ADC_SEQR2) 450

ADC Channel Sequence Register 1 und 2 (ADC_SEQR1 und ADC_SEQR2) 453

ADC Channel Status Register (ADC_CHSR) 450, 454

ADC Compare Window Register (ADC_CWR) 450, 455

ADC Control Register (ADC_CR) 449, 451

ADC Extended Mode Register (ADC_EMR) 450

ADC Interrupt Disable Register (ADC_IDR) 450, 455

ADC Interrupt Enable Register (ADC_IER) 450, 455

ADC Interrupt Mask Register (ADC_IMR) 450, 455

ADC Interrupt Status Register (ADC_ISR) 450, 455

ADC Last Converted Data Register (ADC_LCDR) 454

ADC Mode Register (ADC_MR) 449, 451

ADC Overrun Status Register (ADC_OVER) 450, 455

© des Titels »ARM Cortex-M3 Mikrocontroller« (ISBN 978-3-8266-9475-2) 2014 by Verlagsgruppe Hüthig Jehle Rehm GmbH, Heidelberg.

Nähere Informationen unter: http://www.mitp.de/9475

http://www.mitp.de/9475


ADC Write Protect Mode Register (ADC_WPMR) 450, 457

ADC Write Protect Status Register (ADC_WPSR) 450, 457

Apple Computer 53Application Programming Interfaces (API) 55Arduino 37ARM EABI 29ARM Holdings PLC 53As-if-Regel 312ATMEL Studio 6 30Atollic TrueSTUDIO 29Ausgabeformat

elf32-little 89elf32-littlearm 89ihex 89

Ausgabeformateelf32-littlearm 107

BBare Metal System 119Bare-Metal-System 355Baudrate 483BCD

Binary Coded Decimal 226BCD-Code 226Betriebsspannung

maximal zulässige 147Bibliothek

libc 61newlib 61

Binary File Descriptor 107Binary File Descriptor (BFD) 100Bipolar-Transistoren 181Bitfeld 527Borland 32Bouncing 272Brown Out Detection 264Brown-out-Detektor 153Bus

serieller 54

CCAN siehe Serieller BusChip Identifier 158

Chip ID Extension Register (CHIPID_EXID) 159

Chip ID Register (CHIPID_CIDR) 159Clock Generator 239, 252

Main Clock (MCK) 252, 253, 257Main Clock Oscillator Section 257Master Clock (MCK) 252, 253, 257Phase-Lock Loops (PLLA und PLLB) 257PLL Clock 252Slow Clock (SLCK) 252, 253

CMSIS 53, 54CMSIS-Funktion

Übersicht 248Code::Blocks 32Compiler

Optimierungen 312Compiler-Toolchain 56CooCox CoIDE 31Cortex Microcontroller Software Interface

Standard 53Cortex Microcontroller Software Interface

Standard siehe CMSISCPU 54Cross Compiling 32Cross-Compiling 33Current Sinking 150, 174Current Sourcing 150, 174

DD/A-Umsetzer 54Datenwortlänge 484Definition

Begriff 376Deklaration

Begriff 376Digital-to-Analog Converter Controller

(DACC) 425CMSIS

DACC_Initialize() 427, 429DACC_SetConversionData() 429DACC_WriteBuffer() 430

DACC Channel Disable Register (DACC_CHDR) 427

DACC Channel Enable Register (DACC_CHER) 427

DACC Channel Status Register (DACC_CHSR) 427

DACC Control Register (DACC_CR) 427DACC Conversion Data Register

(DACC_CDR) 427DACC Interrupt Analog Current

Register (DACC_ACR) 427

567© des Titels »ARM Cortex-M3 Mikrocontroller« (ISBN 978-3-8266-9475-2) 2014 by Verlagsgruppe Hüthig Jehle Rehm GmbH, Heidelberg.




568

DACC Interrupt Disable Register (DACC_IDR) 427

DACC Interrupt Enable Register (DACC_IER) 427

DACC Interrupt Mask Register (DACC_IMR) 427

DACC Interrupt Status Register (DACC_ISR) 427

DACC Mode Register (DACC_MR) 427DACC Write Protect Mode Register

(DACC_WPMR) 427DACC Write Protect Status Register

(DACC_WPSR) 427Diskrete Größe 194Dokumentation

DOC 6500 142Dot-Matrix-Anzeige 224

EEABI 40Eclipse 32, 56

Workspace 43Einzelschrittmodus 550Elektrische Daten

SAM3S 145Elektrische Spannung

Formelzeichen 147maximale 147

Elektronikkirchhoffsches Gesetz 178ohmsches Gesetz 178

Embedded Application Binary Interface siehe EABI

Embedded Linux 119emIDE 32Enhanced Embedded Flash Controller 258Entwicklungsplattform siehe IDEEntwicklungsumgebung siehe IDEEntwicklungsumgebungen 27Ereignis

asynchron 240Polling 240synchron 240

Externe Referenz 84

FFeldeffekt-Transistor 190Firmware 119

Fortè for Java 32Frontend 85

Ggcc 56General Purpose Input/Output Mode (GPIO)

siehe Parallel Input/Output Controller (PIO-Controller)

Glitch 272GNU 56GNU Compiler Collection 56GPIO

General Purpose Input/Output 151QTouch-Bibliothek 285

Größeanaloge siehe kontinuierlichedigitale siehe diskretediskrete 165, 194

Größendiskrete bzw. analoge 425physikalische 425

HHigh Speed MultiMedia Card Interface

(HSMCI) 515, 538HSMCI Block Completion Signal

Timeout Register (HSMCI_CSTOR) 543

HSMCI Block Register (HSMCI_BLKR) 543

HSMCI Command Register (HSMCI_CMDR) 542

HSMCI Control Register (HSMCI_CR) 541

HSMCI Data Timeout Register (HSMCI_DTOR) 542

HSMCI Mode Register (HSMCI_MR) 541

HSMCI SDCard/SDIO Register (HSMCI_SDCR) 539, 542

Hysterese 445

II2C siehe Serieller BusIAR Workbench 28, 55IBM (International Business Machines) 32IBM Visual Age 32ICE 34





IDEMac OS X 39Windows 39

IDE (Integrated Development Environment) 27

IEEE 1149.1JTAG 34

In-Circuit-Emulation siehe ICEIn-Circuit-Emulator (ICE) 550Inhaltsassistent 161Initialisierung

Begriff 377In-System-Programmer 64Intellectual Property (IP) 53Interface

parallele 477serielle 477

Interface siehe SchnittstelleInter-Integrated Circuit (I2C) siehe Two-wire

Interface (TWI)Interrupt 152

Interrupt Pending Register 246Interrupt Request 240Interrupt-Service-Routinen 240IRQ 240NMI 240Non-maskable Interrupt 240Program Counter 246

Interrupt-Service-Routine (ISR) 301Interrupt-Service-Routine ISR

Erläuterung 251

JJava 31, 38Java Runtime Environment siehe JavaJava-Laufzeitumgebung

JRE (Java Runtime Environment) 32Java-Laufzeitumgebung siehe JavaJoint Test Action Group siehe JTAGJTAG 34JTAG ID 69

KKeil Microsystems 55Keil QVision 28Konfigurationsdatei

Debugger 109

LLC-Display

HD44780 200KS0066 200KS0070 200LCD 199

LinkerLinkerscript 84

Linux-WrapperCygwin 39MinGW 39

Local Loopback 486Loopback

local 486remote 486

Mmake 59

Makefiles 59Whitespace 59

Maskieren 161MCU 141Mentor Sourcery Codebench 28Metal Oxid Semiconductor 190Microcontroller Unit 141Microsoft Visual Studio 30MOSFET 190

NNested Vector Interrupt Controller (NVIC)

239, 240INTID 243Level Detection 241Level-sensitive Interrupt 243Non-nested Interrupts 241NVIC Interrupt Active Bit Register

(IABR0, IABR1) 243NVIC Interrupt Clear-enable Register

(ICER0, ICER1) 242NVIC Interrupt Clear-pending Register

(ICPR0, ICPR1) 242NVIC Interrupt Priority Register

(IPR0..IPR8) 243NVIC Interrupt Set Enable Register

(ISER0, ISER1) 242NVIC Interrupt Set-pending Register

(ISPR0, ISPR1) 242Software Interrupt 243





570

Software Trigger Interrupt Register (STIR) 243

Software-Interrupts 252Tail Chaining 241, 247

NetBeans 31Nullmodemkabel 36NVIC 54

Interrupt Set-enable Register 275Nested Vector Interrupt Controller 275

NVIC-RegisterÜberblick 244

OObjekt-Datei 84Olimex-Board SAM3-P256 33Opto-Isolator siehe OptokopplerOptokoppler 191, 196

PParallel Input/Output Controller (PIO

Controller)General Purpose Input/Output (GPIO)

168Peripheriekomponente 168PIO Output Status Register

(REG_PIO_OSRA/B/C) 167PIO Pad Pull-down Status Register

(REG_PIOA_PPDSR, REG_PIOB_PPDSR, REG_PIOC_PPDSR) 169

PIO Status Register (REG_PIO_PSR) 167

REG_PIOA_PUSR, REG_PIOB_PUSR, REG_PIOC_PUSR) 169

Parallel Input/Output Controller (PIO-Controller) 265

Parallel Input/Output Controller (PIO-Controller)

Flankenerkennung 275Glitches, Störimpulse, Prellen 272GPIO-Modus 265Multi-Drive Option 278Multiplex-Modus 265Open Drain 278Parallel-Capture-Modus 286PIO Additional Interrupt Mode Disable

Register (REG_PIOx_AIMDR) 275

PIO Additional Interrupt Mode Enable Register (REG_PIOx_AIMER) 275

PIO Additional Interrupt Mode Mask Register (REG_PIOx_AIMMR) 276

PIO Capture Mode Register (REG_PIOx_PCMR) 286

PIO Clear Output Data Register (REG_PIOx_CODR) 271

PIO Edge Select Register (REG_PIOx_ESR) 276

PIO Edge/Level Status Register (REG_PIOx_ELSR) 276

PIO Fall/Rise – Low/High Status Register (REG_PIOx_FRLHSR) 276

PIO Falling Edge/Low Level Select Register (REG_PIOx_FELLSR) 276

PIO Input Filter Disable Register (REG_PIOx_IFDR) 273

PIO Input Filter Enable Register (REG_PIOx_IFER) 273

PIO Input Filter Slow Clock Disable Register (REG_PIOx_IFSCDR) 273

PIO Input Filter Slow Clock Enable Register (REG_PIOx_IFSCER) 273

PIO Input Filter Slow Clock Status Register (REG_PIOx_IFSCSR) 273

PIO Input Filter Status Register (REG_PIOx_IFSR) 273

PIO Interrupt Disable Register (REG_PIOx_IDR) 275

PIO Interrupt Enable Register (REG_PIOx_IER) 275

PIO Interrupt Mask Register (REG_PIOx_IMR) 275

PIO Interrupt Status Register (REG_PIOx_ISR) 275

PIO Level Select Register (REG_PIOx_LSR) 276

PIO Lock Status Register (REG_PIOx_LOCKSR) 284

PIO Multi-driver Disable Register (REG_PIOx_MDDR) 279





PIO Multi-driver Enable Register (REG_PIOx_MDER) 279

PIO Multi-driver Status Register (REG_PIOx_MDSR) 279

PIO Output Data Status Register (REG_PIOx_ODSR) 271, 283

PIO Output Disable Register (REG_PIOx_ODR) 270

PIO Output Enable Register (REG_PIOx_OER)) 270

PIO Output Status Register (REG_PIOx_OSR) 270

PIO Output Write Disable Register (REG_PIOx_OWDR) 283

PIO Output Write Enable Register (REG_PIOx_OWER) 283

PIO Output Write Status Register (REG_PIOx_OWSR) 284

PIO Pad Pull-down Disable Register (REG_PIOx_PPDDR) 280

PIO Pad Pull-down Enable Register (REG_PIOx_PPDER) 280

PIO Pad Pull-down Status Register (REG_PIOx_PPDSR) 280

PIO Parallel Capture Interrupt Disable Register (REG_PIOx_PCIDR) 288

PIO Parallel Capture Interrupt Enable Register (REG_PIOx_PCIER) 288

PIO Parallel Capture Interrupt Mask Register (REG_PIOx_PCIMR) 288

PIO Parallel Capture Interrupt Status Register (REG_PIOx_PCISR) 287, 288

PIO Parallel Capture Reception Holding Register (REG_PIOx_PCRHR) 287, 289

PIO Peripheral ABCD Select Register 1 (REG_PIOx_ABCDSR) 281

PIO Peripheral ABCD Select Register 2 (REG_PIOx_ABCDSR2) 281

PIO Pin Data Status Register (REG_PIOx_PDSR) 271

PIO Pull Up Disable Register (REG_PIOx_PUDR) 279

PIO Pull Up Enable Register (REG_PIOx_PUER) 279

PIO Pull Up Status Register (REG_PIOx_PUSR) 279

PIO Rising Edge/High Level Select Register (REG_PIOx_REHLSR) 276

PIO Schmitt Trigger Register (REG_PIOx_SCHMITT) 285

PIO Set Output Data Register (REG_PIOx_SODR) 271

PIO Slow Clock Divider Debouncing Register (REG_PIOx_SCDR) 273

PIO Write Protect Mode Register (REG_PIOx_WPMR) 282

PIO Write Protect Status Register (REG_PIOx_WPSR) 283

PIOA, B, C Input/Output Controller (PIOA, PIOB, PIOC) 265

Spannungspegel, Level Detection 275Write Protect Violation Source

(PIO_WPSR_WPVSRC 283Write Protect Violation Status

(PIO_WPSR_WPVS) 283Write Protection Enable (WPEN) 270

Parität 484Parser 93Peripheral DMA Controller (PDC) 391

Receive Counter Register (PERIPH_RCR) 394

Receive Next Counter Register (PERIPH_RNCR) 394

Receive Next Pointer Register (PERIPH_RNPR) 394

Receive Pointer Register (PERIPH_RPR) 394

Transfer Control Register (PERIPH_PTCR) 395

Transfer Status Register (PERIPH_PTSR) 395

Transmit Counter Register (PERIPH_TCR) 394

Transmit Next Counter Register (PERIPH_TNCR) 394

Transmit Next Pointer Register (PERIPH_TNPR) 394

Transmit Pointer Register (PERIPH_TPR) 394

Phased Lock Loop siehe Power Management Controller (PMC)





572

Phasenregelschleife siehe Power Management Controller (PMC)

PIO 54PIO-Controller 152PMC Clock Generator (CKGR)

Main Clock Frequency Register (CKGR_MCFR) 255

PLLA/PLLB (CKGR_PLLAR und CKGR_PLLBR) 255

PMC Clock Generator Main Oscillator Register (CKGR_MOR) 255

Power Management Controller (PMC) 239, 256

Clock Failure Detector Event (CFDEV) 260

Fast Startup 259Free Running Processor Clock (FCLK)

258Highspeed Clock (HCLK) 258Main Clock (MCK) 259Master Clock (MCK) 259Peripheral Clock Controller (PCK) 258Peripheral Clock Disable Register

(PMC_PCDRx) 258Peripheral Clock Enable Register

(PMC_PCERx) 258PLLA, PLLB 259PMC Clock Generator Main Oscillator

Register (CKGR_MOR) 264PMC Master Clock Register

(PMC_MCKR) 261PMC Programmable Clock Register

(PMC_PCRx) 262PMC Status Register (PMC_SR) 260PMC USB Clock Register (PMC_USB)

262PMC Write Protect Enable Bit (WPEN)

263PMC Write Protect Mode Register

(PMC_WPMR) 263PMC Write Protect Status Register

(PMC_WPSR) 263Programmable Output Controller

(PMC_PCKx) 259Slow Clock (SLCK) 259System Clock (SysTick) 258USB Clock Controller (UDPCK) 258Wait for Event (WFE) 259

Prellen 272Tasten- oder Schalterprellen 125

Pulse Width Modulation Controller (PWMC) 397

CMSISPWMC_ConfigureChannel() 400PWMC_ConfigureChannelExt()

401PWMC_ConfigureClocks() 402PWMC_ConfigureComparison-

Unit() 402PWMC_ConfigureEventLine-

Mode() 402PWMC_ConfigureSyncChannel()

403PWMC_DisableChannel() 403PWMC_DisableChannelIt() 404PWMC_DisableIt() 404PWMC_DisableOverrideOutput()

404PWMC_EnableChannel() 403PWMC_EnableChannelIt() 404PWMC_EnableFaultProtection()

405PWMC_EnableIt() 404PWMC_EnableOverrideOutput()

404PWMC_FaultClear() 405PWMC_SetDeadTime() 405PWMC_SetDutyCycle() 406PWMC_SetFaultMode() 406PWMC_SetFaultProtectionValue()

407PWMC_SetOverrideValue() 407PWMC_SetPeriod() 407PWMC_SetSyncChannelUp-

datePeriod() 408PWMC_SetSyncChannelUp-

dateUnlock() 408PWMC_WriteBuffer() 408

Peripheral DMA Controller (PDC) 399Register

PWM Channel Duty Cycle Register (PWM_CDTYx) 406

PWM Channel Duty Cycle Update Register (PWM_CDTYx) 406

PWM Channel Period Register (PWM_CPRDx) 407

PWM Channel Period Update Register (PWM_CPRDUPDx) 407





QQNX Software Systems 32

RRasperryPi 37Rational Software 32Real Time Operating System 351Real-time Clock (RTC) 314

RTC Calendar Alarm Register (RTC_CALALR) 342

RTC Calendar Register (RTC_CALR) 341RTC Control Register (RTC_CR) 340RTC Interrupt Disable Register

(RTC_IDR) 343RTC Interrupt Enable Register

(RTC_IER) 343RTC Interrupt Mask Register

(RTC_IMR) 343RTC Status Clear Command Register

(RTC_SCCR) 343RTC Status Register (RTC_SR) 342RTC Time Alarm Register

(RTC_TIMALR) 342RTC Time Register (RTC_TIMR) 341RTC Valid Entry Register (RTC_VER)

344Real-time Timer (RTT) 300

RTT Alarm Register (RTT_AR) 302RTT Status Register (RTT_SR) 302RTT Value Register (RTT_VR) 302, 305

Real-timeClock (RTC)RTC Mode Register (RTC_MR) 340

Red Hat 32Referenz

externe 84REG_PIOx_WPMR 282Remote Loopback 486Reset 166Reset Controller 152Reset-Zustand 166Retargeting 488, 494Reverse Engineering 77Rowley Associates CrossWorks for ARM 29RTOS

Real Time Operating System 350

SSAM Boot Assistant 64SAM Boot Assistant siehe SAM-BA

SAM3S Software Package 57SAM3S4

elektrische Daten 145SAM3S4BA 34SAM-BA 38Schmitt-Trigger 284Schnittstelle

Baudrate 483Betriebsart Echo-Modus 486Betriebsart Loopback 486Datenwortlänge 484Fehlererkennung, Framing-Fehler 488Fehlererkennung, Kabelbruch 488Fehlererkennung, Parität 487Fehlererkennung, Überlauf, Overrun

488gerade Parität, even parity 484Halb-Duplex 487Hardware-Protokolle, Hardware

Handshaking 485Inter-Integrated Sound (I2S) 482keine Parität, no parity 484MARK Parity 484parallele 477Parität 484Protokolle, Handshaking 485RS-232 (EIA-232) 479RS-485 (EIA-485) 481Serial Peripheral Interface (SPI) 482serielle 477Simplex 487Software-Protokolle, Software

Handshaking 485SPACE Parity 484Start- und Stoppbits 484Synchronous Serial Controller (SSC)

482Two-Wire-Interface (TWI) 482ungerade Parität, odd parity 484Universal Asynchronous Receiver

Transceiver (UART) 489Universal Synchronous Asynchronous

Receiver Transceiver (USART) 496

Voll-Duplex 486Schreibweise

Widerstände 178SD-Karte

Simplified Specification 515Semihosting 494





574

Semihosting siehe RetargetingSerial Peripheral Interface (SPI) 515

SPI Chip Select Register (SPI_CSR) 520SPI Mode Register (SPI_MR) 520

Serieller Bus 54Single Step Tracing 550Slow Clock (SLCK) 304Speichersegment

BSS 103Heap 103Stack 103

ST Visual Developer 31Standard-Compiler

Optionen (Übersicht) 83Standardfunktion 61Statemachine siehe StatusmaschineStatusmaschine 320, 328STMicroelectronics STVD

ST Visual Developer 31Störimpuls 272Supply Control Register

SUPC_CR 253Supply Controller 153Supply Controller (SUPC) 239, 264, 300Synchronous Serial Controller (SSC) 515, 543

SSC Clock Mode Register (SSC_CMR) 545

SSC Control Register (SSC_CR) 545SSC Receive Clock Mode Register

(SSC_RCMR) 545SSC Transmit Clock Mode Register

(SSC_TCMR) 545SYSC 54SysClk siehe System ClockSystem Clock

Systemtakt 299System Controller 152System-Timer (SysTick) 353, 356

System Control Block (SCB) 356SysTick Calibration Value Register

(SysTick -> CALIB) 358SysTick Current Value Registers

(SysTick -> VAL) 357SysTick Reload Value Register

(SysTick -> LOAD) 357System-Timer (Systick)

SysTick Control and Status Register (SysStick -> CTRL) 356

SysTick 350

TTaktgenerator 252

Fast RC-Oszillator 253Tetrade

Nutztetraden 227Pseudotetraden 227

Texas Instruments StellarisWare 30Timer/Counter (TC) 359

Ausgangsfunktionalität 360Block-Register 361Capture Mode (CM) 360Channel Mode Register (TC_CMRx) 361Clock Chaining 361Eingangsfunktionalität 360Gray-Down 359NVIC 360PIO-Controller 360PMC-Controller 360PWM-Controller 360Quadrature Decoder Logic 359RA, RB, RC 374Register C Compare Match 361Struktur Tc 366Struktur TcChannel 366TC Block Control Register (TC_BCR)

361, 369TC Block Mode Register (TC_BMR) 369TC Channel Control Register

(TC_CCRx) 361, 371TC Channel Mode Register (TC_CMR)

371, 373TC Counter Value Register (TC_CVx)

374TC Fault Mode Register (TC_FMR) 371TC Interrupt Disable Register (TC_IDR)

374TC Interrupt Enable Register (TC_IER)

374TC Interrupt Mask Register (TC_IMR)

374TC Quadrature Decoder Logic Interrupt

Disable Register (TC_QDEC_IDR) 371

TC Quadrature Decoder Logic Interrupt Enable Register (TC_QDEC_IER) 371

TC Quadrature Decoder Logic Interrupt Mask Register (TC_QDEC_IMR) 371





TC Quadrature Decoder Logic Interrupt Status Register (TC_QDEC_ISR) 371

TC Register C (TC_RCx) 361TC Status Register (TC_SR) 374TC Stepper Motor Mode Register

(TC_SMMR) 374TIMER_CLOCK1 bis TIMER_CLOCK5

361Timer/Counter Channel 359Trigger 361Triggern per Software 361Wave Mode (WM) 360XC0 bis XC2 361

TinkerForge 37Tool

SAM-BA 64Toolchain

arm-none-eabi-cp 39arm-none-eabi-objcopy 39, 88arm-none-eabi-objdump 39arm-none-eabi-size 39GNU-Assembler arm-none-eabi-as 39GNU-Compiler arm-none-eabi-gcc 39GNU-Debugger arm-none-eabi-gdb 39GNU-Linker arm-none-eabi-ld 39launchpad 40make 39Michael Fischer 39MinGW, Minimal GNU Tools for

Windows 42rm 39sh 39touch 39Yagarto 39

Two-wire Interface (TWI) 507Arbitration 509Fast-Modus 508Fast-Modus Plus 508High-Speed-Modus 508Standard-Modus 508System Management Bus, SMBus, SMB

507TWI Clock Waveform Generator

Register (TWI_CWGR) 511TWI Control Register (TWI_CR) 510TWI Internal Address Register

(TWI_IADR) 511TWI Interrupt Disable Register

(TWI_IDR) 514

TWI Interrupt Enable Register (TWI_IER) 514

TWI Interrupt Mask Register (TWI_IMR) 514

TWI Master Mode Register (TWI_MMR) 511

TWI Receive Holding Register (TWI_RHR) 514

TWI Slave Mode Register (TWI_SMR) 511

TWI Status Register (TWI_SR) 512TWI Transmit Holding Register

(TWI_THR) 514Ultra-Fast-Modus 508

UUEXT 35Universal Asynchronous Receiver

Transceiver (UART)UART Baud Rate Generator Register

(UART_BRGR) 493UART Control Register (UART_CR) 491UART Interrupt Disable Register

(UART_IDR) 493UART Interrupt Enable Register

(UART_IER) 492UART Interrupt Mask Register

(UART_IMR) 493UART Mode Register (UART_MR) 491UART Receiver Holding Register

(UART_RHR) 493UART Status Register (UART_SR) 493UART Transmitter Holding Register

(UART_THR) 493Universal EXTension siehe UEXTUniversal Synchronous Asynchronous

Receiver Transceiver (USART)USART Baud Rate Generator Register

(US_BRGR) 505USART Channel Status Register

(US_CSR) 504USART Control Register (US_CR) 500USART FI DI Ratio Register (US_FIDI)

505USART Interrupt Disable Register

(US_IDR) 504USART Interrupt Enable Register

(US_IER) 504USART Interrupt Mask Register

(US_IMR) 504





576

USART IrDA Filter Register (US_IF) 505

USART Mode Register (US_MR) 501USART Number of Errors Register

(US_NER) 505USART Receive Holding Register

(US_RHR) 505USART Receiver Time-out Register

(US_RTOR) 505USART Transmit Holding Register

(US_THR) 505USART Transmitter Timeguard

Register (US_TTGR) 505Universal Synchronous Asynchronous

Receiver Transceiver USART)USART Manchester Configuration

Register (US_MAN) 506USB Clock Controller (UDPCK) siehe Power

Management Controller (PMC)

VVektortabelle 101Versionierung

Git 154Subversion 154SVN siehe Subversion

Versorgungsspannung 147VLSI Technology 53volatile 312

WWatchdog Timer 152Watchdog Timer (WDT)

Deadlock 344WDT Control Register (WDT_CR) 352WDT Mode Register (REG_WDT_MR)

345WDT Mode Register Watchdog

Debug Halt (WDT_MR_WDDBGHLT) 348

WDT Mode Register Watchdog Fault Interrupt Enable (WDT_MR_WDFIEN) 348

WDT Mode Register Watchdog Idle Halt (WDT_MR_WDIDLEHLT) 348

WDT Mode Register Watchdog Reset Enable (WDT_MR_WDRSTEN) 348

Watchdog.Timer 120Watchdog-Timer (WDT) 344

WDT Mode Register (REG_WDT_MR) 352

WDT Status Register (REG_WDT_SR) 353

Widerstanddimensionieren 193internationale Schreibweise 178

Windows CE 119WPEN (Write Protection Enable) 282WPMR siehe PIO Write Protect Mode

Register

ZZustandsautomat siehe Statusmaschine





/ColorImageDict > /JPEG2000ColorACSImageDict > /JPEG2000ColorImageDict > /AntiAliasGrayImages false /CropGrayImages true /GrayImageMinResolution 150 /GrayImageMinResolutionPolicy /OK /DownsampleGrayImages true /GrayImageDownsampleType /Bicubic /GrayImageResolution 300 /GrayImageDepth -1 /GrayImageMinDownsampleDepth 2 /GrayImageDownsampleThreshold 1.50000 /EncodeGrayImages true /GrayImageFilter /DCTEncode /AutoFilterGrayImages true /GrayImageAutoFilterStrategy /JPEG /GrayACSImageDict > /GrayImageDict > /JPEG2000GrayACSImageDict > /JPEG2000GrayImageDict > /AntiAliasMonoImages false /CropMonoImages true /MonoImageMinResolution 1200 /MonoImageMinResolutionPolicy /OK /DownsampleMonoImages true /MonoImageDownsampleType /Bicubic /MonoImageResolution 1200 /MonoImageDepth -1 /MonoImageDownsampleThreshold 1.50000 /EncodeMonoImages true /MonoImageFilter /CCITTFaxEncode /MonoImageDict > /AllowPSXObjects false /CheckCompliance [ /None ] /PDFX1aCheck false /PDFX3Check false /PDFXCompliantPDFOnly false /PDFXNoTrimBoxError true /PDFXTrimBoxToMediaBoxOffset [ 0.00000 0.00000 0.00000 0.00000 ] /PDFXSetBleedBoxToMediaBox true /PDFXBleedBoxToTrimBoxOffset [ 0.00000 0.00000 0.00000 0.00000 ] /PDFXOutputIntentProfile (None) /PDFXOutputConditionIdentifier () /PDFXOutputCondition () /PDFXRegistryName (http://www.color.org) /PDFXTrapped /Unknown

/CreateJDFFile false /Description >>> setdistillerparams> setpagedevice

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