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SSE2030: Introduction to Computer Systems, Spring 2019, Jinkyu Jeong (jinkyu@skku.edu)

Operating Systems

Jinkyu Jeong (jinkyu@skku.edu)Computer Systems Laboratory

Sungkyunkwan Universityhttp://csl.skku.edu

SSE2030: Introduction to Computer Systems, Spring 2019, Jinkyu Jeong (jinkyu@skku.edu) 2

Why OS?

SSE2030: Introduction to Computer Systems, Spring 2019, Jinkyu Jeong (jinkyu@skku.edu) 3

Control Flow

• Processors do only one thing– From startup to shutdown, a CPU simply reads and

executes a sequence of instructions, one at a time– This sequence is the CPU’s control flow (or flow of

control)

<startup>inst1inst2inst3…instn<shutdown>

Physical control flow

Time

SSE2030: Introduction to Computer Systems, Spring 2019, Jinkyu Jeong (jinkyu@skku.edu) 4

Running a Program

Code

Data

Fetch I ß Mem[PC]Decode IExecute IUpdate PC

PC

SSE2030: Introduction to Computer Systems, Spring 2019, Jinkyu Jeong (jinkyu@skku.edu) 5

Running Multiple Programs

Code A

Data A

Code C

Data C

Code B

Data B

SSE2030: Introduction to Computer Systems, Spring 2019, Jinkyu Jeong (jinkyu@skku.edu) 6

Interleaving Multiple Programs

Code A

Data A

Code C

Data C

Code B

Data B

SSE2030: Introduction to Computer Systems, Spring 2019, Jinkyu Jeong (jinkyu@skku.edu) 7

Virtualizing the CPU

Code A

Data A

OS Code

OS Data

Code B

Data B

OS creates the illusion that each process has its own CPU (and memory)

SSE2030: Introduction to Computer Systems, Spring 2019, Jinkyu Jeong (jinkyu@skku.edu) 8

What is an OS?

• Provides an execution environment for running programs– Process, thread, address space, files, etc.

• Manages various resources of a computer system– Sharing, protection, fairness, efficiency, etc.

• Highly-concurrent,event-driven software– System calls– Interrupts Operating System (Kernel)

Software Development Environment(compilers, loaders, editors, utilities,

command interpreter, libraries)

Middleware

Computer System Architecture (Hardware Platform)

Applications

SSE2030: Introduction to Computer Systems, Spring 2019, Jinkyu Jeong (jinkyu@skku.edu) 9

Architectural Support for OS

• Protected or privileged instructions

• User mode vs. kernel mode

• Exceptions: OS trap

• Interrupts

• Timer

• Memory protection

• …

SSE2030: Introduction to Computer Systems, Spring 2019, Jinkyu Jeong (jinkyu@skku.edu) 10

OS Internals

Hardware

System Call Interface

shellshell

ls ps

Hardware Control (Interrupt handling, etc.)

File SystemManagement

I/O Management(device drivers)

MemoryManagement

ProcessManagement Protection

Kernelspace

Userspace trap

schedulerIPC

synchronization

SSE2030: Introduction to Computer Systems, Spring 2019, Jinkyu Jeong (jinkyu@skku.edu) 11

What is a Process?

• An instance of a program in execution• Java analogy:– Class à “program” (static)– Object à “process” (dynamic)

• The basic unit of protection• A process is identified using its process ID (PID)• A process includes– CPU context (registers)– OS resources (address space, open files, etc.)– Other information (PID, state, owner, etc.)

SSE2030: Introduction to Computer Systems, Spring 2019, Jinkyu Jeong (jinkyu@skku.edu) 12

Process: Key Abstractions

• Logical control flow– Each program seems to have exclusive use

of the CPU– Provided by kernel mechanism called

context switching

• Private address space– Each program seems to have exclusive use

of main memory– Provided by kernel mechanism called

virtual memory

CPURegisters

MemoryStackHeap

CodeData

SSE2030: Introduction to Computer Systems, Spring 2019, Jinkyu Jeong (jinkyu@skku.edu) 13

Multiprocessing (1)

• Process executions interleaved– Register values for nonexecuting processes saved in

memory

CPURegisters

MemoryStackHeap

CodeData

Saved registers

StackHeap

CodeData

Saved registers

StackHeap

CodeData

Saved registers

SSE2030: Introduction to Computer Systems, Spring 2019, Jinkyu Jeong (jinkyu@skku.edu) 14

Multiprocessing (2)

• Save current registers in memory

CPURegisters

MemoryStackHeap

CodeData

Saved registers

StackHeap

CodeData

Saved registers

StackHeap

CodeData

Saved registers

SSE2030: Introduction to Computer Systems, Spring 2019, Jinkyu Jeong (jinkyu@skku.edu) 15

Multiprocessing (3)

• Schedule next process for execution

CPURegisters

MemoryStackHeap

CodeData

Saved registers

StackHeap

CodeData

Saved registers

StackHeap

CodeData

Saved registers

SSE2030: Introduction to Computer Systems, Spring 2019, Jinkyu Jeong (jinkyu@skku.edu) 16

Multiprocessing (4)

• Context switch– Load saved registers and switch address space

CPURegisters

MemoryStackHeap

CodeData

Saved registers

StackHeap

CodeData

Saved registers

StackHeap

CodeData

Saved registers

SSE2030: Introduction to Computer Systems, Spring 2019, Jinkyu Jeong (jinkyu@skku.edu) 17

From Program to Process

Stack

Heap

program

Code

Data

code

data

PC

SP

Memory Disk

SSE2030: Introduction to Computer Systems, Spring 2019, Jinkyu Jeong (jinkyu@skku.edu) 18

Virtualizing Memory• Example

– What happens if two users simultaneously run this program?

#include <stdio.h>

int n = 0;

int main (){

n++;printf (“&n = %p, n = %d\n”, &n, n);

}

% ./a.out&n = 0x0804a024, n = 1% ./a.out&n = 0x0804a024, n = 1

SSE2030: Introduction to Computer Systems, Spring 2019, Jinkyu Jeong (jinkyu@skku.edu) 19

Physical Addressing

• Used in “simple” systems like embedded microcontrollers

0:1:

M-1:

Main memory

CPU

2:3:4:5:6:7:

Physical address(PA)

Data word

8: ...4

SSE2030: Introduction to Computer Systems, Spring 2019, Jinkyu Jeong (jinkyu@skku.edu) 20

Virtual Addressing

• Used in all modern servers, laptops, and smartphones

0:1:

M-1:

Main memory

MMU

2:3:4:5:6:7:

Physical address(PA)

Data word

8: ...

CPU

Virtual address(VA)

CPU Chip

44100

SSE2030: Introduction to Computer Systems, Spring 2019, Jinkyu Jeong (jinkyu@skku.edu) 21

Virtual Memory• Each process has its own virtual address space– Large and contiguous– Use virtual addresses for memory references– Virtual addresses are private to each process

• Address translation is performed at run time– From a virtual address to the corresponding physical address

• Supports lazy allocation– Physical memory is dynamically allocated or released on

demand– Programs execute without requiring their entire address

space to be resident in physical memory

SSE2030: Introduction to Computer Systems, Spring 2019, Jinkyu Jeong (jinkyu@skku.edu) 22

(Virtual) Address Space

• Process’ abstract view of memory– OS provides illusion of private

address space to each process– Contains all of the memory

state of the process– Static area• Allocated on exec()• Code & Data– Dynamic area• Allocated at runtime• Can grow or shrink• Heap & Stack

kernel virtual memory(code, data, heap, stack)

run-time heap(managed by malloc)

user stack(created at runtime)

unused0

memoryinvisible touser code

brk

read/write segment(.data, .bss)

read-only segment(.init, .text, .rodata)

N-1

stackpointer

SSE2030: Introduction to Computer Systems, Spring 2019, Jinkyu Jeong (jinkyu@skku.edu) 23

Physical memory

Virtual Memory

0

P1’s address space

Heap

Stack

Data

Code

0

P2’s address space

Heap

Stack

DataCode

physical address

virtual address 0x100

virtual address 0x100

physical address

Heap

Stack

Data

Code

Heap

Stack

DataCode

addresstranslationmechanism

SSE2030: Introduction to Computer Systems, Spring 2019, Jinkyu Jeong (jinkyu@skku.edu) 24

Why Virtual Memory?• Uses main memory efficiently– Use DRAM as a cache for parts of a virtual address space– Address space of a process can exceed physical memory size

• Simplifies memory management– Each process gets the same uniform linear address space– Provides a convenient abstraction for programming

• Provides memory protection– Isolating address spaces– One process can’t interfere with another’s memory– User program cannot access privileged kernel code and data

SSE2030: Introduction to Computer Systems, Spring 2019, Jinkyu Jeong (jinkyu@skku.edu) 25

Basic Idea

• Conceptually, virtual memory is an array of N contiguous bytes stored on disk– The contents of the array on disk are cached in physical

memory (DRAM cache)– These cache blocks are called pages (P = 2p bytes)

PP 2m-p-1

Physical memory

Empty

Empty

Uncached

VP 0VP 1

VP 2n-p-1

Virtual memory

UnallocatedCachedUncachedUnallocatedCachedUncached

PP 0PP 1

EmptyCached

0

N-1M-1

0

Virtual pages (VPs) stored on disk

Physical pages (PPs) cached in DRAM

SSE2030: Introduction to Computer Systems, Spring 2019, Jinkyu Jeong (jinkyu@skku.edu) 26

Page Table

• An array of page table entries (PTEs) that maps virtual pages to physical pages– Per-process kernel data structure in DRAM

null

null

Memory residentpage table

(DRAM)

Physical memory(DRAM)

VP 7VP 4

Virtual memory(disk)

Valid01

010

10

1

Physical pagenumber or

disk addressPTE 0

PTE 7

PP 0VP 2VP 1

PP 3

VP 1

VP 2

VP 4

VP 6

VP 7

VP 3

SSE2030: Introduction to Computer Systems, Spring 2019, Jinkyu Jeong (jinkyu@skku.edu) 27

Page Hit

• The page is in physical memory (DRAM cache hit)

null

null

Memory residentpage table

(DRAM)

Physical memory(DRAM)

VP 7VP 4

Virtual memory(disk)

Valid01

010

10

1

Physical pagenumber or

disk addressPTE 0

PTE 7

PP 0VP 2VP 1

PP 3

VP 1

VP 2

VP 4

VP 6

VP 7

VP 3

Virtual address

SSE2030: Introduction to Computer Systems, Spring 2019, Jinkyu Jeong (jinkyu@skku.edu) 28

Page Fault

• The page is not in physical memory (DRAM cache miss)

null

null

Memory residentpage table

(DRAM)

Physical memory(DRAM)

VP 7VP 4

Virtual memory(disk)

Valid01

010

10

1

Physical pagenumber or

disk addressPTE 0

PTE 7

PP 0VP 2VP 1

PP 3

VP 1

VP 2

VP 4

VP 6

VP 7

VP 3

Virtual address

SSE2030: Introduction to Computer Systems, Spring 2019, Jinkyu Jeong (jinkyu@skku.edu) 29

Handling Page Fault (1)

• Demand paging– Page miss causes page fault (an exception)

null

null

Memory residentpage table

(DRAM)

Physical memory(DRAM)

VP 7VP 4

Virtual memory(disk)

Valid01

010

10

1

Physical pagenumber or

disk addressPTE 0

PTE 7

PP 0VP 2VP 1

PP 3

VP 1

VP 2

VP 4

VP 6

VP 7

VP 3

Virtual address

SSE2030: Introduction to Computer Systems, Spring 2019, Jinkyu Jeong (jinkyu@skku.edu) 30

Handling Page Fault (2)

• Demand paging– Page fault handler selects a victim to be evicted (here VP

4)

null

null

Memory residentpage table

(DRAM)

Physical memory(DRAM)

VP 7

Virtual memory(disk)

Valid01

010

10

1

Physical pagenumber or

disk addressPTE 0

PTE 7

PP 0VP 2VP 1

PP 3

VP 1

VP 2

VP 4

VP 6

VP 7

VP 3

Virtual address

VP 4

SSE2030: Introduction to Computer Systems, Spring 2019, Jinkyu Jeong (jinkyu@skku.edu) 31

Handling Page Fault (3)

• Demand paging– Load VP 3 into memory

null

null

Memory residentpage table

(DRAM)

Physical memory(DRAM)

VP 7

Virtual memory(disk)

Valid01

100

10

1

Physical pagenumber or

disk addressPTE 0

PTE 7

PP 0VP 2VP 1

PP 3

VP 1

VP 2

VP 4

VP 6

VP 7

VP 3

Virtual address

VP 3

SSE2030: Introduction to Computer Systems, Spring 2019, Jinkyu Jeong (jinkyu@skku.edu) 32

Private Virtual Address Space

• Each process has its own virtual address space– Physical pages can be shared by multiple processes

Virtual Address Space for Process 1:

Physical Address Space (DRAM)

0

N-1(e.g., read-only library code)

Virtual Address Space for Process 2:

VP 1VP 2...

0

N-1

VP 1VP 2...

PP 2

PP 6

PP 8

...

0

M-1

Address translation

SSE2030: Introduction to Computer Systems, Spring 2019, Jinkyu Jeong (jinkyu@skku.edu) 33

Memory Protection

• Extend PTEs with permission bits

• MMU checks these bits on each access

Process i: AddressREAD WRITEPP 6Yes NoPP 4Yes YesPP 2Yes

VP 0:VP 1:VP 2:

•••

Process j:

Yes

SUPNoNoYes

AddressREAD WRITEPP 9Yes NoPP 6Yes Yes

PP 11Yes Yes

SUPNoYesNo

VP 0:VP 1:VP 2:

Physical Address Space

PP 2

PP 4

PP 6

PP 8PP 9

PP 11

EXEC

Yes

EXEC

YesYes

Yes

Yes

No

SSE2030: Introduction to Computer Systems, Spring 2019, Jinkyu Jeong (jinkyu@skku.edu) 34

Summary

• OS provides two key abstractions for each process– Logical control flow – Private address space

• How are these illusions maintained?– Process executions interleaved (multiprocessing)– Address space managed by virtual memory

• Implemented by OS kernel with architecture support

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